74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 5 -- 26 January 2015 Product data sheet 1. General description The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four `138' ICs and one inverter. The `138' can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Complies with JEDEC standard no. 7A Input levels: For 74HC138: CMOS level For 74HCT138: TTL level Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active LOW mutually exclusive outputs ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number 74HC138N Package Temperature range Name Description Version 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HCT138N 74HC138D 74 HCT138D 74HC138DB 74HCT138DB 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting Table 1. Ordering information ...continued Type number Package 74HC138PW Temperature range Name Description Version 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package; no leads; 16 terminals; body 2.5 3.5 0.85 mm 74HCT138PW 74HC138BQ 74HCT138BQ 4. Functional diagram < $ < $ < $ < < < WR '(&2'(5 (1$%/( (;,7,1* $ < $ < $ < < < < ( < ( < ( < < ( ( ( PQD Fig 1. Logic symbol PQD Fig 2. Functional diagram < $ < $ < $ < ( < ( < ( < < DDH Fig 3. Logic diagram 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 2 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 5. Pinning information 5.1 Pinning +& +&7 $ < ( < ( < ( < *1' < $ < $ < ( < ( ( < < < < *1' < < < < $ $ WHUPLQDO LQGH[DUHD 9&& *1' $ 9&& +&%4 +&7%4 DDH 7UDQVSDUHQWWRSYLHZ DDH (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration DIP16, SO16, SSOP16 and TSSOP16 Fig 5. Pin configuration DHVQFN16 5.2 Pin description Table 2. Pin description Symbol Pin Description A0, A1, A2 1, 2, 3 address input A0, A1, A2 E1, E2 4, 5 enable input E1, E2 (active LOW) E3 6 enable input E3 (active HIGH) Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 15, 14, 13, 12, 11, 10, 9, 7 output Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 (active LOW) GND 8 ground (0 V) VCC 16 positive supply voltage 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 3 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 6. Functional description Function table[1] Table 3. Control Input Output E1 E2 E3 A2 A1 A0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 H X X X X X H H H H H H H H X H X X X L L L H L L L H H H H H H H L L L H H H H H H H L H L H L H H H H H L H H L H H H H H H L H H H H L L H H H L H H H H H L H H H L H H H H H H H L H L H H H H H H H H H L H H H H H H H [1] H = HIGH voltage level; L = LOW voltage level; X = don't care. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7 V IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V - 20 mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V - 20 mA IO output current VO = 0.5 V to (VCC + 0.5 V) - 25 mA ICC quiescent supply current - 50 mA IGND ground current - 50 mA Tstg storage temperature 65 +150 C Ptot total power dissipation DIP16 package [1] - 750 mW SO16 package [2] - 500 mW SSOP16 package [3] - 500 mW TSSOP16 package [3] - 500 mW DHVQFN16 package [4] - 500 mW [1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C. [2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. [3] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C. [4] For DHVQFN16 packages: Ptot derates linearly with 4.5 mW/K above 60 C. 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 4 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC138 Min Typ 74HCT138 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to Unit +125 C Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V 74HC138 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage V VI = VIH or VIL IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V VI = VIH or VIL - 0.16 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 6.0 V IO = 5.2 mA; VCC = 6.0 V - - 0.1 - 1.0 - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 - 80 - 160 A 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 5 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting Table 6. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter CI Tamb = 25 C Conditions input capacitance Tamb = 40 C to +85 C Min Typ Max - 3.5 - Min Max Tamb = 40 C to Unit +125 C Min Max pF 74HCT138 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 4 mA 3.98 4.32 - 3.84 - 3.7 - V IO = 20 A - 0 0.1 - 0.1 - 0.1 V LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1.0 - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 A ICC additional supply current VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A per input pin; An inputs - 150 540 - 675 - 735 A per input pin; En inputs - 125 450 - 562.5 - 612.5 A per input pin; E3 input - 100 360 - 450 - 490 A - 3.5 - VOL CI input capacitance 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 pF (c) NXP Semiconductors N.V. 2015. All rights reserved. 6 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8. Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ Max Min Max Min Max - 41 150 - 190 - 225 ns 74HC138 tpd propagation delay An to Yn; see Figure 6 [1] VCC = 2.0 V VCC = 4.5 V - 15 30 - 38 - 45 ns VCC = 5 V; CL = 15 pF - 12 - - - - - ns - 12 26 - 33 - 38 ns VCC = 6.0 V E3 to Yn; see Figure 6 [1] VCC = 2.0 V - 47 150 - 190 - 225 ns VCC = 4.5 V - 17 20 - 38 - 45 ns VCC = 5 V; CL = 15 pF - 14 - - - - - ns - 14 26 - 33 - 38 ns VCC = 2.0 V - 47 150 - 190 - 225 ns VCC = 4.5 V - 17 20 - 38 - 45 ns VCC = 5 V; CL = 15 pF - 14 - - - - - ns - 14 26 - 33 - 38 ns VCC = 2.0 V - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns - 67 - - - - - pF VCC = 6.0 V En to Yn; see Figure 7 [1] VCC = 6.0 V tt CPD transition time power dissipation capacitance 74HC_HCT138 Product data sheet Yn; see Figure 6 and Figure 7 CL = 50 pF; f = 1 MHz; VI = GND to VCC [2] [3] All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 7 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting Table 7. Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 8. Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit Min Typ Max Min Max Min Max - 20 35 - 44 - 53 ns - 17 - - - - - ns - 18 40 - 50 - 60 ns - 19 - - - - - ns 74HCT138 propagation delay tpd [1] An to Yn; see Figure 6 VCC = 4.5 V VCC = 5 V; CL = 15 pF [1] E3 to Yn; see Figure 6 VCC = 4.5 V VCC = 5 V; CL = 15 pF [1] En to Yn; see Figure 7 VCC = 4.5 V - 19 40 - 50 - 60 ns VCC = 5 V; CL = 15 pF - 19 - - - - - ns - 7 15 - 19 - 22 ns - 67 - - - - - pF tt transition time Yn; see Figure 6 and Figure 7 CPD power dissipation capacitance CL = 50 pF; f = 1 MHz; VI = GND to VCC 1.5 V [2] VCC = 4.5 V [1] [3] tpd is the same as tPLH and tPHL. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of outputs. 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 8 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 11. Waveforms 9&& $Q( LQSXW 90 *1' W3+/ W3/+ 92+ <Q RXWSXW 90 92/ W7+/ W7/+ PQD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Propagation delay input (An) and enable input (E3) to output (Yn) and transition time output (Yn) 9&& (( LQSXW *1' 90 W3+/ W3/+ 92+ <Q RXWSXW 90 92/ W7+/ W7/+ PQD Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Propagation delay enable input (En) to output (Yn) and transition time output (Yn) Table 8. Measurement points Type Input Output VM VM 74HC138 0.5VCC 0.5VCC 74HCT138 1.3 V 1.3 V 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 9 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 9, W: QHJDWLYH SXOVH 90 9 WI WU WU WI 9, SRVLWLYH SXOVH 9 90 90 90 W: 9&& 9&& * 9, 92 5/ 6 RSHQ '87 &/ 57 DDG Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 8. Test circuit for measuring switching times Table 9. Test data Type Input VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC138 VCC 6 ns 15 pF, 50 pF 1 k open GND VCC 74HCT138 3V 6 ns 15 pF, 50 pF 1 k open GND VCC 74HC_HCT138 Product data sheet Load S1 position All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 10 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 12. Package outline ',3SODVWLFGXDOLQOLQHSDFNDJHOHDGV PLO 627 0( VHDWLQJSODQH ' $ $ $ / F H = Z 0 E E H E 0+ SLQLQGH[ ( PP VFDOH ',0(16,216 LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ PLQ $ PD[ E E E F ' ( H H / 0( 0+ Z = PD[ PP LQFKHV 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPP LQFK PD[LPXPSHUVLGHDUHQRWLQFOXGHG Fig 9. 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 -(,7$ (8523($1 352-(&7,21 ,668('$7( Package outline SOT38-4 (DIP16) 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 11 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ /S / H Z 0 ES GHWDLO; PP VFDOH ',0(16,216 LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP LQFKHV R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPP LQFK PD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7( Fig 10. Package outline SOT109-1 (SO16) 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 12 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ = 4 $ SLQLQGH[ $ $ $ /S / H GHWDLO; Z 0 ES PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7( 02 Fig 11. Package outline SOT403-1 (TSSOP16) 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 13 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ /S / GHWDLO; Z 0 ES H PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7( 02 Fig 12. Package outline SOT338-1 (SSOP16) 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 14 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting '+94)1SODVWLFGXDOLQOLQHFRPSDWLEOHWKHUPDOHQKDQFHGYHU\WKLQTXDGIODWSDFNDJHQROHDGV 627 WHUPLQDOVERG\[[PP % ' $ $ $ ( F GHWDLO; WHUPLQDO LQGH[DUHD WHUPLQDO LQGH[DUHD & H H E \ \ & Y 0 & $ % Z 0 & / (K H 'K ; PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 PP $ PD[ $ E F ' 'K ( (K H / Y Z \ \ H 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& -(,7$ 627 02 (8523($1 352-(&7,21 ,668('$7( Fig 13. Package outline SOT763-1 (DHVQFN16) 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 15 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model TTL Transistor-Transistor Logic MM Machine Model 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT138 v.5 20150126 Product data sheet - 74HC_HCT138 v.4 Modifications: 74HC_HCT138 v.4 Modifications: 74HC_HCT138 v.3 Modifications: * * Table 6: OFF-state output current removed because device has no 3-state outputs. Table 7: Power dissipation capacitance condition for 74HCT138 is corrected. 20120627 Product data sheet - 74HC_HCT138 v.3 The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. * * Legal texts have been adapted to the new company name where appropriate. SOT38-1 changed to SOT38-4. 20051223 Product data sheet - 74HC_HCT138_CNV v.2 * The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. * Section 3 "Ordering information", Section 5 "Pinning information" and Section 12 "Package outline": Added DHVQFN package information * Section 9 "Static characteristics": Added from the family specification 74HC_HCT138_CNV v.2 19970827 74HC_HCT138 Product data sheet * Product specification - All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 - (c) NXP Semiconductors N.V. 2015. All rights reserved. 16 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. 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Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 17 of 19 74HC138; 74HCT138 NXP Semiconductors 3-to-8 line decoder/demultiplexer; inverting Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications. Translations -- A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT138 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 18 of 19 NXP Semiconductors 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 26 January 2015 Document identifier: 74HC_HCT138