AFBR-0544Z Evaluation Kit for the
AFBR-5972Z Fiber Optic Transceiver
Application Note 5532
Evaluation Board
The AFBR-0544Z evaluation board gives the system
designer a convenient means to evalute the performance
of the Avago AFBR-5972Z ber optic transceiver module,
as well as future compatible products.
As shown in Figure 1, the evaluation board is mounted with
an AFBR-5972Z module, four SMA connectors for dieren-
tial input/output signals, a 2-pin header for measuring RF
dierential signals using a dierential probe, and three 2
mm jacks for the 3.3 V supply voltage and signal detect
(SD).
This application note describes the evaluation printed
circuit board (PCB), the test equipment, and the methods
for evaluating optical and electrical characteristics of the
the AFBR-5972Z transceiver module.
Figure 1. Evaluation board for the AFBR-5972Z transceiver module
Application Note Outline
1. Evaluation kit
2. Evaluation PCB description
3. Electro-optical test congurations
4. Evaluation board schematic and bill of materials
(BOM)
1. Evaluation kit
The AFBR-0544Z evaluation kit includes:
(a) Evaluation board with AFBR-5972Z module, four
SMA connectors, 2-pin header and three 2 mm jack
connectors and electronic components mounted on
bottom side of PCB
(b) 1 m simplex POF cable (NA = 0.5)
- P/No. HFBR-RNS001Z
(c) AFBR-4526Z duplex connector for AFBR-5972Z
(d) 1 m POF, with two AFBR-4526Z duplex connectors
- P/No. HFBR-RSD001Z
(To demonstrate only the mechanical properties of
the duplex connector)
Not included in the evaluation kit are:
(a) 3.3 V DC power supply and power supply cables
(b) Digitial multimeter
(c) MPI 1632C Digital Data Analyzer (Pattern generator)
(d) SDA 600A serial data analyzer (Oscilloscope)
(e) Femto (O/E) converter
(f) Dierential probe
2
2. Evaluation Board Description
The evaluation board schematic is shown in Figure 2. The
dierential LVDS or LVPECL electrical inputs signal of the
transmitter are AC coupled through 100nF capacitors and
connected by 50Ω transmission lines to SMA connectors.
The dierential LVPECL electrical outputs from LVPECL ter-
mination of the receiver are AC coupled through 100nF
capacitors and connected by 50Ω transmission lines to
SMA connecters. The signal detect (SD) pin is LVPECL com-
patible. The thick line between SMA connector and the
input/output pins of AFBR-5972Z represents a 50Ω trans-
mission in the schematics (Figure 2). The top and bottom-
sides of the evalution PCB are shown in Figure 3(a) and
3(b) respectively.
The evaluation board is a two-layer PCB designed for 125
Mbit/s. The transceiver dierential lines are placed below
the ground plane (top side) to ensure a low inductance
signal return path and continuous impedance along the
trace. The ground plane under/around the transceiver
helps the tranceiver dissipate thermal energy. A 1.57 mm
PCB thickness is used so that the AFBR-5972Z mounting
clip can be tted properly. For best transceiver perfor-
mance, the decoupling capacitor and ferrite bead should
be placed as close as possible to the tranceiver supply
voltage, as shown in Figure 3(b).
Table 1 describes the input/output interface.The input/
output interface is shown on the top side of the evalua-
tion board.
Figure 2. Schematic of the AFBR-0544Z evaluation board
Figure 3(a). Top side of the AFBR-0544Z evaluation board
Figure 3(b). Bottom side of the AFBR-0544Z evaluation board
Table 1. Input/output description
Name Description Signal Level
TD+ Dierential transmitter inputs LVDS,
LVPECL
TD-
RD+ Dierential receiver outputs LVPECL
RD-
SD Signal detect
DP Dierential receiver output signal for
dierential probe measurement
3V3 Transmitter and receiver power supply 3.3 V
GND Transmitter and receiver ground GND
3
3. Electro-Optical Test Conguration
The two basic test congurations for evaluating the AFBR-
5972Z module are shown in Figure 4 (transmitter) and
Figure 5 (receiver). The transceiver module can be char-
acterized for optical/electrical characteristics such as eye
diagram, rise and fall time, jitter, and current consump-
tion. Low loss and matched equal length RF cables should
be used to connect the TD+/- and RD+/- signals to the test
equipment. The current consumption measurement is for
the whole transceiver, transmitter and receiver.
Transmitter Measurement Conguration
Figure 4 shows the transmitter measurement congura-
tion. The transmitter characteristics can be tested for light
optical power (LOP), rise and fall time, and jitter perfor-
mance, including the eye diagram measurement. In this
conguration, the receiver section is not used; however,
it is recommended that RD+ and RD- be terminated with
50 Ω matched loads. It is also recommended that a low
loss and equal length RF cable can be used to connect
TD+ and TD- to the test equipment.
Figure 4. Transmitter measurement setup conguration
Figure 5. Receiver measurement setup conguration
Receiver Conguration
Figure 5 shows the receiver measurement conguration.
The 1 m POF cable, which is provided with the evalua-
tion kit, is used to obtain a transmission link between
transmitter and receiver. The gray simplex connector
is connected to the transmitter, and the blue simplex
connector is connected to the receiver. The receiver char-
acteristics can be tested for current consumption, rise and
fall time, and jitter performance, including an eye diagram
measurement.
Results
The measurements are carried out using the congura-
tion shown in Figure 4 and Figure 5. The pattern generator
is set to a PRBS 27-1 pattern and data rate of 125 Mbit/s
with LVDS compatible dierential signals. The transmitter
light optical power (LOP), measured with an optical power
meter (OPM) at 650 nm, was -5.57 dBm with a current con-
sumption of 78 mA @ 3.3 V supply voltage.
Figure 6 shows the transmitter eye diagram after the
optical-to-electrical converter block.
Figure 7 shows the receiver eye diagram measured with
the dierential probe at DP, as shown in Figure 3(a). The
current consumption is 79 mA. The SD voltage is 1.63 V
with no optical input and 2.33 V with an optical signal.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2015 Avago Technologies. All rights reserved.
AV02-3144EN - May 13, 2015
Figure 6. Transmitter eye diagram Figure 7. Receiver eye diagram
4. Evaluation Board Schematic and Bill of Material (BOM)
The AFBR-0544Z evaluation board electrical schematic is shown in Figure 2, and the bill of materials (BOM) is given in
Table 2.
Table 2. AFBR-0544Z bill of materials
Component Type Value Footprint Comments
3V3 Jack, 2 mm Red
GND Jack, 2 mm Black
SD Jack, 2 mm White
R1, R2, R6, R7, R8 SMD Resistor 130 R0805 Not populated
R3, R10 SMD Resistor 82 R0805 Not populated
R4, R5 SMD Resistor 150 R0805
R9 SMD Resistor 220 R0805
R11 SMD Resistor 10 kΩR0805
C1, C2, C3, C5, C6, C8, C9 SMD Capacitor 100 nF C0805
C4, C7 SMD Capacitor 10 µFC1206 Tantalum
JP1 Pin header 1X02
L1, L2 SMD Inductor 1 µHL0805
LED SMD LED R0805 Green
TD+, TD-, RD+, RD- ST-SMB Farnell, part no. 1608609
AFBR-5972Z Module Datasheet AFBR-5972Z