DS14C232
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SNLS076C –OCTOBER 1999–REVISED APRIL 2013
DS14C232 Low Power +5V Powered TIA/EIA-232 Dual Driver/Receiver
Check for Samples: DS14C232
1FEATURES DESCRIPTION
The DS14C232 is a low power dual driver/receiver
2• Pin Compatible with Industry Standard featuring an onboard DC to DC converter, eliminating
MAX232, LT1081, ICL232 and TSC232 the need for ±12V power supplies. The device only
• Single +5V Power Supply requires a +5V power supply. ICC is specified at 3.0
• Low Power—ICC 3.0 mA Maximum mA maximum, making the device ideal for battery
and power conscious applications. The drivers' slew
• DS14C232C Meets TIA/EIA-232-E (RS-232) and rate is set internally and the receivers feature internal
CCITT V.28 Standards noise filtering, eliminating the need for external slew
• CMOS Technology rate and filter capacitors. The device is designed to
• Receiver Noise Filter interface data terminal equipment (DTE) with data
circuit-terminating equipment (DCE). The driver
• Package Efficiency—2 Drivers and 2 Receivers inputs and receiver outputs are TTL and CMOS
• Available in Plastic DIP, Narrow and Wide compatible. DS14C232C driver outputs and receiver
SOIC Packages inputs meet TIA/EIA-232-E (RS-232) and CCITT V.28
• TIA/EIA-232 Compatible Extended Temperature standards.
Range Option:
– DS14C232T −40°C to +85°C
– DS14C232E/J: −55°C to +125°C
Connection Diagram
Figure 1. 16-Pin PDIP (See NFG Package)- Top View
16-Pin SOIC (See D Package)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1999–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DS14C232
SNLS076C –OCTOBER 1999–REVISED APRIL 2013
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Functional Diagram
Figure 2. Functional Block Diagram
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings(1)(2)
Supply Voltage, VCC −0.3V to 6V
V+Pin (VCC −0.3)V to +14V
V−Pin +0.3V to −14V
Driver Input Voltage −0.3V to (VCC + 0.3V)
Driver Output Voltage (V++ 0.3V) to (V−−0.3V)
Receiver Input Voltage ±25V
Receiver Output Voltage −0.3V to (VCC + 0.3V)
Junction Temperature +150°C
Maximum Package Power Dissipation @ 25°C(3)
NFG Package 1698 mW
D Package 1156 mW
Short Circuit Duration, DOUT Continuous
Storage Temp. Range −65°C to +150°C
Lead Temp. (Soldering, 4 sec.) +260°C
ESD Rating
(HBM, 1.5 kΩ, 100 pF) ≥2.5 kV
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be verified. They are not meant to imply
that the devices should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
(2) Specifications for the 883 version of this product are listed separately on the following pages.
(3) Ratings apply to ambient temperature at +25°C. Above this temperature derate: NFG Package 15.6 mW/°C, and D Package
10.6 mW/°C.
Recommended Operating Conditions Min Max Units
Supply Voltage, VCC 4.5 5.5 V
Operating Free Air Temp. (TA)
DS14C232C 0 +70 °C
DS14C232T −40 +85 °C
Electrical Characteristics(1)
Over recommended operating conditions, unless otherwise specified
Symbol Parameter Conditions Min Typ(2) Max Unit
s
DC TO DC CONVERTER CHARACTERISTICS
V+Positive Power Supply RL= 3 kΩ, C1–C4 = 1.0 μF, DIN = 0.8V 9.0 V
V−Negative Power Supply RL= 3 kΩ, C1–C4 = 1.0 μF, DIN = 2.0V −8.5 V
ICC Supply (VCC) Current No Load 1.0 3.0 mA
DRIVER CHARACTERISTICS
VIH High Level Input Voltage 2 VCC V
VIL Low Level Input Voltage GND 0.8 V
IIH High Level Input Current VIN ≥2.0V −10 +10 μA
IIL Low Level Input Current VIN ≤0.8V −10 +10 μA
VOH High Level Output Voltage RL= 3 kΩ5.0 8.0 V
VOL Low Level Output Voltage RL= 3 kΩ −7.0 −5.0 V
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
unless otherwise specified.
(2) All typicals are given for VCC = 5.0V.
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Electrical Characteristics(1) (continued)
Over recommended operating conditions, unless otherwise specified
Symbol Parameter Conditions Min Typ(2) Max Unit
s
IOS+ Output High Short Circuit VO= 0V, VIN = 0.8V See (3) −30 −15 −5.0 mA
Current
IOS−Output Low Short Circuit VO= 0V, VIN = 2V 5.0 11 30 mA
Current
ROOutput Resistance −2V ≤VO≤+2V, 300 Ω
VCC = 0V = GND
RECEIVER CHARACTERISTICS
VTH Input High Threshold VCC = 5.0V 1.9 2.4 V
Voltage VCC = 5.0V ±10% 1.9 2.6 V
VTL Input Low Threshold 0.8 1.5 V
Voltage
VHY Hysteresis 0.2 0.4 1.0 V
RIN Input Resistance −15V ≤VIN ≤+15V 3.0 4.7 7.0 kΩ
IIN Input Current VIN = +15V +2.14 +3.75 +5.0 mA
VIN = +3V +0.43 +0.64 +1.0 mA
VIN =−3V −1.0 −0.64 −0.43 mA
VIN =−15V −5.0 −3.75 −2.14 mA
VOH High Level Output Voltage VIN =−3V, IO=−3.2 mA 3.5 4.5 V
VIN =−3V, IO=−20 μA 4.0 4.9 V
VOL Low Level Output Voltage VIN = +3V, IO= +3.2 mA 0.15 0.4 V
(3) IOS+and IOS−values are for one output at a time. If more than one output is shorted simultaneously, the device power dissipation may
be exceeded.
Switching Characteristics
Over recommended operating conditions, unless otherwise specified.
Symbol Parameter Conditions Min Typ Ma Units
x
DRIVER CHARACTERISTICS
tPLH Propagation Delay Low to RL= 3 kΩ(Figure 5,Figure 6) 1.0 4.0 μs
High CL= 50 pF
tPHL Propagation Delay High to 1.0 4.0 μs
Low
tSK Skew |tPLH −tPHL| 0.1 1.0 μs
SR1 Output Slew Rate RL= 3 kΩto 7 kΩ, CL= 50 pF See (1) 4.0 30 V/μs
SR2 Output Slew Rate RL= 3 kΩ, CL= 2500 pF 4.5 V/μs
RECEIVER CHARACTERISTICS
tPLH Propagation Delay Low to Input Pulse Width > 10 μs 2.9 6.5 μs
High
tPHL Propagation Delay High to CL= 50 pF 2.5 6.5 μs
Low
tSK Skew |tPLH −tPHL| (Figure 7,Figure 8) 0.4 2.0 μs
tnw Noise Pulse Width Rejected (Figure 7,Figure 8) 0.7 0.5 μs
(1) Slew rate is defined as ΔV/Δt, measured between ±3V level.
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Absolute Maximum Ratings(1)(2)
Supply Voltage, VCC −0.3V to 6V
V+Pin (VCC −0.3)V to +14V
V−Pin +0.3V to −14V
Driver Input Voltage −0.3V to (VCC + 0.3V)
Driver Output Voltage (V++ 0.3V) to (V−−0.3V)
Receiver Input Voltage ±25V
Receiver Output Voltage −0.3V to (VCC + 0.3V)
Maximum Package Power Dissipation @ 25°C(3)
NFE Package 1520 mW
NAJ Package 2000 mW
Short Circuit Duration, DOUT Continuous
Storage Temp. Range −65°C to +150°C
Lead Temp. (Soldering, 4 sec.) +260°C
ESD Rating
(HMB, 1.5 kΩ, 100 pF) ≥2.5 kV
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be verified. They are not meant to imply
that the devices should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
(2) For complete Military Product Specifications, refer to the appropriate SMD or MDS.
(3) Ratings apply to ambient temperature at +25°C. Above this temperature derate: NFE Package 12.2 mW/°C and NAJ Package
13.3 mW/°C.
Recommended Operating Conditions Min Max Units
Supply Voltage, VCC 4.5 5.5 V
Operating Free Air Temp. (TA)
DS14C232E/J −55 +125 °C
Electrical Characteristics(1)
Over recommended operating conditions, unless otherwise specified
Symbol Parameter Conditions Min Max Units
DEVICE CHARACTERISTICS (C1–C4 = 1.0 μF)
ICC Supply (VCC) Current No Load 8.0 mA
DRIVER CHARACTERISTICS
VIH High Level Input Voltage 2 V
VIL Low Level Input Voltage 0.8 V
IIH High Level Input Current VIN ≥2.0V 100 μA
IIL Low Level Input Current VIN = 0V 100 μA
VOH High Level Output Voltage RL= 3 kΩ5.0 V
VOL Low Level Output Voltage RL= 3 kΩ −5.0 V
IOS+ Output High Short Circuit VO= 0V See (2) −25 mA
Current
IOS−Output Low Short Circuit VO= 0V 25 mA
Current
ROOutput Resistance −2V ≤VO≤+2V, TA= 25°C, 300 Ω
VCC = 0V = GND
(1) All typicals are given for VCC = 5.0V.
(2) IOS+and IOS−values are for one output at a time. If more than one output is shorted simultaneously, the device power dissipation may
be exceeded.
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Electrical Characteristics(1) (continued)
Over recommended operating conditions, unless otherwise specified
Symbol Parameter Conditions Min Max Units
RECEIVER CHARACTERISTICS (C1–C4 = 1.0 μF)
VTH Input High Threshold Voltage 3.0 V
VTL Input Low Threshold Voltage 0.2 V
VHY Hysteresis TA= 25°C, +125°C 0.1 1.0 V
TA=−55°C 0.05 1.0 V
RIN Input Resistance VIN = ±3V and ±15V, TA= 25°C 3.0 7.0 kΩ
VOH High Level Output Voltage IO=−3.2 mA 3.5 V
IO=−20 μA 4.0 V
VOL Low Level Output Voltage IO= +3.2 mA 0.4 V
Switching Characteristics
Over recommended operating conditions, unless otherwise specified.
Symbol Parameter Conditions Min Max Units
DRIVER CHARACTERISTICS (C1–C4 = 1.0 μF)
tPLH Propagation Delay Low to High RL= 3 kΩ, CL= 50 pF (Figure 5,Figure 6) 4.0 μs
tPHL Propagation Delay High to Low 4.0 μs
tSK Skew |tPLH −tPHL| 1.0 μs
SR1 Output Slew Rate RL= 3 kΩto 7 kΩ, CL= 2500 pF See (1) 1.5 30 V/μs
RECEIVER CHARACTERISTICS (C1–C4 = 1.0 μF)
tPLH Propagation Delay Low to High Input Pulse Width > 10 μs 8.0 μs
tPHL Propagation Delay High to Low CL= 50 pF 8.0 μs
tSK Skew |tPLH −tPHL| (Figure 7,Figure 8) 2.0 μs
(1) Slew rate is defined as ΔV/Δt, measured between ±3V level.
Connection Diagrams
Figure 3. 16-Lead CDIP Figure 4. 20-Lead LCCC
See NFE Package See NAJ Package
For Complete Military Product Specifications see MDS or SMD
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Parameter Measurement Information
Figure 5. Driver Load Circuit
Figure 6. Driver Switching Waveform
Figure 7. Receiver Load Circuit
A. Receiver AC input waveform for test purposes: tr = tf = 200 ns, VIH = 3V, VIL = −3V, f = 30 kHz.
Figure 8. Receiver Propagation Delays and Noise Rejection
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PIN DESCRIPTIONS
VCC (Pin 16)
Power supply pin for the device, +5V (±10%).
V+ (Pin 2)
Positive supply for TIA/EIA-232-E drivers. Recommended external capacitor: C4-1.0 μF (6.3V). Capacitor value should be larger than 1 μF.
This supply is not intended to be loaded externally.
V−(Pin 6)
Negative supply for TIA/EIA-232-E drivers. Recommended external capacitor: C3-1.0 μF (16V). Capacitor value should be larger than 1 μF.
This supply is not intended to be loaded externally.
C1+, C1−(Pins 1, 3)
External capacitor connection pins. Recommended capacitor: 1.0 μF (6.3V). Capacitor value should be larger than 1 μF.
C2+, C2−(Pins 4, 5)
External capacitor connection pins. Recommended capacitor: 1.0 μF (16V). Capacitor value should be greater than 1 μF.
DIN1, DIN2 (Pins 11, 10)
Driver input pins are TTL/CMOS compatible. Inputs of unused drivers may be left open, an internal active pull-up resistor (500 kΩminimum,
typically 5 MΩ) pulls input HIGH. Output will be LOW for open inputs.
DOUT1, DOUT2 (Pins 14, 7)
Driver output pins conform to TIA/EIA-232-E levels.
RIN1, RIN2 (Pins 13, 8)
Receiver input pins accept TIA/EIA-232-E input voltages (±25V). Receivers feature a noise filter and specified hysteresis of 100 mV.
Unused receiver input pins may be left open. Internal input resistor 4.7 kΩpulls input low, providing a failsafe high output.
ROUT1, ROUT2 (Pins 12, 9)
Receiver output pins are TTL/CMOS compatible. Receiver output HIGH voltage is specified for both CMOS and TTL load conditions.
GND (Pin 15)
Ground Pin.
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Typical Performance Characteristics
DRIVER SLEW RATE
vs
POWER
DRIVER VOH & VOL vs SUPPLY VOLTAGE & LOAD
POWER SUPPLY VOLTAGE CAPACITANCE
Figure 11. Figure 12.
VCC = 5.0V, RL= 3 kΩ, CL= 15 pF (includes jig and probe Ta= 25°C, RL= 5 kΩ, CP= 1 μF, ƒ = 30 KHz
capacitance), CP= 1 μFFigure 13. Figure 14.
SR = 6V/t1 or 6V/t2, whichever is greater.
S1 = 2.0V, VO= VOL Figure 15. Figure 16.
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REVISION HISTORY
Changes from Revision B (April 2013) to Revision C Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 10
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
DS14C232CM OBSOLETE SOIC D 16 TBD Call TI Call TI 0 to 70 DS14C232CM
DS14C232CM/NOPB OBSOLETE SOIC D 16 TBD Call TI Call TI 0 to 70 DS14C232CM
DS14C232CMX/NOPB OBSOLETE SOIC D 16 TBD Call TI Call TI 0 to 70 DS14C232CM
DS14C232CN/NOPB OBSOLETE PDIP NFG 16 TBD Call TI Call TI 0 to 70 DS14C232CN
DS14C232TM OBSOLETE SOIC D 16 TBD Call TI Call TI -40 to 85 DS14C232TM
DS14C232TM/NOPB OBSOLETE SOIC D 16 TBD Call TI Call TI -40 to 85 DS14C232TM
DS14C232TMX NRND SOIC D 16 TBD Call TI Call TI -40 to 85 DS14C232TM
DS14C232TMX/NOPB OBSOLETE SOIC D 16 TBD Call TI Call TI -40 to 85 DS14C232TM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
MECHANICAL DATA
N0016E
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N16E (Rev G)
NFG0016E
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