2003-2012 Microchip Technology Inc. DS21797L-page 1
93AA86A/B/C, 93LC86A/B/C,
93C86A/B/C
Device Selection Table
Features:
• Low-Power CMOS Technology
• ORG Pin to Select Word Size for ‘86C’ Version
• 2048 x 8-bit Organization ‘A’ Devices (no ORG)
• 1024 x 16-bit Organization ‘B’ Devices (no ORG)
• Program Enable Pin to Write-Protect the Entire
Array (‘86C’ version only)
• Self-tImed Erase/Write Cycles (including
Auto-Erase)
• Automatic Erase All (ERAL) before Write All
(WRAL)
• Power-On/Off Data Protection Circuitry
• Industry Standard 3-Wire Serial I/O
• Device Status Signal (Ready/Busy)
• Seque nti al Read Fun cti on
• 1,000,000 E/W Cycles
• Data Retention > 200 Years
• Pb-free and RoHS Compliant
• Temperature Ranges Supported:
Pin Function Table
Description:
The Microchip Technology Inc. 93XX86A/B/C devices
are 16K bit low-voltage serial Electrically Erasable
PROMs (EEPROM). Word-selectable devices such as
the 93XX86C are dependent upon external logic
levels driving the ORG pin to set word size. The
93XX86A devices provide dedicated 8-bit memory
organization, while the 93XX86B devices provide
dedicated 16-bit memory organization. A Program
Enable (PE) pin allows the user to write-protect the
entire memory array. Advanced CMOS technology
makes these devices ide al for low-power, nonvolat ile
memory applications. The entire 93XX Series is
available in standard packages inclu ding 8-lead PDIP
and SOI C, and adv anced packaging in cluding 8-l ead
MSOP, 6- lead SOT-23, 8-lead 2x3 DFN /TDFN and 8-
lead TSSOP. All packages are Pb-free (Matte Tin)
finish.
Part
Number VCC Range ORG Pin PE Pin Word Size Temp Ranges Packages
93AA86A 1.8-5.5 No No 8-bit I P, SN, ST, MS, OT
93AA86B 1.8-5-5 No No 16-bit I P, SN, ST, MS, OT
93L C86A 2.5 -5.5 No No 8-bit I, E P, SN, ST, MS, OT
93L C86B 2.5 -5.5 No No 16-bit I, E P, SN, ST, MS, OT
93C86A 4.5-5.5 No No 8-bit I, E P, SN, ST, MS, OT
93C86B 4.5-5.5 No No 16-bit I, E P, SN, ST, MS, OT
93AA86C 1.8-5.5 Yes Yes 8- or 16-bit I P, SN, ST, MS, MC, MN
93LC86C 2.5-5.5 Yes Yes 8- or 16-bit I, E P, SN, ST, MS, MC, MN
93C86C 4.5-5.5 Yes Yes 8- or 16-bit I, E P, SN, ST, MS, MC, MN
- Industrial (I) -40°C to +85°C
- Automotive (E)-40°C to +125°C
Name Function
CS Chip Select
CLK Serial Data Clock
DI Serial Data Input
DO Serial Data Output
VSS Ground
PE Program Enable – 93XX86C only
ORG M emory Co nfigura tion – 93X X86C on ly
VCC Power Supply
16K Microwire Compatible Serial EEPROM
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 2 2003-2012 Microchip Technology Inc.
Package Types (not to scale)
CS
CLK
DI
DO
1
2
3
4
8
7
6
5
V
CC
PE
(1)
ORG
(1)
V
SS
PDIP/SOIC
(P, SN)
TSSOP/MSOP
CS
CLK
DI
DO
1
2
3
4
8
7
6
5
V
CC
PE
(1)
ORG
(1)
V
SS
(ST, MS)
SOT-23
DO
V
SS
DI
1
2
3
6
5
4
V
CC
CS
CLK
(OT)
DFN/TDFN
CS
CLK
DI
DO
PE
ORG
VSS
VCC
8
7
6
5
1
2
3
4
(MC, MN)
Note 1:
93XX86C only.
2003-2012 Microchip Technology Inc. DS21797L-page 3
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
1.0 ELECTRICAL CHARAC TERISTICS
Absolute Maximum Ratings (†)
VCC.............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ..........................................................................................................-0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins 4kV
TABLE 1-1: DC CHARACTERISTICS
Note: † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and functional operation of the device at those or any other
conditi ons abo ve those in di cat ed in the opera tio nal listin gs of this sp ec ifi cat ion is no t im pli ed. Exposu re to
maximum rating conditions for extended periods may affect device reliability.
All parameters apply over the specified
ranges unless otherwise noted. Industri al (I): TA = -40°C to +85°C, VCC = +1.8V to 5.5V
Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to 5.5V
Param.
No. Symbol Parameter Min. Typ. Max. Units Conditions
D1 VIH1
VIH2High-lev el inp ut vol t ag e 2.0
0.7 VCC —
—VCC +1
VCC +1 V
VVCC 2.7V
VCC < 2.7V
D2 VIL1
VIL2Low-level input voltage -0.3
-0.3 —
—0.8
0.2 VCC V
VVCC 2.7V
VCC < 2.7V
D3 VOL1
VOL2Low-level output voltage —
——
—0.4
0.2 V
VIOL = 2.1 mA, VCC = 4 .5V
IOL = 100 A, VCC = 2.5V
D4 VOH1
VOH2High-lev el outp ut vol t age 2.4
VCC - 0.2 —
——
—V
VIOH = -400 A, VCC = 4.5V
IOH = -100 A, VCC = 2.5V
D5 ILI Input leakage current — — ±1 AVIN = VSS or VCC
D6 ILO Output lea ka ge cur r ent — — ±1 AVOUT = VSS or VCC
D7 CIN,
COUT Pin capacitance (all inputs/
outputs) ——7pFVIN/VOUT = 0V (Note 1)
TA = 25°C, FCLK = 1 MHz
D8 ICC write Write current —
——
500 3
—mA
AFCLK = 3 MHz, VCC = 5.5V
FCLK = 2 MHz, VCC = 2.5V
D9 ICC read Read current —
—
—
—
—
100
1
500
—
mA
A
A
FCLK = 3 MHz, VCC = 5.5V
FCLK = 2 MHz, VCC = 3.0V
FCLK = 2 MHz, VCC = 2.5V
D10 ICCS Standby current —
——
—1
5A
AI – Temp
E – Temp
CLK = CS = 0V
ORG = DI
PE = VSS or VCC
(Note 2) (Note 3)
D11 VPOR VCC voltage detect —
—1.5
3.8 —
—V
V
(Note 1)
93AA86A/B/C, 93LC86A/B/C
93C86A/B/C
Note 1: This parameter is periodically sampled and not 100% tested.
2: ORG and PE pin not available on ‘A’ or ‘B’ versions.
3: Ready/Busy status must be cleared from DO; see Section 3.4 “Data Out (DO)”.
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 4 2003-2012 Microchip Technology Inc.
TABLE 1-2: AC CHARACTERISTICS
All paramet ers apply over th e spec ified
ranges unless otherwise noted. Industrial (I): TA = -40°C to +85°C, VCC = +1.8V to 5.5V
Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to 5.5V
Param.
No. Symbol Parameter Min. Max. Units Conditions
A1 FCLK Clock frequency — 3
2
1
MHz
MHz
MHz
4.5V VCC < 5.5V
2.5V VCC < 4.5V
1.8V VCC < 2.5V
A2 TCKH Clock high time 200
250
450
—ns
ns
ns
4.5V VCC < 5.5V
2.5V VCC < 4.5V
1.8V VCC < 2.5V
A3 TCKL Clock low time 100
200
450
—ns
ns
ns
4.5V VCC < 5.5V
2.5V VCC < 4.5V
1.8V VCC < 2.5V
A4 TCSS Chip Select set up tim e 50
100
250
—ns
ns
ns
4.5V VCC < 5.5V
2.5V VCC < 4.5V
1.8V VCC < 2.5V
A5 TCSH Chip Select hol d time 0 — ns 1.8V VCC < 5.5V
A6 TCSL Chip Select low tim e 250 — ns 1.8V VCC < 5.5V
A7 TDIS Data input setup time 50
100
250
—ns
ns
ns
4.5V VCC < 5.5V
2.5V VCC < 4.5V
1.8V VCC < 2.5V
A8 TDIH Data input hold time 50
100
250
—ns
ns
ns
4.5V VCC < 5.5V
2.5V VCC < 4.5V
1.8V VCC < 2.5V
A9 TPD Data output delay time — 100
250
400
ns
ns
ns
4.5V VCC < 5.5V, CL = 100 pF
2.5V VCC < 4.5V, CL = 100 pF
1.8V VCC < 2.5V, CL = 100 pF
A10 TCZ Data output disable time — 100
200 ns
ns 4.5V VCC < 5.5V, (Note 1)
1.8V VCC < 4.5V, (Note 1)
A11 TSV Status valid time — 200
300
500
ns
ns
ns
4.5V VCC < 5.5V, CL = 100 pF
2.5V VCC < 4.5V, CL = 100 pF
1.8V VCC < 2.5V, CL = 100 pF
A12 TWC P rogram cycle time — 5 ms Erase/Write mode (AA and LC
versions)
A13 TWC — 2 ms E rase/Write mode
(93C versions)
A14 TEC — 6 ms ERAL mode, 4.5V VCC 5.5V
A15 TWL — 15 ms WRAL mode, 4.5V VCC 5.5V
A16 — Endurance 1M — cycles 25°C, VCC = 5.0V, (Note 2)
Note 1: This parameter is periodically sampled and not 100% tested.
2: This application is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model, which may be obtained from Microchip’s web
site at www.microchip.com.
2003-2012 Microchip Technology Inc. DS21797L-page 5
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
FIGU RE 1-1 : SYNCH R ON OUS DA TA TIMI NG
TABLE 1-3: INSTRUCTION SET FOR X16 ORGANIZATION (93XX86B OR 93XX86C WITH ORG = 1)
TABLE 1-4: INSTRUCTION SET FOR X8 ORGANIZATION (93XX86A OR 93XX86C WITH ORG = 0)
Instruction SB Opcode Address Data In Data Out Req. CLK
Cycles
READ 1 10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — D15-D0 29
EWEN 1 00 11XXXXXXXX — HighZ 13
ERASE 1 11 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY)13
ERAL 1 00 10XXXXXXXX — (RDY/BSY)13
WRITE 1 01 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D15-D0 (RDY/BSY)29
WRAL 1 00 01XXXXXXXX D15-D0 (RDY/BSY)29
EWDS 1 00 00XXXXXXXX —High-Z 13
Instruction SB Opcode Address Data In Data Out Req. CLK
Cycles
READ 1 10 A10A9A8A7A6A5A4A3A2A1A0 — D7-D0 22
EWEN 1 00 1 1X XXXXXXXX —High-Z 14
ERASE 1 11 A10A9A8A7A6A5A4A3A2A1A0 — (RDY/
BSY)14
ERAL 1 00 1 0X XXXXXXXX —(RDY/
BSY)14
WRITE 1 01 A10A9A8A7A6A5A4A3A2A1A0 D7-D0 (RDY/
BSY)22
WRAL 1 00 0 1X XXXXXXXX D7-D0 (RDY/BSY)22
EWDS 1 00 0 0X XXXXXXXX —High-Z 14
CS VIH
VIL
VIH
VIL
VIH
VIL
VOH
VOL
VOH
VOL
CLK
DI
DO
(Read)
DO
(Program)
TCSS
TDIS
TCKH TCKL
TDIH
TPD
TCSH
TPD
TCZ
Status Valid
TSV
TCZ
Note: TSV is relative to CS.
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 6 2003-2012 Microchip Technology Inc.
2.0 FUNCTIONAL DESCRIPTION
When the ORG pin (93XX86C) is connected to VCC,
the (x16) org anization is selected. When it is conne cted
to ground, the (x8) organization is selected. Instruc-
tions, add res se s and wr ite dat a are cl oc ke d into the DI
pin on the rising edge of the clock (CLK). The DO pin i s
normally held in a High-Z state except when reading
data from the device, or when checking the Ready/
Busy status during a programming operation. The
Ready/Busy status can be verified during an Erase/
Wr ite operat ion by pol ling the DO pin; DO lo w indicate s
that programming is still in progress, while DO high
indicates the device is ready. DO will enter the High-Z
state on the falling edge of CS.
2.1 Start Condition
The Start bit is detected by the device if CS and DI are
both high with respect to the positive edge of CLK for
the first time.
Before a Start condition is detected, CS, CLK and DI
may change in any combination (except to that of a
Start condition), without resulting in any device
operation (Read, Write, Erase, EWEN, EWDS, ERAL
or WRAL). As soon as CS is high, the device is no
longer in Standby mode.
An instruction following a Start condition will only be
execut ed if the requi r ed op co de, address and data bits
for any particular instruction are clocked in.
2.2 Data In/Data Out (DI/DO)
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the read operation, if A0 is a logic high
level. Under such a condition the voltage level seen at
Data Out is undefi ned and will depend upon the relative
impedances of Data Out and the signal source driving
A0. The higher the current sourcing capability of the
driver, the higher the voltage at the Data Out pin. In
order to limit this current, a resistor should be
connected between DI and DO.
2.3 Data Protection
All modes of operation ar e inhibi ted when VCC is below
a typical voltage of 1.5V for ‘93AA’ and ‘93LC’ devices
or 3.8V for ‘93C’ devices .
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
Aft er power-up the device i s automatic ally in t he EWDS
mode. Therefore, an EWEN instruction must be
performed before the initial ERASE or WRITE instruction
can be execu ted .
Block Diagram
Note: When prepa ring to transm it an instruc tion,
either the CLK or DI signal levels must be
at a logi c low as CS is tog gled active hi gh.
Note: For added protection, an EWDS comman d
should be performed after every write
operation and an external 10 k pull-
down protection resistor should be added
to the CS pin.
Note: To prevent acci dental wri tes to the array in
the 93XX86C devices, set the PE pin to a
logic low.
Memory
Array
Data Register
Mode
Decode
Logic
Clock
Register
Address
Decoder
Address
Counter
Output
Buffer DO
DI
ORG*
CS
CLK
VCC VSS
PE*
*ORG and PE inputs are not available on
A/B devices.
2003-2012 Microchip Technology Inc. DS21797L-page 7
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
2.4 Erase
The ERASE instruction forces all data bits of the
specified address to the logical ‘1’ state. The rising
edge of CLK before the last address bit initiates the
write cycle.
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logi cal ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
FIGU RE 2-1 : ERASE T I MI NG
2.5 Erase All (ERAL)
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle
is identical to the erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed. The
rising edge of CLK before the last data bit initiates the
write cycle. Clocking of the CLK pin is not necessary
after the device has entered the ERAL cycle.
The DO pin indicates the Ready/Busy status of the
device , if CS is brought high afte r a mini mum of 2 50 ns
low ( TCSL).
VCC must be 4.5V for proper operation of ERAL.
FIGU RE 2-2 : ERAL TIM IN G
Note: After the Erase cycle is complete, issuing
a S tart bit and then taking CS low will clear
the Ready/Busy status f rom DO .
CS
CLK
DI
DO
TCSL
Check Status
111ANAN-1 AN-2 ••• A0
TSV TCZ
Busy Ready High-Z
TWC
High-Z
Note: After the ERAL command is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
CS
CLK
DI
DO
TCSL
Check Status
10010x
••• x
TSV TCZ
Busy Ready High-Z
TEC
High-Z
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 8 2003-2012 Microchip Technology Inc.
2.6 Erase/Write Disable and Enable
(EWDS/EWEN)
The 93XX86A/B/C powers up in the Erase/Write
Disable (EWDS) state. All programming modes must be
precede d by an Erase/W rite Ena ble (EWEN) ins truction.
Once the EWEN instruction is executed, programming
remains enabled until an EWDS instruction is executed
or VCC is removed from the device.
To protect against accidental data disturbance, the
EWDS instru ction can be used to di sable all Erase/W ri te
functions and should follow all programming
operations. Execution of a READ instruction is
independent of both the EWEN and EWDS instructions.
FIGURE 2-3: EWDS TIMING
FIGURE 2-4: EWEN T IM ING
2.7 Read
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit prece des the 8-bit (If ORG pin is low o r A-Version
devices) or 16-bit (If ORG pin is high or B-version
devices) output string.
The output data bits will toggle on the rising edge of the
CLK and are stable after the specified time delay (TPD).
Sequential read is possible when CS is held high. The
memory data will automatically cycle to the next register
and output se qu ential ly.
FIGU RE 2- 5 : READ TIMING
CS
CLK
DI 100 0 0 x ••• x
TCSL
1x
CS
CLK
DI 00 11x
TCSL
•••
CS
CLK
DI
DO
110
AN••• A0
High-Z 0Dx ••• D0 Dx ••• D0 •••
Dx D0
2003-2012 Microchip Technology Inc. DS21797L-page 9
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
2.8 Write
The WRITE instruction is followed by 8 bits (If ORG is
low or A-v ersi on device s) or 16 bits (I f OR G pi n is high
or B-versi on devices) of data whi ch are writt en into th e
specified address. The self-timed auto-erase and
programming cycle is initiated by the rising edge of CLK
on the last data bit.
The DO pin indicates the Ready/Busy status of the
device , if CS is brought high afte r a mini mum of 2 50 ns
low (TCSL). DO at logi cal ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
FIGU RE 2-6 : W RI T E TI MI NG
Note: The write sequence requires a logic high
signal on the PE pin prior to the rising
edge of the last data bit.
Note: Aft er the W rite cycle is complete, is suing a
Start bit and then taking CS low will clear
the Ready/Busy status f rom DO
CS
CLK
DI
DO
101AN••• A0 Dx ••• D0
Busy Ready High-Z
High-Z
TWC
TCSL
TCZ
TSV
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 10 2003-2012 Microchip Technology Inc.
2.9 Write All (WRAL)
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
The self-timed auto-erase and programming cycle is
initiated by the rising edge of CLK on the last data bit.
Clocking of the CLK pin is not necessary after the
device has entered the WRAL cycle. The WRAL
command does include an automatic ERAL cycle for
the device. Therefore, the WRAL instruction does not
require a n ERAL ins tructi on, but the ch ip must b e in th e
EWEN status.
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low ( TCSL).
VCC must be 4.5V for proper operation of WRAL.
FIGU RE 2- 7 : WRAL TIM IN G
Note: The write sequence requires a logic high
signal on the PE pin prior to the rising
edge of the last data bit.
Note: After the Write All cycle is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
CS
CLK
DI
DO HIGH-Z
10001x
••• xDx ••• D0
High-Z Busy Ready
TWL
TCSL
TSV TCZ
2003-2012 Microchip Technology Inc. DS21797L-page 11
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
3.0 PIN DESCRIPTIONS
TABLE 3-1: PIN DESCRIPTIONS
3.1 Chip Select (CS)
A high level selects the device; a low level deselects
the dev ice and fo rces it i nto S t andby mode. H owever , a
progra mmin g c yc le which is al read y i n pro gres s wi ll be
completed, regardless of the Chip Select (CS) input
signal . I f C S is brou ght low duri ng a progra m c yc le, th e
device will go into Standby mode as soon as the
programming cycle is completed.
CS must be low for 250 ns minimum (TCSL) between
consecutive instructions. If CS is low, the internal
control logic is held in a Reset status.
3.2 Serial Clock (CLK)
The Serial Clock is used to synchronize the communi-
cation between a master device and the 93XX series
device. Opcodes, address and data bits are clocked in
on the pos itive edge of CL K. Dat a bit s are also c locke d
out on the positive edge of CLK.
CLK can be stopped anywhere in the transmission
sequence (at high or low level) and can be continued
anytime with respect to clock high time (TCKH) and
clock low time (TCKL). This gives the controlling master
freedom in preparing opcode, address and data.
CLK is a “don't care” if CS is l ow (devic e desele cted). If
CS is high, but the Start condition has not been
detected (DI = 0), any number of clock cycles can be
received by the device without changing its status (i.e.,
waiting for a Start condition).
CLK cycles are not required during the self-timed write
(i.e., auto erase/write) cycle.
After detection of a S tart c ondition the specified number
of clock cycles (respectively low-to-high transitions of
CLK) must be provided. These clock cycles are
required to clock in all required opcode, address and
data bit s b efo re a n instruct ion is ex ecuted. CLK and DI
then bec om e “do n't ca re” i npu t s wa iti ng fo r a new Start
condition to be detected.
3.3 Data In (DI)
Data In (DI) is used to clock in a Start bit, opcode,
address and data, synchronously with the CLK input.
3.4 Data Out (DO)
Dat a Out (DO) is used in the Re ad mode to outpu t dat a
synchronously with the CLK input (TPD after the
positive edge of CLK).
This pin also provides Ready/Busy status information
during erase and write cycles. Ready/Busy status
information is available on the DO pin if CS is brought
high after being low for minimum Chip Select low time
(TCSL), and an erase or write operation has been
initiated.
The Status signal is not available on DO if CS is held
low during the entire erase or write cycle. In this case,
DO is in the High-Z mode. If status is checked after the
erase/write cycle, the data line will be high to indicate
the device is ready.
3.5 Organization (ORG)
When the ORG pin is connected to VCC or logic high,
the (x16) memory organization is selected. When the
ORG pin is tied to VSS or logic low, the (x8) memory
organization is selected. For proper operation, ORG
must be tied to a valid logic level.
93XX86A devices are always (x8) organization and
93XX86B devices are always (x16) organization.
Name PDIP SOIC TSSOP MSOP DFN(1) TDFN(1) SOT-23 Function
CS 1 1 1 1 1 1 5 Chip Select
CLK 2 2 2 2 2 2 4 Serial Clock
DI 3 3 3 3 3 3 3 Dat a In
DO 4 4 4 4 4 4 1 Data Out
VSS 5 5 5 5 5 5 2 Ground
ORG 6 6 6 6 6 6 — Organization/93XX86C only
PE 7 7 7 7 7 7 — Program Enable/93XX86C only
VCC 8 8 8 8 8 8 6 Power Supply
Note 1: The exposed pad on the DFN/TDFN package may be connected to Vss or left floating.
Note: After a programming cycle is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 12 2003-2012 Microchip Technology Inc.
3.6 Program Enable (PE)
This pin allows the user to enable or disable the ability
to write data to the memory array. If the PE pin is tied
to VCC, the device ca n be progra mmed . If the PE pin is
tied to VSS, programming will be inhibited. This pin
cannot be floated, it must be tied to VCC or VSS. PE is
not available on 93XX86A or 93XX86B. On those
devices, programming is always enabled.
2003-2012 Microchip Technology Inc. DS21797L-page 13
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
4.0 PACKAGING INFORMATION
4.1 Package Marking Information
Example:
6-Lead SOT-23
8-Lead MSOP (150 mil) Example:
XXXXXXT
YWWNNN 3L86CI
5281L7
XXNN 5EL7
T/XXXNNN
XXXXXXXX
YYWW
8-Lead PDIP
8-Lead SOIC
XXXXYYWW
XXXXXXXT
NNN
XXXX
TYWW
8-Lead TSSOP
NNN
I/P 1L7
93LC86C
0528
Example:
Example:
SN 0528
93LC86CI
1L7
1L7
L86C
I528
Example:
3
e
3
e
8-Lead 2x3 DFN
3E4
528
L7
Example:
XXX
YWW
NN
8-Lead 2x3 TDFN
EE4
528
L7
Example:
XXX
YWW
NN
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 14 2003-2012 Microchip Technology Inc.
Part Number
1st Line Marking Codes
TSSOP MSOP SOT-23 DFN TDFN
I Temp. E Temp. I Temp. E Temp. I Temp. E Temp.
93AA86A A86A 3A86AT 5BNN — — — — —
93AA86B A86B 3A86BT 5LNN — — — — —
93AA86C A86C 3A86CT — — 3E1 — EE1 —
93LC86A L86A 3L86AT 5ENN 5FNN — — — —
93LC86B L86B 3L86BT 5PNN 5RNN — — — —
93LC86C L86C 3L86CT — — 3E4 — EE4 EE5
93C86A C86A 3C86AT 5HNN 5JNN — — — —
93C86B C86B 3C86BT 5TNN 5UNN — — — —
93C86C C86C 3C86CT — — 3E7 — EE7 EE8
Note: T = Temperature grade (I, E)
NN = Alphanumeric traceability code
Legend: XX...X Part number or part number code
T Temperature (I, E)
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week c ode (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
Note: In the ev ent the ful l Micro chip p art num ber can not be ma rked on one line , it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
2003-2012 Microchip Technology Inc. DS21797L-page 15
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 16 2003-2012 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2003-2012 Microchip Technology Inc. DS21797L-page 17
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 18 2003-2012 Microchip Technology Inc.
b
E
4
N
E1
PIN 1 ID BY
LASER MARK
D
123
e
e1
A
A1
A2 c
L
L1
φ
2003-2012 Microchip Technology Inc. DS21797L-page 19
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 20 2003-2012 Microchip Technology Inc.
!"##$% !
N
E1
NOTE 1
D
123
A
A1
A2
L
b1
b
e
E
eB
c
2003-2012 Microchip Technology Inc. DS21797L-page 21
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 22 2003-2012 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2003-2012 Microchip Technology Inc. DS21797L-page 23
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
"&'()#$%!*
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 24 2003-2012 Microchip Technology Inc.
++,"-(-$%
D
N
E
E1
NOTE 1
12
b
e
c
A
A1
A2
L1 L
φ
2003-2012 Microchip Technology Inc. DS21797L-page 25
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 26 2003-2012 Microchip Technology Inc.
.',/0*"11#()$% .
D
N
E
NOTE 1
12
EXPOSED PAD
NOTE 1
21
D2
K
L
E2
N
e
b
A3 A1
A
NOTE 2
BOTTOM VIEW
TOP VIEW
2003-2012 Microchip Technology Inc. DS21797L-page 27
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 28 2003-2012 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2003-2012 Microchip Technology Inc. DS21797L-page 29
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 30 2003-2012 Microchip Technology Inc.
.',/0"11#(23$% .
2003-2012 Microchip Technology Inc. DS21797L-page 31
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
APPENDIX A: REVISION HISTORY
Revision A (5/2003)
Initial R ele as e.
Revision B (7/2003)
Revised DC Char. Param. D8; Revised Figures 2.1,
2.2, 2.6, 2.7; Revised Section 3.6; Revised Product ID
System.
Revision C (12/2003)
Corrections to Section 1.0, Electrical Characteristics.
Section 4.1, 6-Lead SOT-23 package to OT.
Revision D (2/2004)
Correc tions to Devi ce Sel ection Table, Table 1-1, Table
1-2, Section 2.4, Section 2.5, Section 2.8 and Section
2.9. Added note to Figure 2-7.
Revision E (3/2005)
Added DFN package.
Revision F (4/2005)
Added notes throughout.
Revision G (1/2006)
Revised note in Sections 2.8 and 2.9.
Replaced DFN package drawing.
Revision H (10/2007)
Added SN p ackag e to Device Sel ection Table; Revise d
Pin Function Table; Revised Package Types; Revised
Table 3-1; Replaced Package Drawings; Revised
Product ID System.
Revision J (5/2008)
Revised Figures 2-1, 2-2, 2-6 and 2-7; Revised
Package Marking Information; Replaced Package
Drawings.
Revision K (1/2012)
Added TDFN package; Revised Product ID System.
Revision L (04/2012)
Revised Device Selection Table; Added Note 1 to
Package T ype s Diagra m; Revise d Markin g Code t able;
Revised Product ID System.
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 32 2003-2012 Microchip Technology Inc.
NOTES:
2003-2012 Microchip Technology Inc. DS21797L-page 33
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
THE MICROCHIP WEB SITE
Microc hip pro vides onl ine s upport v ia our W WW site at
www.microchip.com. This w eb si te i s us ed as a m ean s
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
•Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
•General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online dis cu ss io n gr oups, Microchip con sultant
program member listing
•Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars a nd even ts, listings of
Microchip sales offices, distributors and factory
representatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specif ied produ ct family or develo pment tool of interes t.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
CUSTOMER SUPP ORT
Users of Microchip products can receive assistance
through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
• Development Systems Information Line
Customers should contact their distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical s upport is a vailable through the web si te
at: http://microchip.com/support
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 34 2003-2012 Microchip Technology Inc.
READER RESP ONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip
product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our
documentation can better serve you, please FAX your comments to the Technical Publications Manager at
(480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
TO: Technical Publications Manager
RE: Reader Response Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
FAX: (______) _________ - _________
DS21797L93AA86A/B/C, 93L C86A /B/C, 93C86A/B/C
1. W hat are the best fe atures of this doc ument?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
2003-2012 Microchip Technology Inc. DS21797L-page 35
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: 93AA86A: 16K 1.8V Mi crowire Serial EEPROM (x8)
93AA86B: 16K 1.8V Microwire Serial EEPROM (x16)
93AA86C: 16K 1.8V Microwire Serial EEPROM w/ORG
93LC86A: 16K 2.5V Microwire Serial EEPROM (x8)
93LC86B: 16K 2.5V Microwire Serial EEPROM (x16)
93LC86C: 16K 2.5V Microwire Serial EEPROM w/ORG
93C86A: 16K 5.0V Microwire Serial EEPROM (x8)
93C86B: 16K 5.0V Microwire Serial EEPROM (x16)
93C86C: 16K 5.0V Microwire Serial EEPROM w/ORG
Tape & Reel: Blank = Standard packaging
T=Tape & Reel
Temperature Range: I = -40°C to +85°C
E = -40°C to +125°C
Package: MS = Plastic MSOP (Micro Small outline, 8-lead)
OT = Plastic SOT-23, 6-lead (Tape & Reel onl y)
P = Plastic DIP (300 mil body), 8-lead
SN = Plastic SOIC (3.90 mm body), 8-lead
ST = Pla stic TSSOP (4.4 mm body), 8-lead
MC = P lastic DFN (2x3x0.90 mm body), 8-lead
MNY(1)= Plastic TDFN (2x3x0.75 mm body), 8-le ad
(Tape & Reel only)
Examples:
a) 93AA86C-I/P: 16K, 2048x8 or 1024x16 Serial
EEPROM, PDIP package, 1.8V
b) 93AA86AT -I/OT: 16K, 2048x8 S erial EEPROM,
SOT-23 package, tape and reel, 1.8V
c) 93AA86CT-I/MS: 16K, 2048x8 or 1024x16
Serial EEPROM, MSOP package, tape and
reel, 1.8V
a) 93LC86C-I/ST: 16K, 2048x8, 1024x16 Serial
EEPROM, TSSOP package, 2.5V
b) 93LC86BT-I/OT: 16K, 1024x16 Serial
EEPROM, SOT-23 package, tape and reel,
2.5V
c) 93LC86CT-E/MNY: 16K, 2048x8 or 1024x16
Serial EEPROM, Automotive temp, TDFN
package, tape and reel, 2.5V
a) 93 C86C-I/MS : 16K, 2048 x8 or 1024 x16 Ser ial
EEPROM, MSOP package, 5.0V
b) 93C86AT-I/OT: 16K, 2048x8 Serial EEPROM,
SOT-23 package, tape and reel, 5.0V
PART NO. X/XX
Package
Temperature
Range
Device
X
Tape & Reel
Note 1: “Y” indicates a Nickel Palladium Gold (NiPdAu) finish.
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
DS21797L-page 36 2003-2012 Microchip Technology Inc.
NOTES:
2012 Microchip Technology Inc. DS21797L-page 37
Information contained in this publication regarding device
applications a nd t he lik e is provid ed only f or your con ve nience
and may be su perseded by updates. I t is y ou r r esponsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPL AB, PIC , PI Cmi cro, PI CSTART,
PIC32 logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology In corporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor ,
MXDEV, MXLAB, SEEVAL and The Embedded Contro l
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, chipKIT,
chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
MPLINK, mTouch, Omniscient Code Generation, PICC,
PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology In corporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2012, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620762165
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that i ts family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such act s
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS21797L-page 38 2003-2012 Microchip Technology Inc.
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technic al Support:
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Tel: 81-66-152-7160
Fax: 81-66-152-9310
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Tel: 81-45-471- 6166
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Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
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Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
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Worldwide Sales and Service
11/29/11
