REV. E
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Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
OP297
Dual Low Bias Current
Precision Operational Amplifier
FEATURES
Low Offset Voltage: 50 ␮V Max
Low Offset Voltage Drift: 0.6 ␮V/ⴗC Max
Very Low Bias Current: 100 pA Max
Very High Open-Loop Gain: 2000 V/mV Min
Low Supply Current (Per Amplifier): 625 ␮A Max
Operates From ⴞ2 V to ⴞ20 V Supplies
High Common-Mode Rejection: 120 dB Min
Pin Compatible to LT1013, AD706, AD708, OP221,
LM158, and MC1458/1558 with Improved Performance
APPLICATIONS
Strain Gage and Bridge Amplifiers
High Stability Thermocouple Amplifiers
Instrumentation Amplifiers
Photo-Current Monitors
High Gain Linearity Amplifiers
Long-Term Integrators/Filters
Sample-and-Hold Amplifiers
Peak Detectors
Logarithmic Amplifiers
Battery-Powered Systems
PIN CONNECTIONS
8
7
6
5
1
2
3
4
OUTA
–INA
+INA
V+
OUTB
–INB
+INBV–
BA
GENERAL DESCRIPTION
The OP297 is the first dual op amp to pack precision performance
into the space-saving, industry-standard, 8-lead SOIC package.
Its combination of precision with low power and extremely low
input bias current makes the dual OP297 useful in a wide variety
of applications.
TEMPERATURE (ⴗC)
INPUT CURRENT (pA)
60
–60
–75 –50 125–25 0 25 50 75 100
40
20
0
–20
–40
IB–
IB+
IOS
VS = ⴞ15V
VCM = 0V
Figure 1. Low Bias Current over Temperature
Precision performance of the OP297 includes very low offset,
under 50 µV, and low drift, below 0.6 µV/°C. Open-loop gain
exceeds 2000 V/mV, ensuring high linearity in every application.
Errors due to common-mode signals are eliminated by the
OP297’s common-mode rejection of over 120 dB, which mini-
mizes offset voltage changes experienced in battery-powered
systems. Supply current of the OP297 is under 625 µA per
amplifier, and the part can operate with supply voltages as low
as ±2 V.
The OP297 uses a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all temperatures.
This is in contrast to FET input op amps whose bias currents
start in the picoamp range at 25°C, but double for every 10°C
rise in temperature, to reach the nanoamp range above 85°C.
Input bias current of the OP297 is under 100 pA at 25°C and is
under 450 pA over the military temperature range.
Combining precision, low power, and low bias current, the OP297
is ideal for a number of applications, including instrumentation
amplifiers, log amplifiers, photodiode preamplifiers, and long-
term integrators. For a single device, see the OP97; for a quad,
see the OP497.
INPUT OFFSET VOLTAGE (␮V)
NUMBER OF UNITS
400
0
–100 –80 60–60 –40 –20 0 20 40
300
200
100
80 100
T
A
= 25ⴗC
V
S
= ⴞ15V
V
CM
= 0V
1200 UNITS
Figure 2. Very Low Offset
REV. E–2–
OP297–SPECIFICATIONS
OP297E OP297F OP297G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage V
OS
25 50 50 100 80 200 µV
Long-Term Input
Voltage Stability 0.1 0.1 0.1 µV/mo
Input Offset Current I
OS
V
CM
= 0 V 20 100 35 150 50 200 pA
Input Bias Current I
B
V
CM
= 0 V 20 ±100 35 ±150 50 ±200 pA
Input Noise Voltage e
n
p-p 0.1 Hz to 10 Hz 0.5 0.5 0.5 µV p-p
Input Noise Voltage Density e
n
f
O
= 10 Hz 20 20 20 nV/√Hz
f
O
= 1000 Hz 17 17 17 nV/√Hz
Input Noise Current Density i
n
f
O
= 10 Hz 20 20 20 fA/√Hz
Input Resistance
Differential Mode R
IN
30 30 30 MΩ
Input Resistance
Common-Mode R
INCM
500 500 500 GΩ
Large-Signal V
O
= ±10 V
Voltage Gain A
VO
R
L
= 2 kΩ2000 4000 1500 3200 1200 3200 V/mV
Input Voltage Range*V
CM
±13 ±14 ±13 ±14 ±13 ±14 V
Common-Mode Rejection CMRR V
CM
= ±13 V 120 140 114 135 114 135 dB
Power Supply Rejection PSRR V
S
= ±2 V to ±20 V 120 130 114 125 114 125 dB
Output Voltage Swing V
O
R
L
= 10 kΩ±13 ±14 ±13 ±14 ±13 ±14 V
R
L
= 2 kΩ±13 ±13.7 ±13 ±13.7 ±13 ±13.7 V
Supply Current per Amplifier I
SY
No Load 525 625 525 625 525 625 µA
Supply Voltage V
S
Operating Range ±2±20 ±2±20 ±2±20 V
Slew Rate SR 0.05 0.15 0.05 0.15 0.05 0.15 V/µs
Gain Bandwidth Product GBWP A
V
= +1 500 500 500 kHz
Channel Separation CS V
O
= 20 V p-p 150 150 150 dB
f
O
= 10 Hz
Input Capacitance C
IN
333pF
*Guaranteed by CMR test.
Specifications subject to change without notice.
ELECTRICAL CHARACTERISTICS
OP297E OP297F OP297G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage V
OS
35 100 80 300 110 400 µV
Average Input Offset
Voltage Drift TCV
OS
0.2 0.6 0.5 2.0 0.6 2.0 µV/°C
Input Offset Current I
OS
V
CM
= 0 V 50 450 80 750 80 750 pA
Input Bias Current I
B
V
CM
= 0 V 50 ±450 80 ±750 80 ±750 pA
Large-Signal Voltage Gain A
VO
V
O
= ±10 V,
R
L
= 2 kΩ1200 3200 1000 2500 800 2500 V/mV
Input Voltage Range*V
CM
±13 ±13.5 ±13 ±13.5 ±13 ±13.5 V
Common-Mode Rejection CMRR V
CM
= ±13 114 130 108 130 108 130 dB
Power Supply Rejection PSRR V
S
= ±2.5 V
to ±20 V 114 0.15 108 0.15 108 0.3 dB
Output Voltage Swing V
O
R
L
= 10 kΩ±13 ±13.4 ±13 ±13.4 ±13 ±13.4 V
Supply Current per Amplifier I
SY
No Load 550 750 550 750 550 750 µA
Supply Voltage V
S
Operating Range ±2.5 ±20 ±2.5 ±20 ±2.5 ±20 V
*Guaranteed by CMR test.
Specifications subject to change without notice.
(@ VS = ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
(@ VS = ⴞ15 V, –40ⴗC ⱕ TA ⱕ +85ⴗC for OP297E/F/G, unless otherwise noted.)
REV. E
OP297
–3–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
OP297 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . 40 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C
P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
OP297E (Z) . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
OP297F, OP297G (P, S) . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C
P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
Package Types ␪
JA3
␪
JC
Unit
8-Lead CERDIP (Z) 134 12 °C/W
8-Lead PDIP (P) 96 37 °C/W
8-Lead SOIC (S) 150 41 °C/W
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; and functional operation
of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
For supply voltages less than ±20 V, the absolute maximum input voltage is equal
to the supply voltage.
3
JA
is specified for worst case mounting conditions, i.e.,
JA
is specified for device
in socket for CERDIP and PDIP, packages;
JA
is specified for device soldered to
printed circuit board for SOIC package.
V1 20Vp-p @ 10Hz
50k⍀
CHANNEL SEPARATION = 20 log
V1
V2/10000
)
)
1/2
OP297
2k⍀
1/2
OP297
50⍀
V2
Figure 3. Channel Separation Test Circuit
ORDERING GUIDE
Model Temperature Range Package Description Package Options
OP297EZ –40°C to +85°C8-Lead CERDIP Q-8
OP297FP –40°C to +85°C8-Lead PDIP N-8
OP297FS –40°C to +85°C8-Lead SOIC R-8
OP297FS-REEL –40°C to +85°C8-Lead SOIC R-8
OP297FS-REEL7 –40°C to +85°C8-Lead SOIC R-8
OP297GP –40°C to +85°C8-Lead PDIP N-8
OP297GS –40°C to +85°C8-Lead SOIC R-8
OP297GS-REEL –40°C to +85°C8-Lead SOIC R-8
OP297GS-REEL7 –40°C to +85°C8-Lead SOIC R-8
REV. E–4–
OP297
INPUT OFFSET VOLTAGE (pA)
NUMBER OF UNITS
0
–100 –80 60–60 –40 –20 0 20 40
200
100
80 100
1200 UNITS T
A
= 25ⴗC
V
S
= ⴞ15V
V
CM
= 0V
300
400
TPC 1. Typical Distribution of
Input Offset Voltage
TEMPERATURE (ⴗC)
INPUT CURRENT (pA)
60
–60
–75 –50 125–25 0 25 50 75 100
40
20
0
–20
–40
IB–
IB+
IOS
VS = ⴞ15V
VCM = 0V
TPC 4. Input Bias, Offset
Current vs. Temperature
SOURCE RESISTANCE
(
⍀
)
EFFECTIVE OFFSET VOLTAGE (␮V)
10000
10
10 10M
100
1M100k10k1k100
1000
VS = ⴞ15V
VCM = 0V
BALANCED OR UNBALANCED
TA = +25ⴗC
–55ⴗC TA +125ⴗC
TPC 7. Effective Offset Voltage
vs. Source Resistance
INPUT BIAS CURRENT (pA)
NUMBER OF UNITS
0
–100 –80 60–60 –40 –20 0 20 40
250
200
150
100
50
80 100
1200 UNITS T
A
= 25ⴗC
V
S
= ⴞ15V
V
CM
= 0V
TPC 2. Typical Distribution of
Input Bias Current
INPUT CURRENT (pA)
60
–40
–15
–20
40
20
0
V
S
= ⴞ15V
V
CM
= 0V
COMMON-MODE VOLTAGE (V)
–10 –5 0 5 10 15
I
B
–
I
B
+
I
OS
TPC 5. Input Bias, Offset Current vs.
Common-Mode Voltage
SOURCE RESISTANCE (⍀)
EFFECTIVE OFFSET VOLTAGE DRIFT (␮V/ⴗC)
100
0.1
10
10M1M100k10k1k100
V
S
= ⴞ15V
V
CM
= 0V
BALANCED OR UNBALANCED
100M
1
TPC 8. Effective TCV
OS
vs.
Source Resistance
0
–100
1200 UNITS T
A
= 25ⴗC
V
S
= ⴞ15V
V
CM
= 0V
NUMBER OF UNITS
400
300
200
100
INPUT OFFSET VOLTAGE
(p
A
)
–80 60–60 –40 –20 0 20 40 80 100
TPC 3. Typical Distribution of
Input Offset Current
TIME AFTER POWER APPLIED
(
Minutes
)
DEVIATION FROM FINAL VALUE (␮V)
0012345
ⴞ1
ⴞ3
ⴞ2
TA = 25ⴗC
VS = ⴞ15V
VCM = 0V
TPC 6. Input Offset Voltage
Warm-Up Drift
TIME FROM OUTPUT SHORT (Minutes)
SHORT-CIRCUIT CURRENT (mA)
35
–35 0412 3
20
5
25
30
15
10
0
–30
–25
–20
–15
–10
–5
VS = ⴞ15V
OUTPUT SHORTED
TO GROUND
TA = –55ⴗC
TA = +25ⴗC
TA = +125ⴗC
TA = +125ⴗC
TA = +25ⴗC
TA = –55ⴗC
TPC 9. Short Circuit Current
vs. Time, Temperature
–Typical Performance Characteristics
REV. E
OP297
–5–
SUPPLY VOLTAGE
(
V
)
TOTAL SUPPLY CURRENT (␮A)
1300
800 0ⴞ20
ⴞ5ⴞ10 ⴞ15
1200
1100
1000
900
T
A
= –55ⴗC
T
A
= +25ⴗC
T
A
= +125ⴗC
NO LOAD
TPC 10. Total Supply Current
vs. Supply Voltage
FREQUENCY
(
Hz
)
1000
1
11000
10
10 100
VOLTAGE NOISE DENSITY (nV/ Hz)
10
1
CURRENT NOISE DENSITY (fA/ Hz)
100 100
1000
CURRENT
NOISE
VOLTAGE
NOISE
TA = 25ⴗC
VS = ⴞ2V TO ⴞ15V
TPC 13. Voltage Noise Density and
Current Noise Density vs. Frequency
TA = +25ⴗC
OUTPUT VOLTAGE
(
V
)
DIFFERENTIAL INPUT VOLTAGE (10␮V/DIV)
0
–15
RL = 10k⍀
VS = ⴞ15V
VCM = 0V TA = +125ⴗC
TA = –55ⴗC
–10 –5 0 5 1510
TPC 16. Differential Input
Voltage vs. Output Voltage
FREQUENCY
(
Hz
)
COMMON-MODE REJECTION (dB)
160
40 110
100 1k 10k 100k 1M
140
120
100
80
60
TA = 25ⴗC
VS = ⴞ15V
TPC 11. Common-Mode Rejection
Frequency
SOURCE RESISTANCE (⍀)
10
0.01
10
7
1
TOTAL NOISE DENSITY (nV/ Hz)
10
6
10
5
10
4
10
3
10
2
0.1
T
A
= 25ⴗC
V
S
= ⴞ2V TO ⴞ20V
10Hz
10Hz
1kHz
1kHz
TPC 14. Total Noise Density
vs. Source Resistance
LOAD RESISTANCE
(
⍀
)
OUTPUT SWING (Vp-p)
0
10 10k
100 1k
5
10
15
20
25
30
35
TA = 25ⴗC
VS = ⴞ15V
AVCL = +1
1%THD
fO = 1kHz
TPC 17. Output Swing vs. Load
Resistance
FREQUENCY
Hz
POWER SUPPLY REJECTION (dB)
160
40
0.1 1 1M
10 100 1k 10k 100k
140
120
T
A
= 25ⴗC
V
S
= ⴞ15V
⌬V
S
= 10Vp-p
60
80
100
TPC 12. Power Supply Rejection vs.
Frequency
LOAD RESISTANCE
(
k⍀
)
OPEN-LOOP GAIN (V/mV)
10000
100
120
1000
510
T
A
= –55ⴗC
T
A
= +25ⴗC
T
A
= +125ⴗC
43
2
V
S
= ⴞ15V
V
O
= ⴞ10V
TPC 15. Open-Loop Gain vs.
Load Resistance
FREQUENCY (Hz)
100 100k
1k 10k
OUTPUT SWING (Vp-p)
0
5
10
15
20
25
30
35
TA = 25ⴗC
VS = ⴞ15V
AVCL = +1
1%THD
fO = 1kHz
RL = 10k⍀
TPC 18. Maximum Output
Swing vs. Frequency
REV. E–6–
OP297
FREQUENCY
(
Hz
)
OPEN-LOOP GAIN (dB)
–40
100 1k 10M
10k 100 1M
V
S
= ⴞ15V
C
L
= 30pF
R
L
= 1M⍀
T
A
= –55ⴗC
T
A
= +125ⴗC
GAIN
PHASE
PHASE SHIFT (Deg)
–20
0
20
40
60
100
80
TPC 19. Open Loop Gain, Phase
vs. Frequency
LOAD CAPACITANCE
(p
F
)
OVERSHOOT (%)
0
0100
–EDGE
10
20
30
40
50
60
70
1000 10000
+EDGE
TA = 25ⴗC
VS = ⴞ15V
AVCL = +1
VOUT = 100mV p-p
TPC 20. Small-Signal Over-
shoot vs. Load Capacitance
FREQUENCY
(
Hz
)
OUTPUT IMPEDANCE (⍀)
1000
0.001
10 100 1k
100
10
0.01
0.1
1
10k 100k 1M
TA = 25ⴗC
VS = ⴞ15V
TPC 21. Open Loop Output
Impedance vs Frequency
APPLICATIONS INFORMATION
Extremely low bias current over a wide temperature range makes
the OP297 attractive for use in sample-and-hold amplifiers,
peak detectors, and log amplifiers that must operate over a wide
temperature range. Balancing input resistances is unnecessary
with the OP297. Offset voltage and TCV
OS
are degraded only
minimally by high source resistance, even when unbalanced.
The input pins of the OP297 are protected against large differ-
ential voltage by back-to-back diodes and current-limiting
resistors. Common-mode voltages at the inputs are not restricted
and may vary over the full range of the supply voltages used.
The OP297 requires very little operating headroom about the
supply rails and is specified for operation with supplies as low as
2 V. Typically, the common-mode range extends to within 1 V
of either rail. The output typically swings to within 1 V of the
rails when using a 10 kΩ load.
AC PERFORMANCE
The OP297’s ac characteristics are highly stable over its full
operating temperature range. Unity gain small-signal response is
shown in Figure 4. Extremely tolerant of capacitive loading on
the output, the OP297 displays excellent response with 1000 pF
loads (Figure 5).
10
0%
100
90
5
␮
s
20mV
Figure 4. Small-Signal Transient Response
(C
LOAD
= 100 pF, A
VCL
= 1)
10
0%
100
90
5
␮
s
20mV
Figure 5. Small-Signal Transient Response
(C
LOAD
= 1000 pF, A
VCL
= 1)
10
0%
100
90
5
␮
s
20mV
Figure 6. Large-Signal Transient Response
(A
VCL
= 1)
REV. E
OP297
–7–
UNITY-GAIN FOLLOWER
INVERTING AMPLIFIER
NONINVERTING AMPLIFIER
MINI-DIP
BOTTOM VIEW
1
8
B
A
1/2
OP297
1/2
OP297
1/2
OP297
Figure 7. Guard Ring Layout and Connections
GUARDING AND SHIELDING
To maintain the extremely high input impedances of the OP297,
care must be taken in circuit board layout and manufacturing.
Board surfaces must be kept scrupulously clean and free of mois-
ture. Conformal coating is recommended to provide a humidity
barrier. Even a clean PC board can have 100 pA of leakage
currents between adjacent traces, so guard rings should be used
around the inputs. Guard traces are operated at a voltage close to
that on the inputs, as shown in Figure 7, so that leakage currents
become minimal. In noninverting applications, the guard ring
should be connected to the common-mode voltage at the inverting
input. In inverting applications, both inputs remain at ground,
so the guard trace should be grounded. Guard traces should be
on both sides of the circuit board.
OPEN-LOOP GAIN LINEARITY
The OP297 has both an extremely high gain of 2000 V/mV
minimum and constant gain linearity. This enhances the precision
of the OP297 and provides for very high accuracy in high closed
loop gain applications. Figure 8 illustrates the typical open-loop
gain linearity of the OP297 over the military temperature range.
TA = +25ⴗC
OUTPUT VOLTAGE
(
V
)
DIFFERENTIAL INPUT VOLTAGE (10␮V/DIV)
0
–15
RL = 10k⍀
VS = ⴞ15V
VCM = 0V TA = +125ⴗC
TA = –55ⴗC
–10 –5 0 5 1510
Figure 8. Open-Loop Linearity of the OP297
APPLICATIONS
PRECISION ABSOLUTE VALUE AMPLIFIER
The circuit of Figure 9 is a precision absolute value amplifier with
an input impedance of 30 MΩ. The high gain and low TCV
OS
of the OP297 ensure accurate operation with microvolt input
signals. In this circuit, the input always appears as a common-
mode signal to the op amps. The CMR of the OP297 exceeds
120 dB, yielding an error of less than 2 ppm.
1/2
OP297
1/2
OP297
+15V
C2
0.1␮F
R1
1k⍀
C1
30pF D1
1N4148
D2
1N4148 R2
2k⍀
0V V
OUT
10V
R3
1k⍀
–15V
V
IN
C3
0.1␮F
5
6
7
1
28
3
4
Figure 9. Precision Absolute Value Amplifier
PRECISION CURRENT PUMP
Maximum output current of the precision current pump shown
in Figure 10 is ±10 mA. Voltage compliance is ±10 V with ±15 V
supplies. Output impedance of the current transmitter exceeds
3 MΩ with linearity better than 16 bits.
1/2
OP297
+15V
R3
10k⍀
VIN
5
6
7
1
2
8
3
1/2
OP297
IOUT
10mA
R1
10k⍀
R2
10k⍀
R4
10k⍀
R6
10k⍀
–15V
IOUT = = = 10mA/V
VIN
R5
VIN
100⍀
Figure 10. Precision Current Pump
REV. E–8–
OP297
PRECISION POSITIVE PEAK DETECTOR
In Figure 11, the C
H
must be of polystyrene, Teflon
®
, or poly-
ethylene to minimize dielectric absorption and leakage. The
droop rate is determined by the size of C
H
and the bias current
of the OP297.
2N930
1/2
OP297
+15V
0.1␮F
1k⍀
1N4148
RESET
V
IN
5
6
7
1
28
3
0.1␮F
1/2
OP297
1k⍀
1k⍀
C
H
–15V
V
OUT
1k⍀
Figure 11. Precision Positive Peak Detector
SIMPLE BRIDGE CONDITIONING AMPLIFIER
Figure 12 shows a simple bridge conditioning amplifier using the
OP297. The transfer function is
VV R
RR
R
R
OUT REF
F
=+
∆
∆
The REF43 provides an accurate and stable reference voltage for
the bridge. To maintain the highest circuit accuracy, R
F
should
be 0.1% or better with a low temperature coefficient.
15V
3
2
1
1/2
OP297
VOUT
VOUT = VREF R + ⌬R
⌬R
R
RF
5
6
7
1/2
OP297
VREF
4
8
REF43
R + ⌬R
RF
4
Figure 12. A Simple Bridge Conditioning Amplifier
Using the OP297
NONLINEAR CIRCUITS
Due to its low input bias currents, the OP297 is an ideal log
amplifier in nonlinear circuits such as the square and square-
root circuits shown in Figures 13 and 14. Using the squaring
circuit of Figure 13 as an example, the analysis begins by writing a
voltage loop equation across transistors Q1, Q2, Q3, and Q4.
VlnI
I
VlnI
I
VlnI
I
Vln I
I
T
IN
S
T
IN
S
T
O
S
T
REF
S
1
1
2
2
3
3
4
4
+
=
+
All the transistors of the MAT04 are precisely matched and at
the same temperature, so the I
S
and V
T
terms cancel, giving
2ln I ln I ln I ln I
IN O REF O
=+ =×
()
IREF
Exponentiating both sides of the equation leads to
I
I
I
O
IN
REF
=
()
2
Op amp A2 forms a current-to-voltage converter, which gives
V
OUT
= R2 × I
O
. Substituting (V
IN
/R1) for I
IN
and the above
equation for I
O
yields
VR
I
V
R
OUT
REF
IN
=
2
1
2
A similar analysis made for the square-root circuit of Figure 14
leads to its transfer function
VR
VI
R
OUT
IN REF
=
()( )
21
1/2
OP297
7
6
5
V
OUT
R2
33k⍀
C2
100pF
I
O
1/2
OP297
–15V
1
2
3
V+
V–
I
REF
R3
50k⍀
Q3
R1
33k⍀
V
IN
Q1
Q2
Q4 13
14
12
R4
50k⍀
8
9
10
4
8
6
5
7
2
3
1
C1
100pF
MAT04E
Figure 13. Squaring Amplifier
1/2
OP297
7
6
5
VOUT
R2
33k⍀
C2
100pF
IO
1/2
OP297
–15V
1
2
3
V+
V–
IREF
R3
50k⍀
R1
33k⍀
VIN
Q1
R4
50k⍀
79
10
4
8
3
1
C1
100pF
MAT04E
8
Q3
5
6
Q4
13
12
14
Q2
Figure 14. Square-Root Amplifier
REV. E
OP297
–9–
CIN IOS 3D1
–IN
D2
Q1
R1
R2
R5
Q2
R6
10 11
G1 C3
R7
I1
D4
D3
R4R3
C2
14
13
V3
E1
R8
C4
R9
EREF
V2
50
98
12
65
99
8
RIN2
2
+IN RIN1 EOS
1
79
4
15 16
50
R16
R17
23
ISYS
G4 G5
28 29
22
D6
D5 26
27
D7 D8 G6 R18
R19
D9 D10
G7
V4
V5 L1
25
99
98
9
R10 C5
G1
R11 R13
C6 C7
R12
E2 R14
E3 R15 C8
G3
Figure 15. Macro Model
In these circuits, I
REF
is a function of the negative power supply.
To maintain accuracy, the negative supply should be well regu-
lated. For applications where very high accuracy is required, a
voltage reference may be used to set I
REF
. An important consider-
ation for the squaring circuit is that a sufficiently large input voltage
can force the output beyond the operating range of the output
op amp. Resistor R4 can be changed to scale I
REF
, or R1, and R2
can be varied to keep the output voltage within the usable range.
Unadjusted accuracy of the square-root circuit is better than 0.1%
over an input voltage range of 100 mV to 10 V. For a similar
input voltage range, the accuracy of the squaring circuit is better
than 0.5%.
OP297 SPICE MACRO MODEL
Figures 14 and 15 show the node end net list for a SPICE macro
model of the OP297. The model is a simplified version of the
actual device and simulates important dc parameters such as V
OS
,
I
OS
, I
B
, A
VO
, CMR, V
O
, and I
SY
. AC parameters such as slew
rate, gain and phase response, and CMR change with frequency
are also simulated by the model.
The model uses typical parameters for the OP297. The poles
and zeros in the model were determined from the actual open-
and closed-loop gain and phase response of the OP297. In this
way, the model presents an accurate ac representation of the actual
device. The model assumes an ambient temperature of 25°C.
REV. E–10–
OP297
SPICE Net List
*OP297 SPICE MACRO-MODEL
*
*NODE ASSIGNMENTS
NONINVERTING INPUT
INVERTING INPUT
OUTPUT
POSITIVE SUPPLY
NEGATIVE SUPPLY
*SUBCKT OP297 1 2 30 99 50
*
*INPUT STAGE & POLE AT 6 MHz
*
RIN1 1 7 2500
RIN2 2 8 2500
R1 8 3 5E11
R2 7 3 5E11
R3 5 99 612
R4 6 99 612
CIN 7 8 3E-12
C2 5 6 21.67E-12
I1 4 50 0.1E-3
IOS 7 8 20E-12
EOS 9 7 POLY(1) 19 23 25E-6 1
Q1 5810QX
Q2 6911QX
R5 10 4 96
R6 11 4 96
D1 89DX
D2 98DX
*
EREF 98 0 23 0 1
*
*GAIN STAGE & DOMINANT POLE AT 0.13 HZ
*
R7 12 98 2.45E9
C3 12 98 500E-12
G1 98 12 5 6 1.634E-3
V2 99 13 1.5
V3 14 50 1.5
D3 12 13 DX
D4 14 12 DX
*
*NEGATIVE ZERO AT -1.8 MHz
*
R8 15 16 1E6
C4 15 16 –88.4E-15
R9 16 98 1
E1 15 98 12 23 1E6
*
*POLE AT 1.8 MHz
*
R10 17 98 1E6
C5 17 98 88 4E-15
G2 98 17 16 23 1 E-6
*
*COMMON-MODE GAIN NETWORK WITH ZERO AT 50 HZ
*
R11 18 19 1E6
C6 18 19 3.183E-9
R12 19 98 1
E2 18 98 3 23 100E-3
*
*POLE AT 6 MHz
*
R15 22 98 1E6
C8 22 98 26.53E-15
G3 98 22 17 23 1 E-6
*
*OUTPUT STAGE
*
R16 23 99 160E3
R17 23 50 160E3
ISY 99 50 331E-6
R18 25 99 200
R19 25 50 200
L1 25 30 1E-7
G4 28 50 22 25 5E-3
G5 29 50 25 22 5E-3
G6 25 99 99 22 5E-3
G7 50 25 22 50 5E-3
V4 26 25 1.8
V5 25 27 1.3
D5 22 26 DX
D6 27 22 DX
D7 99 28 DX
D8 99 29 DX
D9 50 28 DY
D10 50 29DY
*
*MODELS USED
*
.MODEL QX NPN BF=2.5E6)
.MODEL DX D IS = 1E-15)
.MODEL DY D IS = 1E-15 BV = 50)
.ENDS OP297
REV. E
OP297
–11–
OUTLINE DIMENSIONS
8-Lead Plastic Dual In-Line Package [PDIP]
P-Suffix
(N-8)
Dimensions shown in inches and (millimeters)
SEATING
PLANE
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79) 0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
8
14
5
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.100 (2.54)
BSC
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
0.015
(0.38)
MIN
8-Lead Standard Small Outline Package (SOIC)
Narrow Body
S-Suffix
(R-8)
Dimensions shown in millimeters and (inches)
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) ⴛ 45ⴗ
8ⴗ
0ⴗ
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
85
41
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012AA
8-Lead Ceramic Dual In-Line Package [CERDIP]
Z-Suffix
(Q-8)
Dimensions shown in inches and (millimeters)
14
85
0.310 (7.87)
0.220 (5.59)
PIN 1
0.005 (0.13)
MIN
0.055 (1.40)
MAX
0.100 (2.54) BSC
15
0
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.200 (5.08)
MAX
0.405 (10.29) MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36) 0.070 (1.78)
0.030 (0.76)
0.060 (1.52)
0.015 (0.38)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. E
C00300–0–7/03(E)
–12–
OP297
Revision History
Location Page
7/03—Data Sheet changed from REV. D to REV. E.
Changes to TPCS 13 and 16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edits to Figures 12 and 14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Changes to NONLINEAR CIRCUITS Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
10/02—Data Sheet changed from REV. C to REV. D.
Edits to Figure 16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
10/02—Data Sheet changed from REV. B to REV. C.
Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Deleted WAFER TEST LIMITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Deleted DICE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Deleted ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12