DATA SHEE
T
SURFACE-MOUNT CERAMIC
MULTILAYER CAPACITORS
C-Array
NP0/X7R/Y5V
16 V TO 50
V
sizes 0508 (4 x 0402) / 0612 (4 x 0603)
RoHS compliant & Halogen Free
Product Specification – Feb 05, 2010 V.1
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Feb 05, 2010 V.1
Surface-Mount Ceramic Multilayer Capacitors
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17
Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
SCOPE
This specification describes
NP0/X7R/Y5V 4-capacitor Array
with lead-free terminations.
APPLICATIONS
Professional electronics
High density consumer
electronics
FEATURES
Supplied in tape on reel
Nickel-barrier end termination
0508 (4x0402) / 0612 (4x0603)
capacitors (of the same
capacitance value) per array
Less than 50% board space of
an equivalent discrete
component
High volumetric efficiency
Increased throughout, by time
saved in mounting
RoHS compliant
Halogen Free compliant
ORDERING INFORMATION - GLOBAL PART NUMBER, PHYCOMP
CTC & 12NC
All part numbers are identified by the series, size, tolerance, TC material,
packing style, voltage, process code, termination and capacitance value.
Please note that 12 digits ordering code will expire at the end of 2010.
Y
YA
AG
GE
EO
O
B
BR
RA
AN
ND
D
o
or
rd
de
er
ri
in
ng
g
c
co
od
de
e
GLOBAL PART NUMBER (PREFERRED)
CA
XXXX X X XXX X
B
X XXX
(1) (2) (3) (4) (5) (6) (7)
(1) SIZE – INCH BASED (METRIC)
0508 (1220)
0612 (1632)
(2) TOLERANCE
J = ±5%
K = ±10%
M = ±20%
Z = -20% to +80%
(3) PACKING STYLE
R = Paper/PE taping reel; Reel 7 inch
(4) TC MATERIAL
NPO
X7R
Y5V
(5) RATED VOLTAGE
7 = 16 V
8 = 25 V
9 = 50 V
(6) PROCESS
N = NP0
B = X7R / Y5V
(7) CAPACITANCE VALUE
2 significant digits+number of zeros
The 3rd digit signifies the multiplying factor, and letter R is decimal point
Example: 121 = 12 x 101 = 120 pF
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Feb 05, 2010 V.1
Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
2 2 X X X X X X X X X X
Carrier type
55 = Paper/PE
Voltage
10 = 16 V
12 = 25 V
14 = 50 V
Size
7 = 0508 (4 x 0402)
6 = 0612 (4 x 0603)
Capacitance value
(1)
Tolerance
5 = ±5%
6 = ±10%
7 = ±20%
8 = -20% to +80%
Packaging
(2)
1 = reel: ∅180 mm; 7"
Temperature characteristic
1 = NP0
5 = X7R
9 = Y5V
YNM0030
P
PH
HY
YC
CO
OM
MP
P
B
BR
RA
AN
ND
D
o
or
rd
de
er
ri
in
ng
g
c
co
od
de
es
s
GLOBAL PART NUMBER (preferred), PHYCOMP CTC (for North America) and 12NC (traditional) codes are
acceptable to order Phycomp brand products.
GLOBAL PART NUMBER (PREFERRED)
For detailed information of GLOBAL PART NUMBER and ordering example, please refer to page 2.
12NC CODE
PHYCOMP CTC CODE (FOR NORTH AMERICA)
Example: 0508CG220K9B200
0508 CG 220 K 9 B 2 0 0
Size code Temp.
Char.
Capacitance
in pF Tolerance Voltage Termination Packing Marking Range identifier
0508
(4 x 0402)
0612
(4 x 0603)
CG = NP0
2R = X7R
2F = Y5V
101 = 100 pF;
the third digit
signifies the
multiplying factor:
0 = × 1
1 = × 10
2 = × 100
3 = × 1,000
J = ±5%
K = ±10%
M = ±20%
Z = -20% to +80%
7 = 16 V
8 = 25 V
9 = 50 V
B = NiSn 2 = 180 mm
7” Paper/PE
0 = no marking 0 = conv. Ceramic
D = Class 2 MLCC
(1) Refer to “Conversion table of capacitance & last 2-digit of 12NC”
(2) Quantity on reel depends on thickness classification; see table 5
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Feb 05, 2010 V.1
Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
CONSTRUCTION
The capacitor consists of a rectangular
block of ceramic dielectric in which
a number of interleaved metal
electrodes are contained. This
structure gives rise to a high
capacitance per unit volume.
The inner electrodes are connected
to the two end terminations and
finally covered with a layer of
plated tin (NiSn).
The terminations are lead-free.
An outline of the structure is
shown in Fig.1.
CCA833
Fig. 1 Simplified outline
O
O
U
U
T
T
L
L
I
I
N
N
E
E
S
S
L
PA
B
W
T
HBK092
For dimensions see Table 1
Fig. 2 Surface mounted multilayer ceramic capacitor dimension
DIMENSIONS
TYPE 0508
(4 X 0402)
0612
(4 X 0603)
L (mm) 2.0 ±0.15 3.2 ±0.15
W (mm) 1.25 ±0.15 1.60 ±0.15
Tmin. (mm) 0.50 0.70
Tmax. (mm) 0.70 0.90
A (mm) 0.28 ±0.10 0.4 ±0.10
B (mm) 0.2 ±0.10 0.3 ±0.20
P (mm) 0.5 ±0.10 0.8 ±0.10
Table 1
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
CAPACITANCE RANGE & THICKNESS FOR 4C-ARRAY
Table 2 Temperature characteristic material from NP0
CAPACITANCE 0508 (4 x 0402) 0612 (4 x 0603)
Last 2-digit of
12NC
50 V 50 V
10 pF 23
15 pF 25
18 pF 26
22 pF 27
33 pF 29
39 pF 31
47 pF 32
56 pF 33
68 pF 34
82 pF 35
100 pF 36
120 pF 37
150 pF 38
180 pF 39
220 pF 41
0.6±0.1
270 pF 42
330 pF 43
390 pF 44
470 pF 45
0.8±0.1
560 pF 46
680 pF 47
820 pF 48
1.0 nF 49
NOTE
Values in shaded cells indicate thickness class in mm
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
CAPACITANCE RANGE & THICKNESS FOR 4C-ARRAY
Table 3 Temperature characteristic material from X7
R
CAPACITANCE 0508 (4 x 0402) 0612 (4 x 0603)
Last 2-digit of
12NC
16 V 16 V 25 V 50 V
180 pF 13
220 pF 14
270 pF 15
330 pF 16
390 pF 17
470 pF 18
560 pF 19
680 pF 21
820 pF 22
1.0 nF 23
1.2 nF 24
1.5 nF 25
1.8 nF 26
2.2 nF 27
2.7 nF 28
3.3 nF 29
3.9 nF 31
4.7 nF 32
5.6 nF 33
6.8 nF 34
8.2 nF 35
10 nF 36
0.6±0.1
0.8±0.1
12 nF 37
15 nF 38
18 nF 39
22 nF 41
27 nF 42
33 nF 43
47 nF 45
0.8±0.1
56 nF 46
68 nF 47
82 nF 48
100 nF 49
0.8±0.1
NOTE
Values in shaded cells indicate thickness class in mm
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Feb 05, 2010 V.1
Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
CAPACITANCE RANGE & THICKNESS FOR 4C-ARRAY
Table 4 Temperature characteristic material from Y5V
CAPACITANCE 0612 (4 x 0603)
Last 2-digit of
12NC
25 V
10 nF 36
22 nF 41
47 nF 45
100 nF 49
0.6±0.1
NOTE
Values in shaded cells indicate thickness class in mm
Table 5
THICKNESS CLASSES AND PACKING QUANTITY
Ø180 MM / 7 INCH
SIZE
CODE
THICKNESS
CLASSIFICATION
TAPE WIDTH QUANTITY
PER REEL Paper
0508 0.6 ±0.1 mm 8 mm 4,000
0612 0.8 ±0.1 mm 8 mm 4,000
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
ELECTRICAL CHARACTERISTICS
4
4C
C-
-A
AR
RR
RA
AY
Y
D
DI
IE
EL
LE
EC
CT
TR
RI
IC
C
C
CA
AP
PA
AC
CI
IT
TO
OR
RS
S;
;
N
NI
IS
SN
N
T
TE
ER
RM
MI
IN
NA
AT
TI
IO
ON
NS
S
Unless otherwise stated all electrical values apply at an ambient temperature of 20±1 °C, an atmospheric
pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%.
DESCRIPTION VALUE
Capacitance range 10 pF to 100 nF
Rated voltage
NP0
50 V
X7R
0508: 16 V, 0612: 16 V to 50 V
Y5V
0612: 25 V
Capacitance tolerance
NP0
±5%, ±10%
X7R
±10%, ±20%
Y5V
–20% to +80%
Dissipation factor (D.F.)
NP0 ≤ 0.1%
X7R 16 V ≤ 3.5%, 25V ≤ 2.5%, 50V ≤ 2.5%
Y5V 0508 ≤ 9%, 0612 ≤ 7%
Insulation resistance after 1 minute at Ur (DC) Rins ≥ 10 GΩ or Rins × Cr ≥ 500 seconds whichever is less
Maximum capacitance change as a function of temperature
(temperature characteristic/coefficient):
NP0
±30 ppm/°C
X7R
±15%
Y5V
+22% to –82%
Operating temperature range:
NP0
–55 °C to +125 °C
X7R
–55 °C to +125 °C
Y5V
–30 °C to +85 °C
Table 6
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
MEA608
7.5
5
2.5
0
04040 80 120
T ( C)
o
tan δ
(x 10 )
4
10
Fig. 4 Typical tan δas a function of temperature
40
40
40
MEA607
20
0
20
0 40 80 120
T ( C)
o
TC
(x10 /K)
6
Fig. 3 Typical temperature coefficient as a function of
temperature
Sample limits (broken lines)
Re
q
uirement levels
(
dotted lines
)
15
5
– 5
– 15
MEA614
0102030
10
0
– 10
40 50
VDC (V)
Δ
C
(%)
C
Fig. 5 Typical capacitance change with respect to the
capacitance at 1 V as a function of DC voltage
NP0 0508/0612 50 V
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
600
400
200
0
CCB965
−40 0 40 80 120
T (°C)
tan δ
(× 10
−4
)
Fig. 7 Typical tan δas a function of temperature
V
DC
(V)
CCB966
0 20406080
100
0
−80
−60
−40
−20
C
(%)
ΔC
Fig. 6 Typical capacitance change with respect to the
capacitance at 1 V as a function of DC voltage
at 20 °C
X7R 0508 16 V
15
5
−15
YNM0013
−25−55 5 40 9565 125
T (oC)
10
−10
ΔC
C
(%)
−5
0
Fig. 8 Typical capacitance change as a function of
temperature
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
handbook, halfpage
−60
600
400
200
0
−20 140
CCB559
20 60 100
tan δ
(× 10−4)
T (°C)
1
2
3
Fig. 10 Typical tan δas a function of temperature
handbook, halfpage
0
0
−20
−40
−60
20 40 60
CCB558
ΔC
C
(%)
VDC (V)
12 3
Fig. 9 Typical capacitance change with respect to the
capacitance at 1 V as a function of DC voltage
at 25 °C
X7R 0612 16 V to 50 V
15
5
−15
YNM0013
−25−55 5 40 9565 125
T (oC)
10
−10
ΔC
C
(%)
−5
0
Fig. 11 Typical capacitance change as a function of
temperature
Curve 1 = 16 V product
Curve 2 = 25 V product
Curve 3 = 50 V product
Curve 1 = 16 V product
Curve 2 = 25 V product
Curve 3 = 50 V product
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
−40 −20 100
0
2000
1000
CCB402
3000
4000
5000
0608020 40
T (°C)
tan δ
(× 10−4)
Fig. 13 Typical tan δas a function of temperature
050
0
−100
−80
CCB401
−60
−40
−20
10 20 30 40
V
DC
(V)
C
C
(%)
Fig. 12 Typical capacitance change with respect to the
capacitance at 1 V as a function of DC voltage
at 25 °C
Y5V 0612 25 V
−40 −20 100
−80
−40
−60
CCB403
−20
20
0
40
0608020 40
T (°C)
C
C
(%)
Fig. 14 Typical capacitance change as a function of
temperature
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
TEST TEST METHOD PROCEDURE REQUIREMENTS
Mounting IEC 60384-
21/22
4.3 The capacitors may be mounted on printed-circuit boards or
ceramic substrates
No visible damage
Visual
inspection
and
dimension
check
4.4
Any applicable method using × 10 magnification In accordance with specification
Capacitance 4.5.1 Class 1:
f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20 °C
f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
Class 2:
f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C
f = 120 Hz for C >10 µF, measuring at voltage 0.5 Vrms at 20 °C
Within specified tolerance
Dissipation
factor (D.F.)
4.5.2 Class 1:
f = 1 MHz for C ≤ 1 nF , measuring at voltage 1 Vrms at 20 °C
f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C
Class 2:
f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C
f = 120 Hz for C > 10 µF, measuring at voltage 0.5 Vrms at 20 °C
In accordance with specification
Insulation
resistance
4.5.3 At Ur (DC) for 1 minute In accordance with specification
Temperature
coefficient
4.6 Class 1:
Between minimum and maximum temperature
NP0: -55 °C to +125 °C
Normal Temperature: 20 °C
<General purpose series>
ΔC/C:
Class 1: NP0: ±30 ppm/°C
Temperature
characteristic
Class 2:
Between minimum and maximum temperature
X5R: -55 °C to +85 °C
X7R: -55 °C to +125 °C
Y5V: -30 °C to +85 °C
Normal Temperature: 20 °C
<General purpose series>
Class 2:
X5R/X7R: ±15%
Y5V: 22% to -82%
<High Capacitance series>
Class 2: X5R/X7R: ±15%
Y5V: 22% to -82%
Adhesion 4.7
A force applied for 10 seconds to the line joining the terminations
and in a plane parallel to the substrate
Force
size ≥ 0603: 5N
size = 0402: 2.5N
size = 0201: 1N
TESTS AND REQUIREMENTS
Table 7 Test procedures and requirements
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
TEST TEST METHOD PROCEDURE REQUIREMENTS
Mounting in accordance with IEC 60384-22
paragraph 4.3
No visible damage
Bond
strength of
plating on
end face
IEC 60384-
21/22
4.8
Conditions: bending 1 mm at a rate of 1 mm/s,
radius jig 340 mm
<General purpose series>
∆C/C
Class 1:
NP0: within ±1% or 0.5 pF, whichever is greater
Class2:
X5R/X7R/Y5V: ±10%
<High Capacitance series>
∆C/C
Class2:
X5R/X7R/Y5V: ±10%
Dissolution of the end face plating shall not
exceed 25% of the length of the edge
concerned
<General purpose series>
∆C/C
Class 1:
NP0: within ±0.5% or 0.5 pF, whichever is greate
r
Class2:
X5R/X7R: ±10%
Y5V: ±20%
<High Capacitance series>
∆C/C
Class2:
X5R/X7R: ±10%
Y5V: ±20%
Resistance to
soldering
heat
4.9
Precondition: 150 +0/–10 °C for 1 hour, then
keep for 24 ±1 hours at room temperature
Preheating: for size ≤ 1206: 120 °C to 150 °C for
1 minute
Preheating: for size >1206: 100 °C to 120 °C for
1 minute and 170 °C to 200 °C for 1 minute
Solder bath temperature: 260 ±5 °C
Dipping time: 10 ±0.5 seconds
Recovery time: 24 ±2 hours
D.F. within initial specified value
Rins within initial specified value
Solderability 4.10 Preheated the temperature of 80 °C to 140 °C
and maintained for 30 seconds to 60 seconds.
Test conditions for lead containing solder alloy
Temperature: 235 ±5 °C
Dipping time: 2 ±0.2 seconds
Depth of immersion: 10 mm
Alloy Composition: 60/40 Sn/Pb
Number of immersions: 1
Test conditions for leadfree containing solder alloy
Temperature: 245 ±5 °C
Dipping time: 3 ±0.3 seconds
Depth of immersion: 10 mm
Alloy Composition: SAC305
Number of immersions: 1
The solder should cover over 95% of the critical
area of each termination
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
TEST TEST METHOD PROCEDURE REQUIREMENTS
No visual damage
<General purpose series>
∆C/C
Class 1:
NP0: within ±1% or 1 pF, whichever is greater
Class2:
X5R/X7R: ±15%
Y5V: ±20%
<High Capacitance series>
∆C/C
Class2:
X5R/X7R: ±15%
Y5V: ±20%
Rapid change
of
temperature
IEC 60384-
21/22
4.11 Preconditioning;
150 +0/–10 °C for 1 hour, then keep for
24 ±1 hours at room temperature
5 cycles with following detail:
30 minutes at lower category temperature
30 minutes at upper category temperature
Recovery time 24 ±2 hours
D.F. meet initial specified value
Rins meet initial specified value
No visual damage after recovery
Damp heat
with Ur load
4.13 1. Preconditioning, class 2 only:
150 +0/-10 °C /1 hour, then keep for
24 ±1 hour at room temp
2. Initial measure:
Spec: refer initial spec C, D, IR
3. Damp heat test:
500 ±12 hours at 40 ±2 °C;
90 to 95% R.H. 1.0 Ur applied
4. Recovery:
Class 1: 6 to 24 hours
Class 2: 24 ±2 hours
5. Final measure: C, D, IR
P.S. If the capacitance value is less than the
minimum value permitted, then after the
other measurements have been made the
capacitor shall be precondition according to
“IEC 60384 4.1” and then the requirement
shall be met.
<General purpose series>
∆C/C
Class 1:
NP0: within ±2% or 1 pF, whichever is greater
Class2:
X5R/X7R: ±15%; Y5V: ±30%
D.F.
Class 1: NP0: ≤ 2 x specified value
Class2:
X5R/X7R: ≤ 16V: ≤ 7%
≥ 25V: ≤ 5%
Y5V: ≤ 15%
Rins
Class 1:
NP0: ≥ 2,500 MΩ or Rins x Cr ≥ 25s whichever is less
Class2:
X5R/X7R/Y5V: ≥ 500 MΩ or Rins x Cr ≥ 25s
whichever is less
<High Capacitance series>
∆C/C
Class2: X5R/X7R: ±20%; Y5V: ±30%
D.F.
Class2: 2 x initial value max
Rins
Class2: 500 MΩ or Rins x Cr ≥ 25s, whichever is less
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
TEST TEST METHOD PROCEDURE REQUIREMENTS
No visual damage
Endurance IEC 60384-
21/22
4.14 1. Preconditioning, class 2 only:
150 +0/-10 °C /1 hour, then keep for
24 ±1 hour at room temp
2. Initial measure:
Spec: refer initial spec C, D, IR
3. Endurance test:
Temperature: NP0/X7R: 125 °C
X5R/Y5V: 85 °C
Specified stress voltage applied for 1,000 hours:
Applied 2.0 x Ur for general product.
Applied 1.5 x Ur for high cap. product.
High voltage series follows with below stress
condition:
Applied 1.3 x Ur for 500V series
Applied 1.2 x Ur for 1KV, 2KV, 3KV series
4. Recovery time: 24 ±2 hours
5. Final measure: C, D, IR
P.S. If the capacitance value is less than the
minimum value permitted, then after the other
measurements have been made the capacitor shall
be precondition according to “IEC 60384 4.1” and
then the requirement shall be met.
<General purpose series>
∆C/C
Class1:
NP0: within ±2% or 1 pF, whichever is greater
Class2:
X5R/X7R: ±15%; Y5V: ±30%
D.F.
Class1:
NP0: ≤ 2 x specified value
Class2:
X5R/X7R: ≤ 16V: ≤ 7%
≥ 25V: ≤ 5%
Y5V: ≤ 15%
Rins
Class1:
NP0: ≥ 4,000 MΩ or
Rins x Cr ≥ 40s whichever is less
Class2:
X5R/X7R/Y5V: ≥ 1,000 MΩ or
Rins x Cr ≥ 50s whichever is less
<High Capacitance series>
∆C/C
Class 2:
X5R/X7R: ±20%; Y5V: ±30%
D.F.
Class 2:
2 x initial value max
Rins
Class 2:
1,000 MΩ or Rins x Cr ≥ 50s, whichever is less
Voltage proof IEC 60384-1 4.6 Specified stress voltage applied for 1 minute
Ur ≤ 100 V: series applied 2.5 Ur
100 V < Ur ≤ 200 V series applied (1.5 Ur + 100)
200 V < Ur ≤ 500 V series applied (1.3 Ur + 100)
Ur > 500 V: 1.3 Ur
I: 7.5 mA
No breakdown or flashover
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Surface-Mount Ceramic Multilayer Capacitors
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Product specification
4C-Array NP0/X7R/Y5V 16 V to 50 V
REVISION HISTORY
REVISION DATE CHANGE NOTIFICATION DESCRIPTION
Version 1 Feb 05, 2010 - - The statement of "Halogen Free" on the cover added
Version 0 Jun 22, 2009 - - New datasheet for 4C-Array series with RoHS compliant
- Replace from pdf files: 0508_16V to 50V_1, 0612_16V to 50V_0,
C-Array_NP0_50V_0508_7, C-Array_NP0_50V_0612_7,
C-Array_X7R_16V_25V_50V_0612_6, C-Array_X7R_16V_0508_5,
C-Array_Y5V_25V_0508_0, C-Array_Y5V_25V_0612_5
- Define global part number
- Description of "Halogen Free compliant" added
- Test method and procedure updated
