Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
1MHz, High-Efficiency, Step-Up Converter for 2 to 10 White LEDs
The APW7209 is a current-mode and fixed frequency
boost converter with an integrated N-FET to drive up to 10
white LEDs in series.
Features
•Wide Input Voltage from 2.5V to 6V
•0.3V Reference Voltage
•Fixed 1MHz Switching Frequency
•High Efficiency up to 88%
•100Hz to 100kHz PWM Brightness Control Fre-
quency
•Open-LED Protection
•Under-Voltage Lockout Protection
•Over-Temperature Protection
•<1µA Quiescent Current during Shutdown
•SOT-23-6 Package
•Lead Free and Green Devices Available
(RoHS Compliant)
Applications
General Description
•White LED Display Backlighting
•Cell Phone and Smart Phone
•PDA, PMP, MP3
•Digital Camera Simplified Application Circuit
Pin Configuration
4 EN
6 VIN
GND 2 5 OVP
FB 3
LX 1
SOT-23-6 Top View
The series connection allows the LED current to be iden-
tical for uniform brightness. Its low on-resistance of N-
FET and low feedback voltage reduce power loss and
achieve high efficiency. Fast switching frequency(1MHz
typical) allows using small-size inductor and both of in-
put and output capacitors. An over voltage protection
function, which monitors the output voltage via OVP pin,
stops switching of the IC if the OVP voltage exceeds the
over voltage threshold. An internal soft-start circuit elimi-
nates the inrush current during start-up.
The APW7209 also integrates under-voltage lockout, over-
temperature protection, and current limit circuits to pro-
tect the IC in abnormal conditions.The APW7209 is avail-
able in a SOT-23-6 package.
GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1C2
1µF
C1
4.7µF
R1
15Ω
VIN
Up to
10
WLEDs
OFF ON APW7209
L1
22µH
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw2
Symbol
Parameter Rating Unit
VIN VIN Supply Voltage (VIN to GND) -0.3 ~ 7 V
FB, EN to GND Voltage -0.3 ~ VIN V
VLX LX to GND Voltage -0.3 ~ 42 V
VOVP OVP to GND Voltage -0.3 ~ 42 V
TJ Maximum Junction Temperature 150 °C
TSTG Storage Temperature -65 ~ 150 °C
TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 °C
Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings (Note 1)
Thermal Characteristics (Note 2)
Symbol
Parameter Typical Value Unit
θJA Junction to Ambient Thermal Resistance. SOT-23-6
250 °C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions (Note 3)
Symbol
Parameter Range Unit
VIN VIN Input Voltage 2.5~ 6 V
CIN Input Capacitor 4.7 or higher µF
COUT Output capacitor 0.68 or higher µF
L1 Inductor 6.8 ~ 47 µH
TA Ambient Temperature -40 ~ 85 °C
TJ Junction Temperature -40 ~ 125 °C
Note 3: Refer to the application circuit for further information.
Ordering and Marking Information
APW7209 CI: X - Date Code
Package Code
C : SOT-23-6
Operating Ambient Temperature Range
I : -40 to 85oC
Handling Code
TR : Tape & Reel
Assembly Material
L : Lead Free Device
G : Halogen and Lead Free Device
W09X
APW7209
Handling Code
Temperature Range
Package Code
Assembly Material
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw3
Electrical Characteristics
APW7209
Symbol
Parameter Test Conditions Min.
Typ. Max. Unit
SUPPLY VOLTAGE AND CURRENT
VIN Input Voltage Range TA = -40 ~ 85°C, TJ = -40 ~ 125°C 2.5 - 6 V
IDD1 VFB = 0.4V, no switching 70 100 130 µA
IDD2 FB = GND, switching - 1 2 mA
ISD
Input DC bias current
EN = GND - - 1 µA
UNDER VOLTAGE LOCKOUT
UVLO Threshold Voltage VIN Rising 2.0 2.2 2.4 V
UVLO Hysteresis Voltage 50 100 150 mV
REFERENCE AND OUTPUT VOLTAGES
TA = 25°C 0.285
0.3 0.315
VREF Regulated Feedback Voltage TA = -40 ~ 85°C (TJ = -40 ~ 125°C) 0.276
- 0.324
V
IFB FB Input Current -50 - 50 nA
INTERNAL POWER SWITCH
FSW Switching Frequency FB=GND 0.8 1.0 1.2 MHz
RON Power Switch On Resistance - 0.6 - Ω
ILIM Power Switch Current Limit 0.7 0.9 1.2 A
LX Leakage Current VEN=0V, VLX=0V or 5V, VIN = 5V -1 - 1 µA
DMAX LX Maximum Duty Cycle 92 95 98 %
OUTPUT OVER VOLTAGE PROTECTION
VOVP Over Voltage Threshold VOVP rising - 40 - V
OVP Hysteresis - 3 - V
OVP Leakage Current VOVP =40V - 50 - µA
ENABLE AND SHUTDOWN
VTEN EN Voltage Threshold VEN Rising 0.4 0.7 1 V
EN Voltage Hysteresis - 0.1 - V
ILEN EN Leakage Current VEN= 0~5V, VIN = 5V -1 - 1 µA
OVER-TEMPERATURE PROTECTION
TOTP Over-Temperature Protection (Note 4) TJ Rising - 150 - °C
Over-Temperature Protection
Hysteresis (Note 4) - 40 - °C
Note 4: Guaranteed by design, not production tested.
(Refer to figure 1 in the “Typical Application Circuits”. These specifications apply over VIN = 3.6V, TA = -40°C to 85°C, unless otherwise
noted. Typical values are at TA = 25°C.)
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw4
Typical Operating Characteristics
Efficiency vs. WLED Current WLED Current vs. PWM Duty Cycle
WLED Current vs. Supply Voltage Maximum Duty Cycle vs. Supply
Voltage
Switch ON Resistance vs. Supply
Voltage
Switching Frequency vs. Supply
Voltage
(Refer to figure 1 in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 10WLEDs unless otherwise specified)
WLED Current, ILED (mA)
PWM Duty Cycle (%)
0 20 40 60 80 100
0
2
4
6
8
10
12
14
16
18
20
100Hz
100KHz
1KHz
WLED Current, ILED (mA)
Supply Voltage, VIN (V)
19.0
19.2
19.4
19.6
19.8
20.0
20.2
20.4
20.6
20.8
21.0
2.5 33.5 44.5 55.5 6
Maximum Duty Cycle, DMAX (%)
Supply Voltage, VIN (V)
40
50
60
70
80
90
100
2.5 33.5 44.5 55.5 6
Switching Frequency, FSW (MHz)
Supply Voltage, VIN (V)
2.5 33.5 44.5 55.5 6
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
Switch ON Resistance, RON (Ω)
Supply Voltage, VIN (V)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
2.5 33.5 44.5 55.5 6
Efficiency (η)
WLED Current, ILED (mA)
50
55
60
65
70
75
80
85
90
95
0 5 10 15 20 25 30
VIN=3.6V VIN=4.2V
VIN=5V
VIN=3.3V 10 WLEDs 33V@20mA
η=POUT/PIN
≅
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw5
Operating Waveforms
(Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 10WLEDs unless otherwise
specified )
Open-LED Protection
CH1: VOUT, 10V/Div, DC
Time: 20ms/Div
1
VOUT, 10V/Div
Start-up
CH1: VEN, 1V/Div, DC
CH2: VOUT, 10V/Div, DC
CH3: IIN, 0.2A/Div, DC
Time: 0.5ms/Div
VOUT, 10V/Div
IIN, 0.2A/Div
VEN
10WLEDs, L=22µH, VIN=3.6V, ILED=20mA
1
2
3
Normal Operating Waveform
1
2
3
VLX, 20V/Div, DC
VOUT, 100mV/Div, AC
IL, 0.2A/Div
10WLEDs, L=22µH, VIN=3.6V, ILED=20mA
CH1: VLX, 20V/Div, DC
CH2: VOUT, 100mV/Div, AC
CH3: IL, 0.2A/Div, DC
Time: 500ns/Div
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw6
Pin Description
PIN NO.
NAME FUNCTION
1 LX Switch pin. Connect this pin to inductor/diode here.
2 GND Power and signal ground pin.
3 FB Feedback Pin. Reference voltage is 0.3V(typical). Connect this pin to cathode of the lowest LED
and current-sense resistor (R1). Calculate resistor value according to R1=0.3V/ILED.
4 EN Enable Control Input. Forcing this pin above 1.0V enables the device, or forcing this pin below 0.4V
to shut it down. In shutdown, all functions are disabled to decrease the supply current below 1µA.
Do not leave this pin floating.
5 OVP Over Voltage Protection Input Pin. OVP is connected to the output capacitor of the converter.
6 VIN Main Supply Pin. Must be closely decoupled to GND with a 4.7µF or greater ceramic capacitor.
Block Diagram
UVLO
Oscillator
Control Logic
Σ
VIN
EN
FB
GND
LX
OVP
Over-
Temperature
Protection
VREF
0.3V
EAMP
COMP
ICMP
Slope
Compensation
Gate Driver
Current Sense
Amplifier
Error
Amplifier
Current
limit
Soft-
start
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw7
Typical Application Circuits
Figure 2. Brightness control by using a PWM signal applied to EN
Figure 1. Typical 10 WLEDs Application
GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1C2
1µF
C1
4.7µF
R1
15Ω
VIN
Up to 10
WLEDs
100Hz~100kHz
Duty=100%, ILED=20mA
Duty=0%, LED off
APW7209
GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1C2
1µF
C1
4.7µF
R1
15Ω
VIN
Up to 10
WLEDs
OFF ON
APW7209
L1
22µH
GND
VIN
VOUT
EN
LX
FB
OVP
4
6
5
3
2
1C2
1µF
C1
4.7µF
R1
15Ω
R2
10K
R3
100K
C3
0.1µF
R4
10K
VIN
Up to 10
WLEDs
OFF ON
APW7209
MAX,LEDREFMIN,LEDMIN,ADJMIN,LEDREFMAX,LEDMAX,ADJ
MAX,ADJMIN,LEDMIN,ADJMAX,LED
REF IVIVIVIVV3RIV3RI
V2R⋅−⋅−⋅+⋅−⋅−+⋅
⋅=
MAX,LED
MIN,ADJREF
I
V
3R2R
3R2R
1V
1R⋅−
+⋅
=
VADJ
PWM
brightness
control
3.3V 0V
Figure 3. Brightness control using a filtered PWM signal
L1
22µH
L1
22µH
Duty=100%, LED off
Duty=0%, ILED=22mA
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw8
Function Description
Main Control Loop
The APW7209 is a constant frequency current-mode
switching regulator. During normal operation, the inter-
nal N-channel power MOSFET is turned on each cycle
when the oscillator sets an internal RS latch and turned
off when an internal comparator (ICMP) resets the latch.
The peak inductor current at which ICMP resets the RS
latch is controlled by the voltage on the COMP node, which
is the output of the error amplifier (EAMP). An external
current-sense resistor connected between cathode of the
lowest LED and ground allows the EAMP to receive a
current feedback voltage VFB at FB pin. When the LEDs
voltage increases to cause the LEDs current to decrease,
it causes a slightly decrease in VFB relative to the 0.3V
reference, which in turn causes the COMP voltage to in-
crease until the LEDs current reaches the set point.
VIN Under-Voltage Lockout (UVLO)
The Under-Voltage Lockout (UVLO) circuit compares the
input voltage at VIN with the UVLO threshold (2.2V rising,
typical) to ensure the input voltage is high enough for
reliable operation. The 100mV (typ) hysteresis prevents
supply transients from causing a restart. Once the input
voltage exceeds the UVLO rising threshold, startup begins.
When the input voltage falls below the UVLO falling
threshold, the controller turns off the converter.
Soft-Start
The APW7209 has a built-in soft-start to control the N-
channel MOSFET current rise during start-up. During soft-
start, an internal ramp voltage, connected to one of the
inverting inputs of the comoarator ICMP, raise up to re-
place the output voltage of error amplifier until the ramp
voltage reaches the VCOMP.
Current-Limit Protection
The APW7209 monitors the inductor current, flowing
through the N-channel MOSFET, and limits the current
peak at current-limit level to prevent loads and the
APW7209 from damages in overload conditions.
Over-Temperature Protection (OTP)
The over-temperature circuit limits the junction tempera-
ture of the APW7209. When the junction temperature ex-
ceeds 150oC, a thermal sensor turns off the power
MOSFET, allowing the device to cool. The thermal sen-
sor allows the converter to start a soft-start process and
regulate the LEDs current again after the junction tem-
perature cools by 40oC. The OTP is designed with a 40oC
hysteresis to lower the average Junction Temperature
(TJ) during continuous thermal overload conditions, in-
creasing the lifetime of the device.
Enable/Shutdown
Driving EN to ground places the APW7209 in shutdown
mode. When in shutdown, the internal power MOSFET
turns off, all internal circuitry shuts down and the quiescnet
supply current reduces to 1µA maximum.
Open-LED Protection
In driving LED applications, the feedback voltage on FB
pin falls down if one of the LEDs, in series, is failed.
Meanwhile, the converter unceasingly boosts the output
voltage like a open-loop operation. Therefore, an over-
voltage protection (OVP), monitoring the output voltage
via OVP pin, is integrated into the chip to prevent the LX
and the output voltages from exceeding their maximum
voltage ratings. When the voltage on the OVP pin rises
above the OVP threshold (40V, typical), the converter
stops switching and prevents the output voltage from
rising. The converter can work again when the falling OVP
voltage falls below the OVP voltage threshold.
This pin also could be used as a digital input allowing
brightness controlled by using a PWM signal with fre-
quency from 100Hz to 100kHz. The 0% duty cycle of PWM
signal corresponds to zero LEDs current and 100% cor-
responds to full one.
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw9
Application Information
Input Capacitor Selection
The input capacitor (CIN) reduces the ripple of the input
current drawn from the input supply and reduces noise
injection into the IC. The reflected ripple voltage will be
smaller when an input capacitor with larger capacitance
is used. For reliable operation, it is recommended to
select the capacitor with maximum voltage rating at least
1.2 times of the maximum input voltage. The capacitors
should be placed close to the VIN and GND.
Inductor Selection
Selecting an inductor with low dc resistance reduces con-
duction losses and achieves high efficiency. The efficiency
is moderated whilst using small chip inductor which op-
erates with higher inductor core losses. Therefore, it is
necessary to take further consideration while choosing
an adequate inductor. Mainly, the inductor value deter-
mines the inductor ripple current: larger inductor value
results in smaller inductor ripple current and lower con-
duction losses of the converter. However, larger inductor
value generates slower load transient response. A rea-
sonable design rule is to set the ripple current, ∆IL, to be
30% to 50% of the maximum average inductor current,
IL(AVG). The inductor value can be obtained as below,
whereVIN = input voltage
VOUT = output voltage
FSW = switching frequency in MHz
IOUT = maximum output current in amp.
η = Efficiency
∆IL /IL(AVG) = inductor ripple current/average current
(0.3 to 0.5 typical)
To avoid saturation of the inductor, the inductor should be
rated at least for the maximum input current of the con-
verter plus the inductor ripple current. The maximum in-
put current is calculated as below:
The peak inductor current is calculated as the following
equation:
(
)
SWOUT
INOUTIN
)MAX(INPEAK FLVVVV
2
1
II ⋅⋅ −⋅
⋅+=
Output Capacitor Selection
The current-mode control scheme of the APW7209 al-
lows the usage of tiny ceramic capacitors. The higher
capacitor value provides good load transient response.
Ceramic capacitors with low ESR values have the lowest
output voltage ripple and are recommended. If required,
tantalum capacitors may be used as well. The output ripple
is the sum of the voltages across the ESR and the ideal
output capacitor.
where IPEAK is the peak inductor current.
ΔVOUT = ΔVESR + ΔVCOUT
VIN VOUT
IL
N-FET
LX IOUT
ISW
CIN
COUT
IIN D1
ESR
ILIM
IL
IPEAK
IIN
IOUT
ISW
ID
∆IL
( )
∆
η
×
×−
×
≥
AVGL
L
)MAX(OUTSW
INOUT
2
OUT
IN
II
IFVV
V
V
L
×
−
×≈∆SWOUT
INOUT
OUT
OUT
COUT FVVV
C
I
V
η××
=IN
OUT)MAX(OUT
)MAX(IN VVI
IESRPEAKESR RIV×≈∆
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw10
Application Information (Cont.)
Output Capacitor Selection (Cont.)
For ceramic capacitor application, the output voltage ripple
is dominated by the ∆VCOUT. When choosing the input and
output ceramic capacitors, the X5R or X7R with their
good temperature and voltage characteristics are
recommended.
Diode Selection
To achieve high efficiency, a Schottky diode must be used.
The current rating of the diode must meet the peak cur-
rent rating of the converter.
Setting the LED Current
In figure 1, the converter regulates the voltage on FB pin,
connected with the cathod of the lowest LED and the cur-
rent-sense resistor R1, at 0.3V (typical). Therefore, the
current (ILED), flowing via the LEDs and the R1, is calcu-
lated by the following equation:
Recommended
Inductor
Selection
Designator
Manufacturer
Part Number Inductance (µH)
Max DCR (ohm)
Saturation
Current (A) Dimensions
L x W x H (mm3)
L1 GOTREND
GTSD-53-470 47 0.35 0.62 5 x 5 x 2.8
L1 GOTREND
GTSD-32-220 22 0.59 0.52 3.85 x 3.85 x 1.8
Recommended Capacitor Selection
Designator
Manufacturer
Part Number Capacitance (µF)
TC Code Rated Voltage (V)
Case size
C1 Murata GRM188R60J475KE19
4.7 X5R 6.3 0603
C2 Murata GRM21BR71H105KA12
1.0 X7R 50 0805
Recommended Diode Selection
Designator
Manufacturer
Part Number Maximum average forward
rectified current (A) Maximum repetitive peak
reverse voltage (V) Case size
D1 Zowie MSCD106 1.0 60 0805
Layout Consideration
For all switching power supplies, the layout is an impor-
tant step in the design; especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
1. The input capacitor should be placed close to the VIN
and GND. Connecting the capacitor with VIN and GND
pins by short and wide tracks without using any vias for
filtering and minimizing the input voltage ripple.
2. The inductor should be placed as close as possible to
the LX pin to minimize length of the copper tracks as
well as the noise coupling into other circuits.
3. Since the feedback pin and network is a high imped-
ance circuit, the feedback network should be routed
away from the inductor. The feedback pin and feed-
back network should be shielded with a ground plane
or track to minimize noise coupling into this circuit.
4. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
To Anode of
WLEDs
From Cathod of
WLEDs
Via To OVP L1
C1
Via To VOUT
D1
VEN
VIN
LX
Refer to Fig. 1
Optimized APW7209 Layout
R1C2
VOUT
1RV3.0
ILED =
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw11
Package Information
SOT-23-6
0
L
VIEW A
0.25
GAUGE PLANE
SEATING PLANE
A
A2A1
e
D
E1
SEE
VIEW A
bc
e1
E
0
°
8
°
0
°
8
°
0.020
0.009
0.006
0.024
0.051
0.057
MAX.
0.30L
0
E
e
e1
E1
D
c
b
0.08
0.30
0.012
0.60
0.95 BSC
1.90 BSC
0.50
0.22
0.075 BSC
0.037 BSC
0.012
0.003
MILLIMETERS
MIN.
S
Y
M
B
O
L
A1
A2
A
0.00
0.90
SOT-23-6
MAX.
1.30
0.15
1.45
MIN.
0.000
0.035
INCHES
1.40
2.60 3.00
1.80
2.70 3.10
0.118
0.071
0.122
0.102
0.055
0.106
Note : 1. Follow JEDEC TO-178 AB.
2. Dimension D and E1 do not include mold flash, protrusions or
gate burrs. Mold flash, protrusion or gate burrs shall not exceed
10 mil per side.
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw12
Application
A H T1 C d D W E1 F
178.0±
2.00 50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±
0.30
1.75±
0.10
3.5±
0.05
P0 P1 P2 D0 D1 T A0 B0 K0
SOT-23-6
4.0±
0.10
4.0±
0.10
2.0±
0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±
0.20
3.10±
0.20
1.50±
0.20
Carrier Tape & Reel Dimensions
Devices Per Unit(mm)
Package Type Unit Quantity
SOT-23-6 Tape & Reel 3000
H
T1
A
d
A
E1
A
B
W
F
T
P0
OD0
BA0
P2
K0
B0
SECTION B-B
SECTION A-A
OD1
P1
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw13
Test item Method Description
SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec
HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125°C
PCT JESD-22-B, A102 168 Hrs, 100%RH, 121°C
TST MIL-STD-883D-1011.9 -65°C~150°C, 200 Cycles
ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V
Latch-Up JESD 78 10ms, 1tr > 100mA
Reflow Condition (IR/Convection or VPR Reflow)
Classification Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly
Average ramp-up rate
(TL to TP) 3°C/second max. 3°C/second max.
Preheat
- Temperature Min (Tsmin)
- Temperature Max (Tsmax)
- Time (min to max) (ts)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Time maintained above:
- Temperature (TL)
- Time (tL) 183°C
60-150 seconds 217°C
60-150 seconds
Peak/Classification Temperature (Tp) See table 1 See table 2
Time within 5°C of actual
Peak Temperature (tp) 10-30 seconds 20-40 seconds
Ramp-down Rate 6°C/second max. 6°C/second max.
Time 25°C to Peak Temperature 6 minutes max. 8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
t 25 C to Peak
tp
Ramp-up
tL
Ramp-down
ts
Preheat
Tsmax
Tsmin
TL
TP
25
Temperature
Time
Critical Zone
TL to TP
°
Reliability Test Program
Copyright ANPEC Electronics Corp.
Rev. A.3 - Jul., 2008
APW7209
www.anpec.com.tw14
Table 2. Pb-free Process – Package Classification Reflow Temperatures
Package Thickness Volume mm3
<350 Volume mm3
350-2000 Volume mm3
>2000
<1.6 mm 260 +0°C* 260 +0°C* 260 +0°C*
1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C*
≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C*
* Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated
classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL
level.
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures
Package Thickness Volume mm3
<350 Volume mm3
≥350
<2.5 mm 240 +0/-5°C 225 +0/-5°C
≥2.5 mm 225 +0/-5°C 225 +0/-5°C
Classification Reflow Profiles (Cont.)
