IRAMS10UP60A - International Rectifier

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RevH,.011508

PD-94640 RevH

IRAMS10UP60A

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IRAMS10UP60A

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Internal Electrical Schematic - IRAMS10UP60A

23 VS1

24 HO1

25 VB1

1 VCC

2 HIN1

3 HIN2

4 HIN3

5 LIN1 LIN2

6LIN3

8ITRIP

9EN

10 RCIN

11 VSS

12 COM

VB2 21

HO2 20

VS2 19

VB3 18

HO3 17

VS3

VRU (12)

VRW (1 4)

VR V (13)

VB1 (7)

U, VS1 (8)

VB2 (4)

V, VS 2 (5)

VB3 (1)

W, VS3 (2)

THERMISTOR

VDD (22)

VSS (23)

Rg1 Rg3 Rg5

Driver IC

LO1 16

LO3 14

LO2 15

Rg2

Rg4

Rg6

T/ITRIP (21)

HIN1 (15)

HIN2 (16)

HIN3 (17)

LIN1 (18)

LIN2 (19)

LIN3 (20)

V (10 )+

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Thermal Resistance

Inverter Section Electrical Characteristics @ TJ = 25°C

Inverter Section Switching Characteristics

Symbol Parameter Min Typ Max Units

Eon T u rn-On Switchi n g L oss --- 200 235

Eoff T urn-Off Sw i tch i ng Loss --- 75 100

Etot Total Switching Loss --- 275 335 TJ=25°C

Eon T u rn-on S wti chi n g L oss --- 300 360 T J=150°C

Eoff T urn -off Switching L oss --- 135 165

Etot Total Switching Loss --- 435 525

Erec D iod e Rever se Rec overy

energy --- 30 40 µJ

trr D i ode Reverse Recovery ti me --- 100 145 ns

RBSOA Revers e B ias S afe Oper ati n g

Area

SCSOA Short Circui t Safe Operati ng

Area 10 --- --- µs

FULL SQUARE TJ=150°C, IC=5A, VP=600V

V+=480V , V DD=+15V to 0V

See CT3

Conditions

IC=5A, V +=400V

VDD=15V , L =1mH

See CT1

En ergy losses i nclude " tai l " and

diode r everse rec over y

TJ=150°C, V P=600V,

V+=360V,

VDD=+15V to 0V See CT2

µJ

TJ=150°C, V + =400V V DD=15V,

IF=5A, L =1mH

Symbol Parameter Min Typ Max Units Conditions

Rth(J-C)

Ju n c tio n to c as e th er ma l

resi stan ce, eac h I GBT un der

inverter o per ation. --- 4.2 4.7 °C/W

Rth(J-C)

Ju n c tio n to c as e th er ma l

resi stan ce, each D i od e und er

inverter o per ation. --- 5.5 6.5 °C/W

Rth(C-S) Th ermal Resi stance case to

sink --- 0.1 --- °C/W

Flat ,

reased surface.

Heatsi nk compound thermal

conducti vity - 1W/mK

Symbol Parameter Min Typ Max Units Conditions

V(BR)CES Co ll e c tor - to - E mitte r Br eakd o w n

Voltage 600 --- --- V VIN=0V , IC=20µA

∆V(BR)CES / ∆TT emp eratu re Co eff. Of

Breakdown Voltage --- 0.57 --- V/°C VIN=0V , IC=1.0mA

(25° C - 150° C)

--- 1.7 2.0 IC=5A TJ=25°C, V DD=15V

--- 2.0 2.4 IC=5A TJ=150°C

--- 5 15 VIN=5V , V +=600V

--- 10 40 VIN=5V , V +=600V , T J=150°C

Ilk_module Zero Gate Phase-to-Phase

Current -- -- 50 µAV

IN=5V , V +=600V

--- 1.8 2.35 IC=5A

--- 1.3 1.7 IC=5A, T J=150°C

µA

VCE(ON)

ICES

VFM

Co ll e c tor - to - E mitte r S a tu r atio n

Voltage

Zero Gate Voltage Coll ector

Current-to-Emitter

D iod e For w ard Vol tag e D r op

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Recommended Operating Conditions Driver Function

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the

recommended conditions. All voltages are absolute referenced to VSS. The VS offset is tested with all supplies biased

at 15V differential (Note 1). All input pin (VIN ) and ITRIP are clamped with a 5.2V zener diode and pull-up resistor to

VDD

Symbol Definition Min Max Units

VB1,2,3 H igh side fl oati ng sup pl y vol tag e V S+12 VS+20

VS1,2,3 H i gh si d e fl oati n g su pply offset voltage N ote 2 450

VDD L ow si de and l ogi c fi xed suppl y voltage 12 20

VITRIP T/ITRIP input voltage VSS VSS+5

VIN L ogi c i nput vol tage L IN, H IN V SS VSS+5 V

Static Electrical Characteristics Driver Function

VBIAS (VCC, VBS1,2,3)=15V, unless otherwise specified. The VIN and IIN parameters are referenced to VSS and are appli-

cable to all six channels. (Note 1)

Absolute Maximum Ratings Driver Function

Absolute Maximum Ratings indicate substaines limits beyond which damage to the device may occur. All voltage param-

eters are absolute voltages referenced to (Note 1)

VSS

Symbol Definition Min Max Units

VS1,2,3 H i gh S i de offset vol tage -0.3 600 V

VB1,2,3 H i gh Si de fl oati ng suppl y vol tage -0.3 20 V

VDD L ow Si de and l ogi c fi xed suppl y voltage -0.3 20 V

VIN Input voltage LIN, HIN, T/ITRIP -0.3 7 V

TJJucti on T emp erature -40 150 °C

Symbol Definition Min Typ Max Units

VIN,th+ Posi ti ve goi ng i nput threshol d 3.0 --- --- V

VIN,th- N egati ve goi n g i nput threshol d --- --- 0.8 V

IQBS Qu iesc en t V BS suppl y cu rren t --- 70 120 µA

IQCC Qu i s cen t VCC supp l y c urrent --- 1.6 2.3 mA

ILK Offset S u p p l y L eakag e Cur ren t -- - - - - 5 0 µA

IIN+ In put bi as current (OUT =L O) --- 100 220 µA

IIN+ In put bi as current (OUT =H I) --- 200 300 µA

V(ITRIP)I

TRIP th reshol d V ol tage (OUT =H I or OU T =L O) 3.85 4.3 4.75 V

11.4

---

10.9

0.2

10.4

---

VCCUV+

VBSUV+

VCCUV-

VBSUV-

VCC and V BS suppl y u ndervoltage

N egati ve goi ng threshol d

VCCUVH

VBSUVH

VCC and V BS suppl y u ndervoltage

Ilockout hysteresis

10.6 11.1 11.6

VCC and V BS suppl y u ndervoltage

Positi ve g oi n g threshold

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Note 3: The Maximum recommended sense voltage at the T/ITRIP terminal under normal operating conditions is 3.3V.

Thermistor Built-in IRAMS10UP60A

Internal NTC - Thermistor Characteristics

Note 1: For more details, see IR21365 data sheet

Note 2: Logic operational for Vs from V--5V to V-+600V. Logic stata held for VS from V--5V to V--VBS. (Please refer to

DT97-3 for more details)

Symbol Definition Min Typ Max Units

TON In p u t to ou tp u t p ro p ag ation tu r n -o n d elay time ( s ee fig.11 ) - 4 70 - n s

TOFF I n p u t to o u tpu t p r op ag atio n tur n - off delay ti me ( se e fi g . 1 1 ) - 6 15 - n s

DTD ead T i me - 300 - ns

I/TTrip T/ITrip to six switch to turn-off propagation delay (see fig. 2) - 750 - ns

TFCLTRL Post ITrip to s ix swi tc h to tu r n -o ff clear ti me ( see fig . 2 ) - 9 - ms

Typ Units Conditions

R25 Resi stance 100 + /- 5 % k ΩTC = 25°C

R125 Resi stance 2.522 + 17.3 % /- 14 .9% k ΩTC = 125°C

BB -Constan t (25-50 °C) 4250 +/- 3% k R2 = R1e [B (1 /T2 - 1/T1)]

-40 / 125 °C

1mW/°CT

C = 25° C

Parameter

T emperature Range

T yp. D i ssi pati on constant

IR21365

12K

NTC

VCC (22)

T/ITRIP (21)

VSS (23)

4.3k

Dynamic Electrical Characteristics

VDD=VBS=VBIAS=15V, Io=1A, VD=9V, PWMIN=2kHz, VIN_ON=VIN_th+, VIN_OFF=VIN_th-

TA=25°C, unless otherwise specified

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Figure1. Input/Output Timing Diagram

Note 4: The shaded area indicates that both high-side and low-side switches are off and therefore the half-

bridge output voltage would be determined by the direction of current flow in the load.

HO1,2,3

LO1,2,3

Itrip

U,V,W

LIN1,2,3

HIN1,2,3

U,V,W

Driver

V+

Hin1,2,3

Lin1,2,3

(15,16,17)

(18,19,20)

(8,5,2)

Itrip U,V,W

001Vbus

0100

011X

1XXX

HIN1,2,3 LIN1,2,3

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Note 5: The shaded area indicates that both high-side and low-side switches are off and therefore the half-

bridge output voltage would be determined by the direction of current flow in the load.

Figure 2. T/ITrip Timing Waveform

T/Itrip

LIN1,2,3

HIN1,2,3

tfltclr

50%

U,V,W

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Module Pin-Out Description

Pin Name Description

1 V B 3 H i gh Si de Fl oating S uppl y V oltage 3

2 W,V S3 Ou tput 3 - Hi gh Si de Fl oati ng Suppl y Offset V ol tage

3nanone

4 V B 2 H i gh Si de Fl oating S uppl y vol tage 2

5 V ,VS 2 Output 2 - Hi gh Si de Fl oating Suppl y Offset Vol tage

6nanone

7 V B 1 H i gh Si de Fl oating S uppl y vol tage 1

8 U,V S1 Output 1 - H i gh Si de Fl oating Supply Offset V ol tage

9nanone

10 V + Positi ve Bus In pu t Vol tag e

11 na none

12 L E1 L ow Si de Emi tter Connecti on - Phase 1

13 L E2 L ow Si de Emi tter Connecti on - Phase 2

14 L E3 L ow Si de Emi tter Connecti on - Phase 3

15 HIN1 Logic Input High Side Gate Driver - Phase 1

16 HIN2 Logic Input High Side Gate Driver - Phase 2

17 HIN3 Logic Input High Side Gate Driver - Phase 3

18 LIN1 Logic Input Low Side Gate Driver - Phase 1

19 LIN2 Logic Input Low Side Gate Driver - Phase 2

20 LIN3 Logic Input Low Side Gate Driver - Phase 3

21 T / Itri p T emperature M on i tor and S hu t-d own Pi n

22 V CC +15V M ain Suppl y

23 VSS Negative Main Supply

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Typical Application Connection IRAMS10UP60A

VDD(15 V)

T/ITRIP

VSS

3.3 V NTC 12k

CONTROLLER

3-ph AC

MOTOR

LINW

HINW

LINU

LINV

LeW

HINU

HINV

LeU

LeV

V+

VSU

VBU

VSV

VBV

VSW

VBW

Driver IC

DC BUS

CAPACITORS

PHASE LEG

CURRENT

SENSE

TEMP

SENSE

BOOT-STRAP

CAPACITORS

O/C

SENSE

(ACTIVE LOW)

10m

6.8K

10.2k

CURRENT SENSING CAN USE A

SINGLE SENSE RESISTOR OR PHASE

LEG SENSING AS S HO WN

0.1

1. Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce ringing and

EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins will further improve perfor-

mance.

2. In order to provide good decoupling between VCC-Gnd and VB-VSS terminals, the capacitors shown connected be-

tween these terminals should be located very close to the module pins. Additional high frequency capacitors, typically

0.1µF, are strongly recommended.

3. Value of the boot-strap capacitors depends upon the switching frequency. Their selection should be made based on

IR design tip DN 98-2a, application note AN-1044 or Figure 9.

4. Low inductance shunt resistors shuld be used for phase leg current sensing. Similarly, the length of the traces be-

tween pins 12, 13 and 14 to the corrisponding shunt resistors should be kept as small as possible.

5. Over-current sense signal can be obtained from external hardware detecting excessive instantaneous current in in-

verter.

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Figure 3. Maximum sinusoidal phase current as function of switching frequency

VBUS=400V, Tj=150°C, Modulation Depth=0.8, PF=0.6

Figure 4. Maximum sinusoidal phase current as function of modulation frequency

VBUS=400V, Tj=150°C, Tc=100°C, Modulation Depth=0.8, PF=0.6

02468101214161820

PWM Sw itchi ng Frequency ( kH z)

Maximum RMS Output Current/Phase (A) .

Tc=100°C

Tc=110°C

Tc=120°C

110100

Motor Current Modulation Frequency (Hz)

Maximum RMS Phase Current (A) .

12 k H z

16 k H z

20 k H z

Swi tchi ng Frequency:

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Figure 5. IGBT Turn-on. Typical turn-on waveform @Tj=125°C, VBUS=400V

Figure 6. IGBT Turn-off. Typical turn-off waveform @Tj=125°C, VBUS=400V

-1

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

Time (µs)

Current (A)

-50

100

150

200

250

300

350

400

450

Voltage (V)

Current

Volta

-1

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

Time (µs)

Current (A)

-50

100

150

200

250

300

350

400

450

Voltage (V)

Current

Volta

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Figure 7. Variation of thermistor resistance with temperature

Figure 8. Variation of temperature sense voltage with thermistor tempera-

ture using external bias resistance of 4.3KΩ, VCC=15V

100

1000

0 20 40 60 80 100 120 140

T emp eratu re ( ° C)

Thermistor Resistance (k_Ω)

Minimum

Nominal

Maximum

0 20 40 60 80 100 120 140

Thermistor Temperature (°C)

V sense (V) .

Maximum

Nominal

Minimum

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Figure 10. Recommended minimum Bootstrap Capacitor value Vs Switching

Frequency

Figure 9. Estimated maximum IGBT junction temperature with thermistor

temperature

2.2

4.7

2.5

7.5

12.5

17.5

0 1.5 3 4.5 6 7.5 9 10.51213.51516.51819.5

Swi tchi ng Frequency (k H z)

Capacitance (µF)

6.8

3.3

5101520

100

120

140

160

180

80 90 100 110 120 130 140 150

T h er mi s tor Temper atu re ( ° C)

IGBT Junction Temperature (°C) .

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Figure 11. Switching Parameter Definitions

Figure 11a. Input to Output propaga-

tion turn-on delay time Figure 11b. Input to Output

propagation turn-off delay timet

Figure 11c. Diode Reverse Recovery

VCE

HIN/LIN

trr

Irr

VCE IC

HIN/LIN

TON tr

50%

HIN/LIN 90% IC

10% IC

50%

HIN/LIN

VCE

HIN/LIN

TOFF tf

90% IC

10% IC

10%

VCE

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Figure CT1. Switching Loss Circuit

Figure CT2. S.C.SOA Circuit

U,V,W

Driver

Vbus

Lin1,2,3

Hin1,2,3

PWM=4µs

U,V,W

Driver

Vbus

Lin1,2,3

Hin1,2,3

10k

5VZD

VCC

Figure CT3. R.B.SOA Circuit

U,V,W

Driver

Vbus

Lin1,2,3

Hin1,2,3

10k

5VZD

VCC

VP=Peak Voltage on the IGBT die

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Standard pin leadforming option

Notes:

Dimensions in mm

1 - Marking for pin 1 identification

2- Product Part Number

3- Lot and Date code marking

Package Outline

027-E2D24

note 1

note 2 note 3

For mounting instruction see AN-1049

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Package Outline

Pin leadforming option -2

Notes:

Dimensions in mm

1 - Marking for pin 1 identification

2- Product Part Number

3- Lot and Date code marking

027-E2D24

note 1

note 2 note 3

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information

Rev.H, 01/08

Data and Specifications are subject to change without notice

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