SG78xxA/78xx Positive Fixed Voltage Regulator Description Features The SG78xxA/SG78xx series of positive regulators offer self-contained, fixed-voltage capability with up to 1.5 A of load current and input voltage up to 50 V (SG78xxA series only). These units feature a unique on-chip trimming system to set the output voltages to within 1.5% of nominal on the SG78xxA series with 2.0% on the SG78xx series. The SG78xxA versions also offer much improved line and load regulation characteristics. Utilizing an improved bandgap reference design, problems such as drift in output voltage and large changes in the line and load regulation, that are normally associated with the Zener diode references have been eliminated. Output Voltage Set Internally to 1.5% on SG78xxA Input Voltage Range to 50 V max on SG78xxA 2 V Input-Output Differential Excellent Line and Load Regulation Fold back Current Limiting Thermal Overload Protection Voltages Available: 5 V, 12 V, 15 V Contact Factory for Other Voltage Options Available in Surface Mount Package High Reliability Features All protective features of thermal shutdown, current limiting, and safe-area control have been designed into these units and since these regulators require only a small output capacitor for satisfactory performance, ease of application is assured. Although designed as fixed-voltage regulators, the output voltage can be increased through the use of a simple voltage divider. The low quiescent drain current of the device ensures good regulation when this method is used. Product is available in hermetically sealed TO-257 (both case grounded `G' and isolated `IG'), TO-3, TO-39 and leadless chip carrier (LCC) packages. Available to MIL-STD - 883, 1.2.1 MIL-M38510/10702BXA - SG7805T-JAN MIL-M38510/10703BXA - SG7812T-JAN MIL-M38510/10704BXA - SG7815T-JAN MIL-M38510/10706BYA - SG7805K-JAN MIL-M38510/10707BYA - SG7812K-JAN MIL-M38510/10708BYA - SG7815K-JAN MSC-AMSG level "S" Processing Available Available to DSCC -Standard Microcircuit Drawing (SMD) Circuit Schematic Output stage and SOA circuit CURRENT REF VIN 1 R1 Q1 Q9 R3 R2 Q11 Q10 Q22 Z3 BANDGAP REFERENCE Q2 REMOTE SHUTDOWN Q23 Q24 Q25 R14 R20 R19 Q28 R13 R8 Z2 Q26 R12 R15 R26 Q19A Q3 THERMAL SHUTDOWN R10 Q17 Q19B Q27 Q18 R28 Q12 R4 ENABLE Q6 R5 R27 Q16 VOUT 2 R11 Q13 Q15 R7 R18 R25 R23 Q14 *VOS R22A Q4 Q7 Z1 Q8 F4 C2 R9 GND 3 Q5 R6 R22B F1 R22C F2 R22D F3 R22E F4 C1 R24 * For normal operation, the (V OS) sense pin must be externally connected to the load Figure 1 * Circuit Schematic January 2015 Rev. 1.5 www.microsemi.com (c) 2015 Microsemi Corporation 1 Positive Fixed Voltage Regulator Connection Diagrams and Ordering Information Ambient Temperature Type Package Part Number Packaging Type Connection Diagram SG78xxAK-883B SG7805AK-DESC SG7812AK-DESC SG7815AK-DESC -55 C to 125 C K 3-Terminal Metal Can SG78xxAK SG78xxK-883B VIN 1 TO-3 SG7805K-JAN 2 SG7812K-JAN Case is Ground VOUT SG7815K-JAN SG78xxK SG78xxAT-883B SG7805AT-DESC SG7812AT-DESC SG7815AT-DESC -55 C to 125 C T 3-Pin Metal Can SG78xxAT SG78xxT-883B VOUT 2 TO-39 SG7805T-JAN SG7812T-JAN VIN 1 3 GND Case is Ground SG7815T-JAN SG78xxT SG78xxAIG-883B SG7805AIG-DESC VOUT Ground TO-257 VIN L 20-Pin Ceramic Package Leadless Chip Carrier 20 19 18 N.C. N.C. 5 17 VIN N.C. N.C. 6 16 GND 7 15 V0 SENSE N.C. 8 14 N.C. 9 10 11 12 13 N.C. VOUT SG78xxL-883B 1 2 4 N.C. -55 C to 125 C 3 N.C. N.C. SG7812AL-DESC SG7815AL-DESC N.C. SG78xxIG SG7805AL-DESC N.C. N.C. SG78xxAIG SG78xxIG-883B VOUT IG SG7812AIG-DESC SG7815AIG-DESC N.C. VIN -55 C to 125 C 3-Pin Hermetic Isolated Package See Notes 5 and 6 SG78xxAG-883B -55 C to 125 C G 3-Pin Hermetic Package SG7805AG-DESC SG7812AG-DESC SG7815AG-DESC SG78xxAG SG78xxG-883B SG78xxG 2 VOUT Ground VIN TO-257 Case is Ground Absolute Maximum Ratings Notes: 1. Contact factory for JAN and DESC product availability. 2. All parts are viewed from the top. 3. "xx" to be replaced by output voltage of specific fixed regulator. 4. Some products will be available in hermetic flat pack (F). Consult factory for price and availability. 5. Both inputs and outputs must be externally connected together at the device terminals. 6. For normal operation, the VO SENSE pin must be externally connected to the load. Absolute Maximum Ratings Parameter Device Output Voltage Value Units 5, 12, 15 V Input Voltage Input Voltage (Transient) (Note 2) 35 50 V V Input Voltage Differential (Output Shorted to Ground) Operating Junction Temperature 35 150 V C Storage Temperature Range -65 to 150 C Lead Temperature (Soldering 10 seconds) 300 C Notes: 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal. 2. Operation at high input voltages is dependent upon load current. When load current is less than 5 mA, output will rise out of regulation as input-output differential increases beyond 30 V. Note also from Figure 2, that maximum load current is reduced at high voltages. The 50 V input rating of the SG78xxA series refers to ability to withstand high line or transient conditions without damage. Since the regulator's maximum current capability is reduced, the output may fall out of regulation at high input voltages under nominal loading. 3 Positive Fixed Voltage Regulator Thermal Data Value Units Thermal Resistance-Junction to Case, JC 3 C/W Thermal Resistance-Junction to Ambient, JA 35 C/W 15 120 C/W C/W Thermal Resistance-Junction to Case, JC 3.5 C/W Thermal Resistance-Junction to Ambient, JA 42 C/W 4 42 C/W C/W 35 C/W Parameter K Package TO-3 3-Terminal Metal Can (Two pins and case) T Package TO-39 3-Pin Metal Can Thermal Resistance-Junction to Case, JC Thermal Resistance-Junction to Ambient, JA G Package TO-257 3-Pin Hermetic IG Package TO-257 3-Pin Hermetic (Isolated) Thermal Resistance-Junction to Case, JC Thermal Resistance-Junction to Ambient, JA L Package Leadless Chip Carrier 20-Pin Ceramic Thermal Resistance-Junction to Case, JC Thermal Resistance-Junction to Ambient, JA 120 C/W Notes: 1. Junction Temperature Calculation: TJ = TA + (PD x JA). 2. The JA numbers are meant to be guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. Recommended Operating Conditions Parameter Operating Junction Temperature Range Note: Range over which the device is functional. 4 Min -55 SG78xx / 78xxA Typ Max 150 Units C Electrical Characteristics Electrical Characteristics Unless specified, these specifications apply over the operating ambient temperatures for SG7805A / SG7805 with -55 C TA 125 C, VIN = 10 V, IO = 500 mA for the K, G, and IG - Power Packages, IO = 100 mA for the T and L packages, CIN = 0.33 F and COUT = 0.1 F. Low duty cycle pulse testing techniques are used, which maintains junction and case temperatures equal to the ambient temperature. SG7805A Parameter Test Conditions Min Typ Max Min Typ Max Output Voltage TJ = 25 C Line Regulation (Note 1) VIN = 7.5 V to 20 V, TJ = 25 C 5 VIN = 8 V to 12 V, TJ = 25 C 2 Power Pkgs: IO = 5 mA to 1.5 A, TJ = 25 C IO = 250 mA to 750 mA, TJ = 25C T, L - Pkg: IO = 5 mA to 500 mA, TJ = 250 C Load Regulation (Note 1) Total Output Voltage Tolerance Quiescent Current Quiescent Current Change Dropout Voltage Peak Output Current Short Circuit Current SG7805 4.92 5 5.08 4.80 Units 5 5.20 V 25 5 25 mV 12 2 25 mV 15 50 15 50 mV 5 25 5 25 mV 5 25 20 25 mV VIN = 8 V to 20 V Power Pkgs: IO = 5 mA to 1.0 A, P 20W 4.85 5 5.15 4.65 5 5.35 V VIN = 8 V to 20 V T, L - Pkg: IO = 5 mA to 500 mA, P 2 W 4.85 5 5.15 4.65 5 5.35 V 7 mA 6 mA Over Temperature Range 7 TJ = 25 C 4 6 4 With Line: VIN = 8 V to 25 V 0.8 0.8 mA With Load: IO = 5 mA to 1.0 A (Power Pkgs) 0.5 0.5 mA IO = 5 mA to 500 mA (T, L) 0.5 0.5 mA 2 2.5 V VO = 100 mV, TJ = 25 C Power Pkgs: IO = 1.0 A, T, L -Pkg: IO = 500 mA 2 2.5 Power Pkgs: VIN = 10 V, TJ = 25 C 1.5 2 3.3 1.5 2 3.3 A T, L - Pkg: VIN = 10 V, TJ = 25 C 0.5 1 2 0.5 1 2 A Power Pkgs: VIN = 35 V, TJ = 25 C 1.2 1.2 A T, L - Pkg: VIN = 35V, TJ = 25 C 0.7 0.7 A Ripple Rejection VIN = 10 V, f = 120 Hz, TJ = 25 C Output Noise Voltage (rms) f = 10 Hz to 100 kHz (Note 2) Long Term Stability 1000 hours @ TJ = 125 C 20 20 mV Thermal Shutdown IO = 5 mA 175 175 C 68 68 dB 40 40 V/V Notes: 1. All regulation tests are made at constant junction temperature with low duty cycle testing. 2. This test is guaranteed but is not tested in production. 5 Positive Fixed Voltage Regulator Electrical Characteristics Unless specified, these specifications apply over the operating ambient temperatures for SG7812A / SG7812 with -55 C TA 125 C, VIN = 19 V, IO = 500 mA for the K, G, and IG - Power Packages, IO = 100 mA for the T and L packages, CIN = 0.33 F and COUT = 0.1 F. Low duty cycle pulse testing techniques are used, which maintains junction and case temperatures equal to the ambient temperature. SG7812A Parameter Test Conditions Output Voltage TJ = 25 C Line Regulation (Note 1) VIN = 14.5 V to 30 V, TJ = 25 C Load Regulation (Note 1) Quiescent Current Change Dropout Voltage Peak Output Current Short Circuit Current Ripple Rejection Min Typ Max Min Typ Max 11.8 12 12.2 11.5 Units 12 12.5 V 12 120 mV 12 60 VIN = 16 V to 22 V, TJ = 25 C 6 30 6 60 mV Power Pkgs: IO = 5 mA to 1.5 A, TJ = 25 C 28 80 28 120 mV IO = 250 mA to 750 mA, TJ = 25 C 10 40 10 60 mV T, L - Pkg: IO = 5 mA to 500 mA, TJ = 25 C 10 40 10 60 mV VIN = 15.5 V to 27 V Total Output Voltage Power Pkgs: IO = 5 mA to 1.0 A, P 20 W Tolerance VIN = 15.5 V to 27 V T, L - Pkg: IO = 5 mA to 500 mA, P 2 W Quiescent Current SG7812 11.7 12 12.3 11.4 12 12.6 V 11.7 12 12.3 11.4 12 12.6 V 7 mA 6 mA Over Temperature Range 7 TJ = 25 C 4 6 4 With Line: VIN = 15 V to 30 V 0.8 0.8 mA With Load: IO = 5 mA to 1.0 A (Power Pkgs) 0.5 0.5 mA IO = 5 mA to 500 mA (T, L) 0.5 0.5 mA 2 2.5 V VO = 100 mV, TJ = 25 C Power Pkgs: IO = 1.0 A, T, L - Pkg: IO = 500 mA 2 2.5 Power Pkgs: TJ = 25 C 1.5 2 3.3 1.5 2 3.3 A T, L - Pkg: TJ = 25 C 0.5 1 1.7 0.5 1 1.7 A Power Pkgs: VIN = 35 V, TJ = 25 C 1.2 1.2 A T, L - Pkg: VIN = 35 V, TJ = 25 C 0.7 0.7 A VIN = 10 V, f = 120 Hz, TJ = 25 C 61 61 Output Noise Voltage f = 10 Hz to 100 kHz (Note 2) (rms) dB 40 40 V/V Long Term Stability 1000 hours @ TJ = 125 C 48 48 mV Thermal Shutdown IO = 5 mA 175 175 C Notes: 1. All regulation tests are made at constant junction temperature with low duty cycle testing. 2. This test is guaranteed but is not tested in production. 6 Electrical Characteristics Electrical Characteristics Unless specified, these specifications apply over the operating ambient temperatures for SG7815A / SG7815 with -55 C TA 125 C, VIN = 23 V, IO = 500 mA for the K, G, and IG - Power Packages, IO = 100 mA for the T and L packages, CIN = 0.33 F and COUT = 0.1 F. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature. SG7815A Parameter SG7815 Units Test Conditions Min Typ Max Min Typ Max Output Voltage TJ = 25 C Line Regulation (Note 1) VIN = 17.5 V to 30 V, TJ = 25 C 15 VIN = 20 V to 26 V, TJ = 25 C Load Regulation (Note 1) Total Output Voltage Tolerance Quiescent Current 14.8 15 15.6 V 75 15 150 mV 8 40 8 75 mV Power Pkgs: IO = 5 mA to 1.5 A, TJ = 25 C 30 100 30 150 mV IO = 250 mA to 750 mA, TJ = 25 C 12 50 12 75 mV T, L - Pkg: IO = 5 mA to 500 mA, TJ = 25 C 12 50 12 75 mV Dropout Voltage Peak Output Current Short Circuit Current 15.2 14.4 VIN = 18.5 V to 30 V Power Pkgs: IO = 5 mA to 1.0 A, P 20 W 14.6 15 15.4 14.3 15 15.7 V VIN = 18.5 V to 30 V T, L - Pkg: IO = 5 mA to 500 mA, P 2 W 14.6 15 15.4 14.3 15 15.7 V 7 mA 6 mA Over Temperature Range 7 TJ = 25 C Quiescent Current Change 15 4 6 4 With Line: VIN = 18.5 V to 30 V 0.8 0.8 mA With Load: IO = 5 mA to 1.0 A (Power Pkgs) 0.5 0.5 mA IO = 5 mA to 500 mA (T, L) 0.5 0.5 mA 2 2.5 V VO = 100 mV, TJ = 25 C Power Pkgs: IO = 1.0 A, T, L - Pkg: IO = 500 mA 2 2.5 Power Pkgs: TJ = 25 C 1.5 2.2 3.3 1.5 2.2 3.3 A T, L - Pkg: TJ = 25 C 0.5 0.9 1.7 0.5 0.9 1.7 A Power Pkgs: VIN = 35 V, TJ = 25 C 1.2 1.2 A T, L - Pkg: VIN = 35 V, TJ = 25 C 0.7 0.7 A Ripple Rejection VIN = 10 V, f = 120 Hz, TJ = 25 C Output Noise Voltage (rms) f = 10 Hz to 100 kHz (Note 2) Long Term Stability 1000 hours @ TJ = 125 C Thermal Shutdown IO = 5 mA 60 60 dB 40 60 175 Notes: 1. All regulation tests are made at constant junction temperature with low duty cycle testing. 2. This test is guaranteed but is not tested in production. 40 V/V 60 mV 175 C 7 Positive Fixed Voltage Regulator Characteristic Curves G, IG, & K Pkg. only Vo = 200 mV 3 Dropout Voltage (V) Output Current (A) 3 2 C 55 =C TJ 5 =2 C 25 =1 TJ TJ 1 T 55 =J T 2 C 5 =2 J T C 25 C =1 J 1 G, IG, & K Pkg. only Vo = 200 mV 0 0 10 20 30 40 50 Input-Output Voltage Differential (V) Figure 2 * Peak Output Current versus Input-Output Differential 70 SG7805 60 Ripple Rejection (dB) SG7815 50 SG7824 40 VIN (low) = V +3V VIN (high) = V +13V 30 IO = 100 mA TJ = 25 C 20 10 0 10 100 1k 10 k 100 k 1M Frequency (Hz) Figure 4 * Ripple Rejection versus Frequency 8 0 0 1 2 Load Current (A) Figure 3 * Minimum Input-Output Voltage versus Load Current 3 Application Information Application Information 1 Input 2 SG78XX Output 3 0.33 F** 1 Input 2 SG78XX 0.1 F* Output VXX 3 R1 0.33 F 0.1 F IQ R2 * Increasing value of output capacitor improves system transient response **Required only if regulator is located an appreciable distance from power supply filter ( ) Vo = Vxx 1 + R2 + IQR2 R1 Figure 5 * Fixed Output Regulator Figure 6 * Circuit for Increasing Output Voltage RSC Input Input 2N4398 1 SG7805 2 Output R1 3 3 2N6124 Output SG78XX 1 0.33 F _ 0.33 F 2 3 + 0.1 F Figure 7 * High Output Current, Short Circuit Protected 0.1 F LM741 10 k 1k Figure 8 * Adjustable Output Regulator, 7 V to 30 V 9 Positive Fixed Voltage Regulator Package Outline Dimensions Controlling dimensions are in inches, metric equivalents are shown for general information. D Dim A F b L q S R fp 2 R1 e e1 1 MILLIMETERS MIN MAX INCHES MIN MAX A 6.86 7.62 0.270 0.300 q 29.90 30.40 1.177 1.197 b 0.97 1.09 0.038 0.043 D 19.43 19.68 0.765 0.775 S 16.64 17.14 0.655 0.675 e 10.67 11.18 0.420 0.440 e1 5.21 5.72 0.205 0.225 F 1.52 2.03 0.060 0.080 fp 3.84 4.09 0.151 0.161 L 10.79 12.19 0.425 0.480 R1 3.33 4.78 0.131 0.188 R 12.57 13.34 0.495 0.525 Note: Dimensions do not include protrusions; these shall not exceed 0.155 mm (0.006) on any side. Lead dimension shall not include solder coverage. Figure 9 * K 3-Pin Metal Can TO-3 Dim D D1 Q A e F b 2 L1 e1 1 3 L b1 k k1 A b b1 D D1 e e1 F k k1 L L1 Q MILLIMETERS MIN MAX 4.19 4.70 0.41 0.48 0.41 0.53 8.89 9.40 8.13 8.51 5.08 BSC 2.54 Typ 1.02 0.71 0.86 0.74 1.14 12.70 14.48 1.27 90 Typ 45 Typ INCHES MIN MAX 0.165 0.185 0.016 0.019 0.016 0.021 0.350 0.370 0.320 0.335 0.200 BSC 0.100 Typ 0.040 0.028 0.034 0.029 0.045 0.500 0.570 0.050 90 Typ 45 Typ * Lead Coplanarity Note: Dimensions do not include protrusions; these shall not exceed 0.155 mm (0.006) on any side. Lead dimension shall not include solder coverage. Figure 10 * T 3-Pin Metal Can TO-39 10 Package Outline Dimensions (continued) Package Outline Dimensions (continued) Dim E A A1 A2 b D D1* e E* H L O P J V Z A V P A1 Z D O D1 J H L b VIN GND VOUT A2 e MILLIMETERS MIN MAX 4.70 5.21 0.89 1.14 2.92 3.18 0.71 0.081 16.38 16.76 10.41 10.92 2.54 BSC 10.41 10.67 0.50 12.70 13.39 13.64 3.56 3.81 0.10 5.13 5.38 1.40 Typ INCHES MIN MAX 0.185 0.205 0.035 0.045 0.115 0.125 0.027 0.032 0.645 0.660 0.410 0.430 0.100 BSC 0.410 0.420 0.020 0.500 0.527 0.140 0.537 0.150 0.004 0.202 0.212 0.055 Typ *Excludes Weld Fillet Around Lid. Note: Dimensions do not include protrusions; these shall not exceed 0.155 mm (0.006) on any side. Lead dimension shall not include solder coverage. Figure 11 * G/IG 3-Pin Hermetic TO-257 E3 D Dim E A A1 L2 8 1 13 18 B1 e B3 MAX MIN MAX 8.64 9.14 0.340 0.360 E3 - 8.128 - 0.320 e 1.270 BSC 0.050 BSC B1 0.635 Typ 0.025 Typ L 1.02 1.52 0.040 0.060 A 1.626 2.286 0.064 0.090 1.016 Typ 0.040 Typ A1 1.372 1.68 0.054 0.066 A2 - 1.168 - 0.046 L2 1.91 2.41 0.075 0.95 B3 h MIN INCHES D, E h L 3 A2 MILLIMETERS 0.203R 0.008R Note: All exposed metalized area shall be gold plated 60 -inch minimum thickness over nickel plated unless specified in purchase order. Lead dimension shall not include solder coverage Figure 12 * L 20-Pin Ceramic Leadless Chip Carrier 11 Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world's standard for time; voice processing devices; RF solutions; discrete components; security technologies and scalable anti-tamper products; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, Calif., and has approximately 3,400 employees globally. Learn more at www.microsemi.com. Microsemi Corporate Headquarters One Enterprise, Aliso Viejo, CA 92656 USA Within the USA: +1 (800) 713-4113 Outside the USA: +1 (949) 380-6100 Sales: +1 (949) 380-6136 Fax: +1 (949) 215-4996 E-mail: sales.support@microsemi.com (c) 2015 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners. Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer's responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided "as is, where is" and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice. SG78xxA/SG78xx-1.5/01.15