Preliminary Technical Data ADM1175
Rev. PrN | Page 7 of 16
OVERVIEW OF THE HOTSWAP FUNCTION
When circuit boards are inserted into a live backplane,
discharged supply bypass capacitors would draw large transient
currents from the backplane power bus as they charge. Such
transient currents can cause permanent damage to connector
pins, and dips on the backplane supply which could reset other
boards in the system. The ADM1175 is designed to turn a
circuit board’s supply voltage on and off in a controlled manner,
allowing the circuit board to be safely inserted into or removed
from a live backplane. The ADM1175 can reside either on the
backplane or on the circuit board itself.
The ADM1175 controls the “inrush” current to a fixed
maximum level by modulating the gate of an external N-
channel FET placed between the live supply rail and the load.
This “hotswap” function protects the card connectors and the
FET itself from damage and also limits any problems which
could be caused by the high current loads on the live supply rail.
The ADM1175 holds the GATE pin down (and thus the FET is
held off) until a number of conditions are met. An undervoltage
lockout circuit ensures that the device is being provided with an
adequate input supply voltage. Once this has been successfully
detected, the device goes through an initial timing cycle to
provide a delay before it will attempt to hotswap. This delay
ensures that the board is fully seated in the backplane before the
board is powered up.
Once the initial timing cycle is complete, the hotswap function
is switched on under control of the ON/ONB pin. When
asserted (high for the ADM1175-1 and ADM1175-2, low for the
ADM1175-3 and ADM1175-4) the hotswap operation starts.
The ADM1175 charges up the gate of the FET to turn on the
load. It will continue to charge up the GATE pin until the linear
current limit (set to 100 mV/RSENSE) is reached. For some
combinations of low load capacitance and high current limit,
this limit may not be reached before the load is fully charged up.
If current limit is reached, the ADM1175 will regulate the
GATE pin to keep the current at this limit. For currents above
the overcurrent fault timing threshold, nominally 100 mV/
RSENSE, the current fault is timed by sourcing a current out to the
TIMER pin. If the load becomes fully charged before the fault
current limit time is reached (when the TIMER pin reaches
1.3 V), the current will drop below the overcurrent fault timing
threshold, the ADM1175 will then charge the GATE pin higher
to fully enhance the FET for lowest RON, and the TIMER pin
will be pulled down again.
If the fault current limit time is reached before the load drops
below the current limit, a fault has been detected, and the
hotswap operation is aborted by pulling down on the GATE pin
to turn off the FET. The ADM1175-2 and ADM1175-4 are at
this point latched off and will only attempt to hotswap again
when the ON/ONB pin is de-asserted then asserted again. The
ADM1175-1 and ADM1175-3 will retry the hotswap operation
indefinitely, keeping the FET in SOA by using the TIMER pin to
time a cool-down period in between hotswap attempts. The
current and voltage threshold combinations on the TIMER pin
set the retry duty cycle to 3.8%.
The ADM1175 is designed to operate over a range of supplies
from 3.15 V to 16.5 V.
UNDERVOLTAGE LOCKOUT
An internal undervoltage lockout (UVLO) circuit resets the
ADM1175 if the VCC supply is too low for normal operation.
The UVLO has a low-to-high threshold of 2.8 V, with 25 mV
hysteresis. Above 2.8 V supply voltage, the ADM1175 will start
the initial timing cycle.
ON/ONB FUNCTION
The ADM1175-1 and ADM1175-2 have an active-high ON pin.
The ON pin is the input to a comparator which has a low-to-
high threshold of 1.3 V, an 80 mV hysteresis and a glitch filter of
3 μs. A low input on the ON pin turns off the hotswap
operation by pulling the GATE pin to ground, turning off the
external FET. The TIMER pin is also reset by turning on a pull-
down current on this pin. A low-to-high transition on the ON
pin starts the hotswap operation. A 10 kΩ pull-up resistor
connecting the ON pin to the supply is recommended.
Alternatively, an external resistor divider at the ON pin can be
used to program an undervoltage lockout value higher than the
internal UVLO circuit, thereby setting a voltage level at the
VCC supply where the hotswap operation is to start. An RC
filter can be added at the ON pin to increase the delay time at
card insertion if the initial timing cycle delay is insufficient.
The ADM1175-3 and ADM1175-4 have an active-low ONB pin.
This pin operates exactly as described above for the ON pin but
the polarity is reversed. This allows the use of this pin as an
overvoltage detector which can use the external FET as a circuit
breaker for overvoltage conditions on the monitored supply.
TIMER FUNCTION
The TIMER pin handles several timing functions with an
external capacitor, CTIMER. There are two comparator thresholds:
VTIMERH (0.2 V) and VTIMERL (1.3 V). The four timing current
sources are a 5 µA and a 60 µA pull-up, and a 2 µA and a
100 µA pull-down. The 100 µA is a non-ideal current source
approximating a 7 kΩ resistor below 0.4 V.
These current and voltage levels, together with the value of
CTIMER that the user chooses, determine the initial timing cycle
time, the fault current limit time, and the hotswap retry duty
cycle.