Enpirion® Power Evaluation Board User Guide
EP53F8QI PowerSoC
ENABLE
DISABLE
Enpirion EP53F8QI 1.5A Synchronous
DCDC C onver ter M odule Evaluation Boar d
Introduction
Thank you for c hoos ing Alter a Enpir ion power produc ts !
You are evaluating a new class of DCDC c onverter pr oduc t, a c om plete pow er
system on silicon:
The EP53F8Q I is a c om plete m odule w ith integrated m agnetic s .
The evaluation board is des igned to offer a w ide range of engineer ing
evaluation capabilities.
Pads ar e available to add up to one additional input c apac itor and up to
one additional output c apac itors to allow for evaluation of perfor m anc e
over a w ide range of input/output c apac itor c om binations .
O utput voltage is pr ogram m ed us ing a res is tor divider. The boar d c om es
populated with four pre-plac ed r es is tors and a jum per to c hoos e one of
four pres et output voltages .
Eas y jum pers are provided for the follow ing s ignals :
o Enable
o VOUT
Num erous tes t points ar e provided as w ell as c lip leads for input and
output connections
The board c om es with input dec oupling and input r evers e polarity
protec tion to protec t the devic e fr om c om m on s etup m is haps .
Quick Start Guide
Figure 1 shows a top view of the evaluation board.
STEP 1: Set the “ENABLE jum per to the D is able Pos ition.
STEP 2: S et the output voltage by s etting jum per “J2” to one of
the pre s elec ted output voltage s ettings .
STEP 3: C onnec t Pow er Supply to the input power c onnec tors , VIN (+) and
GND (-).
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Enpirion® Power Evaluation Board User Guide
EP53F8QI PowerSoC
CAUTION: be m indful of the polarity. E ven though the evaluation board
c om es w ith revers e polar ity protec tion diodes , it is rarely a good idea to
revers e the input polar ity.
STEP 4: C onnec t the load to the output c onnec tors VO UT ( +) and GND ( -).
STEP 5: P ower up the board and m ove the E NABLE jumper to the enabled
position. The EP53F8QI is now powered up.
Figure 1. Eva l uation Board Layout.
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Enpirion® Power Evaluation Board User Guide
EP53F8QI PowerSoC
Output Voltage Select
The output voltage of the E P53F8Q I is pr ogram m ed us ing a s im ple r es is tor
divider. The evaluation board comes pre-populated with a s et of four jum pers
that allow the us er to c hoos e one of four pres et voltages . R efer to Figure 1 and
Figure 2 for the s pec ific s ettings . If no jum per is populated the default voltage
s etting w ill be 0.6V.
It is also possible to rem ove one of the pr es et res is tors and replac e w ith another
value to generate any des ired output w ithin the devic es operating range.
Refer to the produc t data s heet for fur ther inform ation on s etting the output
voltage.
Figure 2 shows a close-up of the jum per on the evaluation board.
Figure 2. Clos e up of the VOUT s etting jum pers , J2.
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Enpirion® Power Evaluation Board User Guide
EP53F8QI PowerSoC
Test Recommendations
Recommendations
To guarantee m eas ur em ent ac c urac y, the follow ing prec autions s hould be
observed:
1. Make all input and output voltage m eas urem ents at the boar d us ing the
tes t points pr ovided. This w ill elim inate voltage drop ac r os s the line and
load c ables that c an produc e fals e readings .
2. Meas ure input and output c ur rent w ith s eries am m eter s or ac c urate
shunt resistors. This is especially im portant w hen m eas uring effic ienc y.
3. Us e a balanc ed im pedanc e pr obe tip acr oss COUT to m eas ure VOUT
Ripple to avoid noise coupling into the probe ground lead. The
recommended probe configuration is shown in Figure 3.
Figure 3. Rec om m ended probe c onfiguration.
Input and Output Capacitors
The input c apac itanc e requirem ent is a 10 uF and a 680pF MLCC c apac itor in
parallel. The s m aller valued c apac itor , the 680pF, must be placed closest to the
EP53F8Q I. Both c apac itors have been placed as close to the device as possible
to minimize the phys ic al ar ea of the input AC c urrent loop.
There is a pre-tinned pad that allow s for an additional 0805 case size MLCC
capacitor to experim ent w ith input filter perform anc e.
The output capacitance requirement is a minimum of 22uF. The evaluation
board comes populated with a single 22uF 0805 case size M LCC capacitor.
The board has a pre-tinned pad for up to 1 additional 0805 case size output
capacitor.
NOTE: C apac itors m us t be X5R or X7R dielec tr ic form ulations .
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Enpirion® Power Evaluation Board User Guide
EP53F8QI PowerSoC
Evaluation Board Metal Layers
Figure 4. Top layer m etal w ith s ilks c reen.
Figure 5. Top layer m etal.
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Enpirion® Power Evaluation Board User Guide
EP53F8QI PowerSoC
Figure 6. B ottom layer m etal.
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Enpirion® Power Evaluation Board User Guide
EP53F8QI PowerSoC
Evaluation Board Schematic
R5 = 237k
R3 = 46.4k for 3.7V VOUT for VIN = 5V
R4 = 118k for 1.8V VOUT for VIN = 5V
R6 = 237k for 1.2V VOUT for VIN = 5V
R7 = 357k for 1.0V VOUT for VIN = 5V
C6 = 5.0pF
C2 = 680pF
C1 = 10uF
C5 = 22uF
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Enpirion® Power Evaluation Board User Guide
EP53F8QI PowerSoC
Contact Information
Altera Corporation
101 Innovation Drive
San Jos e, CA 95134
Phone: 408-544-7000
www.altera.com
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