8-Bit Tran sceiv er
fax id: 7036
CY74FCT2245T
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
July 1994 – Revised October 1996
1CY74FCT2245T
Features
•Function and pinout compatible with FCT and F logic
•25Ω output series resistors to reduce transmission line
ref lecti on nois e
•FCT-C speed at 4.1 ns max.
FCT-A speed at 4.6 ns max.
•Edge-rate con trol circuitry for significantly improved
noise c h aracteristics
•Power-off disable feature
•Fully compatible with TTL inp ut and outpu t logic levels
•ESD > 2000V
• Sink current 12 mA
Source current 15 mA
•Extended commercial temp. range of –40°C to +85°C
• Three-state outputs
Functional Description
The FCT2245T contains eight non-inverting, bidirectional buffers
with three-state outputs intended for bus oriented applications.
On-chip termination resistors have been added to the outputs to
reduce system noise caused by reflections. For this reason, the
FCT2245T can be used in an existing design to replace the
FCT245T. The FCT2245T current sinking capability is 12 mA at the
A and B ports.
The Transmit/Receive (T/R) input determines the direction of data
flow through the bidirectional transceiver. Transmit (Active HIGH)
enables data from A ports to B ports; receive (Active LOW) e nables
data from B ports to A ports. The output enable (OE) input, when
HIGH, disa bles both the A an d B ports by putti ng them in a High Z
condition.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Function Table[1]
Inputs OutputOE T/R
L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X High Z State
Note:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
Logic Block Diagram Pin Configurations
FCT2245T–1
A0
A1
A2
A3
A4
A5
A6
A7
OE
B0
B1
B2
B3
B4
B5
B6
B7
T/R
1
2
3
4
5
6
7
8
9
10 11
12
16
17
18
19
20
13
14
VCC
FCT2245T–3
15
Top View
A0
A1
A2
A3
A4
A5
A6
A7
OE
B0
B1
B2
B3
B4
B5
B6
B7
T/R
GND
DIP/SOIC/QSOP
CY74FCT2245T
2
Maximum Ratings[2,3]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–65°C to +135°C
Supply Volta ge to Ground Potential.. ............. –0.5V to +7.0V
DC Input Voltage............................................ –0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin).......120 mA
Power Dissipation. ...................... ............................. ......0.5W
Static Discharge Voltage ...........................................>2001V
(per MIL-STD-883, Method 3015)
Operating Range
Range Range Ambient
Temperature VCC
Commercial DT 0°C to +70°C 5V ± 5%
Commercial T, AT, CT –40°C to +85°C 5V ± 5%
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.[5] Max. Unit
VOH Output HIGH Voltage VCC=Min., IOH=–15 mA Com’l 2.4 3.3 V
VOL Output LOW Voltage VCC=Min., IOL=12 mA Com’l 0.3 0.55 V
ROUT Outp ut Resistance VCC=Min., IOL=12 mA Com’l 20 25 40 Ω
VIH Input HIGH Voltage 2.0 V
VIL Input LOW Voltage 0.8 V
VHHysteresis[6] All inputs 0.2 V
VIK Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V
IIInpu t HIGH Current VCC=Max., VIN=VCC 5µA
IIH Input HIGH Current VCC=Max., VIN=2.7V ±1µA
IIL Input LOW Current VCC=Max., VIN=0.5V ±1µA
IOS Output Short Circuit Current[7] VCC=Max., VOUT=0.0V –60 –120 –225 mA
IOFF Power-Off Disable VCC=0V, VOUT=4.5V ±1µA
Capacitance[6]
Parameter Description Test Condit ions Typ.[5] Max. Unit
CIN Input Capacitance 5 10 pF
COUT Outp ut Capacitance 9 12 pF
Notes:
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logi c voltage level, pre ferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25°C ambient.
6. This parameter is guaranteed but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable i n order to minimize internal chip heating and more accurately reflect operational values . Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last .
CY74FCT2245T
3
Power Supply Characteristics
Parameter Description Test Conditions Typ.[5] Max. Unit
ICC Quiescent Power Supply Current VCC=Max., VIN < 0.2V,
VIN > VCC–0.2V 0.1 0.2 mA
∆ICC Quiescent Power Supply Current
(TTL inputs) VCC=Max., VIN=3.4V,[8]
f1=0, Outputs Open 0.5 2.0 mA
ICCD Dynamic Power Supply
Current[9] VCC=Max., One Input Toggling,
50% Duty Cycle, Outputs Open,
T/R=OE=GND,
VIN < 0. 2 V or VIN > VCC–0.2V
0.06 0.12 mA/MHz
ICTotal Power Supply Current[10] VCC=Max., 50% Duty Cycle,
Outputs Open,
One Bit Toggling at f1=10 MHz,
T/R=OE=GND,
VIN < 0.2V or VIN > VCC–0.2V
0.7 1.4 mA
VCC=Max.,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
T/R=OE=GND,
VIN=3.4V or VIN=GND
1.0 2.4 mA
VCC=M ax.,
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
T/R=OE=GND,
VIN < 0.2V or VIN > VCC–0.2V
1.3 2.6[11] mA
VCC=Max.,
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
T/R=OE=GND,
VIN=3.4V or VIN=GND
3.3 10.6[11] mA
Notes:
8. Per TTL dri ven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC=I
QUIESCENT + IINPUTS + IDYNAMIC
IC=I
CC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)
DH= Duty Cycle for TTL inputs HIGH
NT= Number of TTL inputs at DH
ICCD = Dynamic Current caused b y an input transition pair (HLH or LHL)
f0= Clock frequency for registered devices, otherwise zero
f1= Input signal frequency
N1= Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
CY74FCT2245T
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]
Document #: 38-00349-B
Switching Characteristics—Over the Operating Range[12]
Parameter Description
FCT2245T FCT2245AT FCT2245CT FCT2245DT
Unit Fig.
No.[13]
Commercial Commercial Commercial Commercial
Min. Max. Min. Max. Min. Max. Min. Max.
tPLH
tPHL Propagation Delay
An to Bn or Bn to An1.5 7.0 1.5 4.6 1.5 4.1 1.5 3.8 ns 1, 3
tPZH
tPZL Output Enable Time 1.5 9.5 1.5 6.2 1.5 5.8 1.5 5.0 ns 1, 7, 8
tPHZ
tPLZ Output Disable Time 1.5 7.5 1.5 5.0 1.5 4.5 1.5 4.3 ns 1, 7, 8
Orde rin g Inf orm a tio n—F CT 2 24 5T
Speed
(ns) Order ing Code Package
Name Package Type Operating
Range
3.8 CY74FCT2245DTQC Q5 20- Lead (150-Mil) QSOP Commercial
CY74FCT2245DTSOC S5 20- Lead (300-Mil) Molded SOIC
4.1 CY74FCT2245CTQC Q5 20- Lead (150-Mil) QSOP Commercial
CY74FCT2245CTSOC S5 20- Lead (300-Mil) Molded SOIC
4.6 CY74FCT2245ATPC P5 20-Lead (300-Mil) Molded DIP Commercial
CY74FCT2245ATQC Q5 20-Lead (1 50-Mil) QSOP
CY74FCT2245ATSOC S5 20-Lead (3 00-Mil) Molded SOIC
7.5 CY74FCT2245TPC P5 20- Lead (300-Mil) Molded DIP Commercial
CY74FCT2245TQC Q5 20- Lead (150-Mil) QSOP
CY74FCT2245TSOC S5 20- Lead (300-Mil) Molded SOIC
Shaded areas contain preliminary information.
Notes:
12. Minimum limits are guaranteed but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
CY74FCT2245T
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Package Diagrams
20-Lead (300-Mil) Molded DIP P5
20-Lead Quarter Size Outline Q5
CY74FCT2245T
© Cypress Semiconductor Corporation, 1996. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsib ility for the use
of any circuitry othe r than circui try embodi ed in a Cypress Semi conductor prod uct. Nor do es it convey or im ply an y li cens e under p atent or other rights . Cypress Semi conductor does not authori ze
its products for use as criti cal components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
Package Diagrams (continued)
20-Lead (300-Mil) Molded SOIC S5
