LTC3035
1
3035f
■
Wide Input Voltage Range: 1.7V to 5.5V
■
Wide Adjustable Output Voltage Range:
0.4V to 3.6V
■
Built-In Charge Pump Generates High Side Bias
■
Very Low Dropout: 45mV at 300mA
■
±
2% Voltage Accuracy Over Temperature,
Supply, Load
■
Fast Transient Recovery
■
Low Operating Current: I
IN
= 100µA Typ
■
Low Shutdown Current: I
IN
= 1µA Typ
■
Stable with Ceramic Capacitor Down to 1µF
■
Output Current Limit
■
Thermal Overload Protected
■
Reverse Output Current Protected
■
Available in 8-Lead (3mm × 2mm) DFN Package
TYPICAL APPLICATIO
U
FEATURES
DESCRIPTIO
U
The LTC
®
3035 is a micropower, VLDO™ (very low drop-
out) linear regulator which operates from input voltages as
low as 1.7V. The device is capable of supplying 300mA of
output current with a typical dropout voltage of only
45mV. To allow operation at low input voltages the LTC3035
includes a charge pump generator that provides the nec-
essary bias voltage for the internal LDO circuitry. Output
current comes directly from the input supply for high
efficiency regulation. The charge pump bias generator
requires only a 0.1µF flying capacitor and a 1µF bypass
capacitor for operation. The low 0.4V internal reference
voltage allows the LTC3035 to be programmed to much
lower output voltages than commonly available in LDOs.
The output voltage is programmed via two tiny SMD
resistors. The LTC3035’s low quiescent current makes it
an ideal choice for use in battery-powered systems.
Other features include high output voltage accuracy, ex-
cellent transient response, stability with ultralow ESR
ceramic capacitors as small as 1µF, short-circuit and
thermal overload protection, output current limiting and
reverse output current protection. The LTC3035 is avail-
able in a tiny, low profile (3mm × 2mm × 0.75mm) 8-lead
DFN package.
300mA VLDO Linear
Regulator with Charge Pump
Bias Generator
APPLICATIO S
U
■
Li-Ion to 3.3V Low Dropout Supplies
■
2 × AA to 1.8V Low Dropout Supplies
■
Low Power Handheld Devices
■
Low Voltage Logic Supplies
■
DSP Power Supplies
■
Cellular Phones
■
Portable Electronic Equipment
■
Handheld Medical Instruments
■
Post Regulator for Switching Supply Noise Rejection
3.3V Output Voltage from Li-Ion Battery
, LTC and LT are registered trademarks of Linear Technology Corporation.
VLDO is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 6411531, others pending.
I
OUT
(mA)
0
70
60
50
40
30
20
10
0150 250
3035 TA01b
50 100 200 300
DROPOUT VOLTAGE (mV)
T
A
= 25°C
Dropout Voltage vs Load Current
CP
0.4V
IN
SHDN GND
Li-Ion
BATTERY
3.4V TO 4.2V
1µF
0.1µF
CBIAS
1µF
COUT
1µF
3035 TA01a
294k
40.2k
VOUT
3.3V
300mA
OFF ON
CM
BIAS
OUT
ADJ
BIAS
GENERATOR
LTC3035
+
–
LTC3035
2
3035f
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Notes 1, 2)
V
IN
to GND.................................................. –0.3V to 6V
SHDN to GND ............................................. –0.3V to 6V
CP, CM, BIAS to GND ................................. –0.3V to 6V
ADJ to GND ................................................ – 0.3V to 6V
V
OUT
to GND ............................................... –0.3V to 6V
Operating Junction Temperature
(Note 3) ........................................... –40°C to 125°C
Storage Temperature Range ................ – 65°C to 125°C
Output Short Circuit Duration .......................... Indefinite
ORDER PART NUMBER
Consult LTC Marketing for parts specified with wider operating temperature ranges.
LTC3035EDDB
TOP VIEW
9
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
5
6
7
8
4
3
2
1CP
CM
GND
IN
BIAS
SHDN
ADJ
OUT
T
JMAX
= 125°C, θ
JA
= 76°C/W
EXPOSED PAD (PIN 9) IS GND,MUST BE SOLDERED TO PCB
DDB PART MARKING
LBRM
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full specified temperature
range, otherwise specifications are at TA = 25
°
C. VIN = 3.6V, VOUT = 3.3V, CFLY = 0.1
µ
F, COUT = 1
µ
F, CIN = 1
µ
F, CBIAS = 1
µ
F (all
capacitors ceramic) unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
Operating Voltage (Note 4) ●1.7 5.5 V
V
BIAS
Output Voltage Range 2.63V < V
IN
< 5.5V ●4.8 5 5.3 V
1.7V < V
IN
< 2.63V ● 1.85 • V
IN
1.90 • V
IN
1.95 • V
IN
V
V
OUT
Output Voltage Range ●V
ADJ
3.6 V
V
IN
Operating Current I
OUT
= 10µA●100 200 µA
V
IN
Shutdown Current V
SHDN
= 0V 1 5 µA
V
ADJ
Regulation Voltage (Note 5) 1mA < I
OUT
< 300mA, 1.7V < V
IN
< 5.5V, ●0.392 0.4 0.408 V
V
OUT
= 1.5V
I
ADJ
ADJ Input Current V
ADJ
= 0.4V ●–50 0 50 nA
OUT Load Regulation (Referred to ADJ Pin) I
OUT
= 1mA to 300mA –0.2 mV
Dropout Voltage (Note 6) V
IN
= 1.7V, V
ADJ
= 0.37V, I
OUT
= 300mA ●45 100 mV
I
OUT
Continuous Output Current ●300 mA
I
OUT
Short Circuit Output Current V
ADJ
= V
OUT
= 0 760 mA
V
OUT
Output Noise Voltage F = 10Hz to 100kHz, I
OUT
= 150mA 150 µVrms
V
IH
SHDN Input High Voltage ●1.1 V
V
IL
SHDN Input Low Voltage ●0.3 V
I
IH
SHDN Input High Current SHDN = V
IN
–1 1 µA
I
IL
SHDN Input Low Current SHDN = 0V –1 1 µA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: The LTC3035 regulator is tested and specified under pulse load
conditions such that T
J
≈ T
A
. The LTC3035 is 100% production tested at
25°C. Performance at –40°C and 125°C is assured by design,
characterization and correlation with statistical process control.
Note 4: Min Operating Input Voltage required for regulation is:
V
IN
> V
OUT
+ V
DROPOUT
and V
IN
> 1.7V
LTC3035
3
3035f
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Dropout Voltage vs Load Current
ADJ Voltage vs Input VoltageADJ Voltage vs Temperature
VIN Shutdown Current VIN No Load Operating Current
VIN No Load Operating Current
I
OUT
(mA)
0
70
60
50
40
30
20
10
0150 250
3035 G01
50 100 200 300
DROPOUT VOLTAGE (mV)
T
A
= 125°C
T
A
= –40°C
T
A
= 25°C
VIN (V)
0
0
IIN (µA)
1.0
2.0
3.0
1234
LT1108 • TPC12
5
4.0
5.0
0.5
1.5
2.5
3.5
4.5
6
TA = –40°C
TA = 85°C
TA = 25°C
V
IN
(V)
3
115
110
105
100
95
90
85
80 4.5 5.5
3035 G03
3.5 4 56
I
IN
(µA)
V
OUT
= 3.3V
T
A
= –40°C
T
A
= 25°C
T
A
= 85°C
T
A
= 125°C
VIN (V)
0
60
IIN (µA)
70
80
90
100
120
1234
3035 G04
56
110
VOUT = 1.5V
TA = –40°C
TA = 25°C
TA = 125°C
TA = 85°C
TEMPERATURE (°C)
–45
396
ADJUST VOLTAGE (mV)
397
399
400
401
402
403
–5 35 55
3035 G05
398
–25 15 75 95 115
404 VOUT = 3.3V
V
IN
(V)
0
ADJ VOLTAGE (mV)
4
3035 G06
2
15
36
404
403
402
401
400
399
398
397
396
V
OUT
= 1.5V
ELECTRICAL CHARACTERISTICS
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must
be limited.
Note 6: Dropout voltage is minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to V
IN
– V
DROPOUT
.
LTC3035
4
3035f
TYPICAL PERFOR A CE CHARACTERISTICS
UW
VIN Ripple Rejection vs Frequency
Current Limit vs Input Voltage
V
IN
(V)
1.5
CURRENT LIMIT (mA)
500
600
700
5.55
3035 G10
400
300
02342.5 3.5 4.5
100
200
900
800
V
OUT
= 0V
Transient Response
VOUT
20mV/DIV
AC
IOUT
300mA
200µs/DIVVIN = 3.6V
VOUT = 3.3V
COUT = 1µF
3035 G11
10mA
BIAS Output Ripple
V
BIAS
50mV/DIV
AC
V
OUT
5mV/DIV
AC
500µs/DIVV
IN
= 3.6V
V
OUT
= 3.3V
C
BST
= 1µF
C
FLY
= 0.1µF
C
OUT
= 1µF
I
OUT
= 1mA
3035 G12
FREQUENCY (Hz)
100
50
60
70
1M
3035 G13
40
30
1k 10k 100k 10M
20
10
0
REJECTION (dB)
C
OUT
= 10µF
V
IN
= 3.6V
V
OUT
= 3.3V
I
OUT
= 100mA
C
OUT
= 1µF
BIAS Voltage vs Input Voltage
SHDN Threshold (Rising)
vs Temperature
SHDN Threshold (Falling)
vs Temperature
VIN (V)
0
0
BIAS VOLTAGE (V)
1
2
3
4
6
1234
3035 G07
50.5 1.5 2.5 3.5 4.5 5.5 6
5
TEMPERATURE (°C)
–45
400
SHDN THRESHOLD (mV)
500
700
1000
555 80
3035 G08
600
900
800
–20 30 105 130
VIN = 1.7V
VIN = 3.6V
VIN = 5.5V
TEMPERATURE (°C)
–45
400
SHDN THRESHOLD (mV)
500
700
1000
555 80
3035 G09
600
900
800
–20 30 105 130
VIN = 1.7V
VIN = 3.6V
VIN = 5.5V
LTC3035
5
3035f
BLOCK DIAGRA
W
BIAS
UVLO
+
–
–
+
BIAS
5V
1.9 • V
IN
CP
800kHz
OSCILLATOR
CHARGE
PUMP
EN
REFERENCE
SHDN 0.400V
SOFT-START BIAS
2.5k
8
1
CM 2
OUT 5
ADJ 6
V
MIN
V
IN
4
SHDN
7
GND
PINS 3, 9
3035 BD
UU
U
PI FU CTIO S
CP (Pin 1): Flying Capacitor Positive Terminal.
CM (Pin 2): Flying Capacitor Negative Terminal.
GND (Pin 3): Ground. Connect to a ground plane.
IN (Pin 4): Input Supply Voltage. The output load current
is supplied directly from IN. The IN pin should be locally
bypassed to ground if the LTC3035 is more than a few
inches away from another source of bulk capacitance. In
general, the output impedance of a battery rises with
frequency, so it is usually adviseable to include an input
bypass capacitor when supplying IN from a battery. A
capacitor of 1µF is usually sufficient.
OUT (Pin 5): Regulated Output Voltage. The OUT pin
supplies power to the load. A minimum ceramic output
capacitor of at least 1µF is required to ensure stability.
Larger output capacitors may be required for applications
with large transient loads to limit peak voltage transients.
See the Applications Information section for more infor-
mation on output capacitance.
ADJ (Pin 6): Adjust Input Pin. This is the input to the error
amplifier. The ADJ pin reference voltage is 0.4V referenced
to ground. The output voltage range is 0.4V to 3.6V and is
set by connecting ADJ to a resistor divider from OUT to
GND.
SHDN (Pin 7): Shutdown Input, Active Low. This pin is
used to put the LTC3035 into shutdown. The SHDN pin
current is typically less than 10nA. The SHDN pin cannot
be left floating and must be tied to a valid logic level if
not used.
BIAS (Pin 8): BIAS Output Voltage Pin. BIAS is the output
of the charge pump and provides the high side supply for
the LTC3035 LDO circuitry. This pin should be locally
bypassed to ground by a 1µF or greater capacitor as close
as possible to the pin. Nothing else should be connected
to this pin.
Exposed Pad (Pin 9): Ground and Heat Sink. Must be
soldered to PCB ground plane or large pad for optimal
thermal performance.
LTC3035
6
3035f
The LTC3035 is a VLDO (very low dropout) linear regulator
which operates from input voltages between 1.7V and
5.5V. The LDO uses an internal NMOS transistor as the
pass device in a source-follower configuration. The inter-
nal charge pump generator provides the high supply
necessary for the LDO circuitry while the output current
comes directly from the IN input for high efficiency
regulation.
Charge Pump Operation
The LTC3035 contains a charge pump to produce the
necessary bias voltage supply for the LDO. The charge
pump utilizes Burst Mode operation to achieve high
efficiency for the relatively low current levels needed for
the LDO circuitry. The charge pump requires only a small
0.1µF flying capacitor between the CP and CM pins and a
1µF bypass capacitor at BIAS.
An internal oscillator centered at 800kHz controls the
two-phase switching cycle of the charge pump. During the
first phase a current source charges the flying capacitor
between V
IN
and GND. During the second phase, the
capacitor’s positive terminal connects to BIAS and the
current source drives the capacitor’s minus terminal,
delivering charge to the BIAS bypass capacitor and in-
creasing its voltage.
A burst comparator with hysteresis monitors the voltage
on the BIAS pin. When BIAS is above the upper threshold
of the comparator, the oscillator is disabled and no switch-
ing occurs. When BIAS falls below the comparator’s lower
threshold, the oscillator is enabled and the BIAS pin gets
charged. The thresholds of the burst comparator are
dynamically adjusted to maintain a DC level shown by
Figure 1. BIAS regulates to 1.9 • V
IN
or 5V, whichever
voltage is lower. The voltage ripple at BIAS is controlled to
approximately 1% of its DC value.
LDO Operation
An undervoltage lockout comparator (UVLO) senses the
BIAS voltage to ensure that the BIAS supply for the LDO is
greater than 90% of its regulation value before
enabling the LDO. Once the LDO gets enabled, the UVLO
threshold switches to 50% of its regulation value. Thus the
BIAS voltage must fall below 50% of its regulation voltage
Figure 1. LTC3035 BIAS Voltage vs VIN Voltage
(Refer to Block Diagram)
1.7 2.63
3.23
BIAS (V)
5
VIN (V)
5.5 3035 F01
1.9 • VIN
before the LDO disables. When the LDO is disabled, OUT
is pulled to GND through the external divider and an
internal 2.5k resistor.
The LDO provides a high accuracy output capable of
supplying 300mA of output current with a typical dropout
voltage of only 45mV. A single ceramic capacitor as small
as 1µF is all that is required for output bypassing. The low
reference voltage allows the LTC3035 output to be
programmed from 0.4V to 3.6V.
As shown in the Block Diagram, the charge pump output
at BIAS supplies the LDO circuitry while the output current
comes directly from the IN input for high efficiency
regulation. The low quiescent supply current, I
IN
= 100µA,
drops to I
IN
= 1µA typical in shutdown making the LTC3035
an ideal choice for use in battery-powered systems.
The device also includes current limit, thermal overload
protection, and reverse output current protection. The fast
transient response of the follower output stage overcomes
the traditional tradeoff between dropout voltage, quies-
cent current and load transient response inherent in most
LDO regulator architectures. The LTC3035 also includes
overshoot detection circuitry which brings the output back
into regulation when going from heavy to light output
loads (see Figure 2).
The LTC3035 also includes a soft-start feature to prevent
excessive current flow during start-up. After the BIAS
voltage reaches regulation, the soft-start circuitry gradu-
ally increases the LDO reference voltage from 0V to 0.4V
over a period of about 600µs. There is a short 700µs delay
from the time BIAS reaches regulation until the LDO
output starts to rise (see Figure 3).
APPLICATIO S I FOR ATIO
WUUU
LTC3035
7
3035f
Figure 2. Output Step Response
Adjustable Output Voltage
The output voltage is set by the ratio of two external
resistors as shown in Figure 4. The device servos the
output to maintain the ADJ pin voltage at 0.4V (referenced
to ground). Thus the current in R1 is equal to 0.4V/R1. For
good transient response, stability and accuracy the
current in R1 should be at least 8µA, thus the value of R1
should be no greater than 50k. The current in R2 is the
current in R1 plus the ADJ pin bias current. Since the ADJ
pin bias current is typically <10nA it can be ignored in the
output voltage calculation. The output voltage can be
calculated using the formula in Figure 4. Note that in
shutdown the output is turned off and the divider current
will be zero once C
OUT
is discharged.
The LTC3035 operates at a relatively high gain of
–0.7µV/mA referred to the ADJ input. Thus a load
current change of 1mA to 300mA produces a –0.2mV
drop at the ADJ input. To calculate the change refered to
the output simply multiply by the gain of the feedback
network (i.e., 1 + R2/R1). For example, to program the
output for 3.3V choose R2/R1 = 7.25. In this example an
output current change of 1mA to 300mA produces
–0.2mV • (1 + 7.25) = 1.65mV drop at the output.
Output Capacitance and Transient Response
The LTC3035 is designed to be stable with a wide range of
ceramic output capacitors. The ESR of the output capaci-
tor affects stability, most notably with small capacitors. An
output capacitor of 1µF or greater with an ESR of 0.05Ω or
less is recommended to ensure stability. The LTC3035 is
a micropower device and output transient response will be
a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide
improved transient response for larger load current
changes. Note that bypass capacitors used to decouple
individual components powered by the LTC3035 will
increase the effective output capacitor value. High ESR
tantalum and electrolytic capacitors may be used, but a
low ESR ceramic capacitor must be in parallel at the
output. There is no minimum ESR or maximum capacitor
size requirements.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common di-
electrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit strong voltage and tem-
perature coefficients as shown in Figures 5 and 6. When
used with a 3.3V regulator, a 1µF Y5V capacitor can lose
as much as 80% of its rated capacitance over the operating
VOUT
20mV/DIV
AC
IOUT
300mA
200µs/DIVVIN = 3.6V
VOUT = 3.3V
COUT = 1µF
3035 F02
0mA
ON
OFF
V
BIAS
2V/DIV
V
OUT
2V/DIV
0V
SHDN
500µs/DIVV
IN
= 3.6V
V
OUT
= 3.3V
C
OUT
= 1µF
C
BIAS
= 1µF
3035 F03
0V
Figure 4. Programming the LTC3035
Figure 3. Bias and Output Start-Up Waveforms
V
OUT
C
OUT
R2
V
OUT
= 0.4V
3035 F04
R1
ADJ
GND
R2
R1
1 +
()
APPLICATIO S I FOR ATIO
WUUU
LTC3035
8
3035f
temperature range. The X5R only loses about 40% of its
rated capacitance over the operating temperature range.
The X5R and X7R dielectrics result in more stable charac-
teristics and are more suitable for use as the output
capacitor. The X7R type has better stability across tem-
perature and bias voltage, while the X5R is less expensive
and is available in higher values. In all cases, the output
capacitance should never drop below 0.4µF, or instability
or degraded performance may occur.
Charge Pump Component Selection
The flying capacitor controls the strength of the charge
pump. In order for the charge pump to deliver its maximum
available current, a 0.1µF or greater ceramic capacitor
should be used.
Warning: A polarized capacitor such as
tantalum or aluminum should never be used for the flying
capacitor since its voltage can reverse upon start-up of the
LTC3035. Low ESR ceramic capacitors should always be
used for the flying capacitor.
A 1µF or greater low ESR (<0.1Ω) ceramic capacitor is
recommended to bypass the BIAS pin. Larger values of
capacitance will not reduce the size of the BIAS ripple
much, but will decrease the ripple frequency proportion-
ally. The BIAS pin should maintain 0.4µF of capacitance at
all times to ensure correct operation. High ESR tantalum
and electrolytic capacitors may be used, but a low ESR
ceramic must be used in parallel for correct operation. It
is also recommended that IN be bypassed to ground with
a 1µF or greater ceramic capacitor.
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be the output current
multiplied by the input/output voltage differential:
(I
OUT
)(V
IN
– V
OUT
)
The LTC3035 has internal thermal limiting designed to
protect the device during momentary overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat-spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through holes can also be used to spread the heat
generated by power devices.
A junction to ambient thermal coefficient of 76°C/W is
achieved by connecting the Exposed Pad of the DFN
package directly to a ground plane of about 2500mm
2
.
Figure 6. Ceramic Capacitor Temperature Characteristics
Figure 5. Ceramic Capacitor DC Bias Characteristics
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
3035 F05
20
0
–20
–40
–60
–80
–100 02456
13
X5RY5V
BOTH CAPACITORS ARE 1µF,
6.3V, 0402 CASE SIZE
TEMPERATURE (°C)
–50
–100
CHANGE IN VALUE (%)
–80
–60
–40
–20
X5R
Y5V
20
–25 02550
3035 F06
75
0
BOTH CAPACITORS ARE 1µF,
6.3V, 0402 CASE SIZE
APPLICATIO S I FOR ATIO
WUUU
LTC3035
9
3035f
OPERATIO
U
Calculating Junction Temperature
Example: Given an output voltage of 1.5V, an input voltage
of 1.8V to 3V, an output current range of 0mA to 100mA
and a maximum ambient temperature of 50°C, what will
the maximum junction temperature be?
The power dissipated by the device will be approximately:
I
OUT(MAX)
(V
IN(MAX)
– V
OUT
)
where:
I
OUT(MAX)
= 100mA
V
IN(MAX)
= 3V
so:
P = 100mA(3V – 1.5V) = 0.15W
Even under worst-case conditions LTC3035’s BIAS pin
power dissipation is only about 1mW, thus can be
ignored. The junction to ambient thermal resistance will be
on the order of 76°C/W. The junction temperature rise
above ambient will be approximately equal to:
0.15W(76°C/W) = 11.4°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T = 50°C + 11.4°C = 61.4°C
Short-Circuit/Thermal Protection
The LTC3035 has built-in output short-circuit current
limiting as well as over temperature protection. During
short-circuit conditions, internal circuitry automatically
limits the output current to approximately 760mA. At
higher temperatures, or in cases where internal power
dissipation causes excessive self heating on chip, the
thermal shutdown circuitry will shut down the charge
pump and LDO when the junction temperature exceeds
approximately 155°C. It will reenable the converter and
LDO once the junction temperature drops back to approxi-
mately 140°C. The LTC3035 will cycle in and out of
thermal shutdown without latch-up or damage until the
overstress condition is removed. Long term overstress
(T
J
>125°C) should be avoided as it can degrade the
performance or shorten the life of the part.
Layout Considerations
Connection from the BIAS and OUT pins to their respective
ceramic bypass capacitor should be kept as short as
possible. The ground side of the bypass capacitors should
be connected directly to the ground plane for best results
or through short traces back to the GND pin of the part.
Long traces will increase the effective series ESR and
inductance of the capacitor which can degrade
performance.
The CP and CM pins of the charge pump are switching
nodes. The transition edge rates of these pins can be quite
fast (~10ns). Thus care must be taken to make sure these
nodes do not couple capacitively to other nodes (espe-
cially the ADJ pin). Place the flying capacitor as close as
possible to the CP and CM pins for optimum charge pump
performance.
Because the ADJ pin is relatively high impedance
(depending on the resistor divider used), stray capaci-
tance at this pin should be minimized (<10pF) to prevent
phase shift in the error amplifier loop. Additional special
attention should be given to any stray capacitances that
can couple external signals onto the ADJ pin producing
undesirable output ripple. For optimum performance
connect the ADJ pin to R1 and R2 with a short PCB trace
and minimize all other stray capacitance to the ADJ pin.
Figure 7 shows an example layout for the LTC3035.
Figure 7. Suggested Layout
C
BIAS
BIAS
3035 F07
SHDN
OUT
ADJ
IN
GND
CM
CP
CF
R2
VIA CONNECTION
TO GND PLANE
R1
C
OUT
C
IN
4
3
2
1
5
6
7
8
LTC3035
10
3035f
Efficiency vs Output Current Ripple Rejection
SW1 SW2
VIN VOUT
SHDN/SS FB
MODE/SYNC VC
RT
RT
60.4k
4
6
9
10
5
3
7
8
2
*
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
CIN, CBIAS, COUT: TDK C1005X5R0J105K
L1: SUMIDA CDRH6D38-100
1GND
LTC3440
IN BIAS
CP CM
SHDN OUT
GND ADJ
LTC3035
SS
S
S
S S
S
S
S
S
S S
S
3035 TA02
C1
10µF
VIN = 2.7V TO 4.2V
C5 1.5nF
R3
15k
L1
10µH
Li-Ion
OFF ON
C2
22µF
CIN
1µF
S
R2
200k
R1
357k
3.4V
600mA
CBIAS
1µF
COUT
1µF
0.1µF
S
294k
VOUT = 3.3V
IOUT ≤ 300mA
40.2k
+
Low Noise Li-Ion to 3.3V Supply
TYPICAL APPLICATIO
U
OUTPUT CURRENT (mA)
0.1
Burst Mode IS A REGISTERED TRADEMARK OF
LINEAR TECHNOLOGY CORPORATION
0
EFFICIENCY (%)
10
30
40
50
100
70
110
3035 TA02b
20
80
90
60
100 1000
Burst Mode®
OPERATION
VIN = 2.7V
VIN = 4.2V
VIN = 3.6V
LTC3440
OUTPUT
AC
20mV/DIV
LTC3035
OUTPUT
AC
20mV/DIV
20µs/DIVI
OUT
= 25mA
3035 TA02c
LTC3035
11
3035f
PACKAGE DESCRIPTIO
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
2.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
0.56 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
2.15 ±0.05
(2 SIDES)
3.00 ±0.10
(2 SIDES)
14
85
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0 – 0.05
(DDB8) DFN 0905 REV B
0.25 ± 0.05
0.50 BSC
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
0.25 ± 0.05
2.20 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 ±0.05
(2 SIDES)
1.15 ±0.05
0.70 ±0.05
2.55 ±0.05
PACKAGE
OUTLINE
0.50 BSC
LTC3035
12
3035f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
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IN
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BIAS
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IN
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OUT(MIN)
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TYPICAL APPLICATIO S
U
Dual LDO Output (1.8V, 1.5V) from 2.5V Supply Rail
CP CM
0.1µF
1µF1µF
1µF
IN
LTC3035
SHDN
140k
V
OUT
= 1.8V
I
OUT
< 300mA
40.2k
GND
BIAS
V
IN
2.5V
OUT
ADJ
OFF ON
0.1µF0.1µF
1µF
IN
LTC3025
SHDN
110k
V
OUT
= 1.5V
I
OUT
< 300mA
40.2k
3035 TA03
GND
BIAS
OUT
ADJ
Dual LDO Output (1.5V, 1.2V) from 1.8V Supply Rail
CP CM
0.1µF
1µF1µF
1µF
IN
LTC3035
SHDN
110k
V
OUT
= 1.5V
I
OUT
< 300mA
40.2k
GND
BIAS
V
IN
1.8V
OUT
ADJ
OFF ON
0.1µF0.1µF
1µF
IN
LTC3025
SHDN
80k
V
OUT
= 1.2V
I
OUT
< 300mA
40.2k
3035 TA04
GND
BIAS
OUT
ADJ
