74AC11004
HEX INVERTER
SCAS033B − JANUARY 1988 − REVISED APRIL 1996
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DFlow-Through Architecture Optimizes
PCB Layout
DCenter-Pin VCC and GND Configuration
Minimizes High-Speed Switching Noise
DEPIC ™ (Enhanced-Performance Implanted
CMOS) 1-μm Process
D500-mA Typical Latch-Up Immunity at
125°C
DPackage Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, and Standard
Plastic 300-mil DIPs (N)
description
This device contains six independent inverters. It performs the Boolean function Y = A.
The 74AC11004 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H L
L H
logic symbol†
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
20
1A 19
2A
1Y
1
18
3A 13
4A
2Y
2
12
5A 11
6A
3Y
3
4Y
8
1
5Y
9
6Y
10
Copyright © 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1Y
2Y
3Y
GND
GND
GND
GND
4Y
5Y
6Y
1A
2A
3A
NC
VCC
VCC
NC
4A
5A
6A
DB, DW, OR N PACKAGE
(TOP VIEW)
NC − No internal connection
74AC11004
HEX INVERTER
SCAS033B − JANUARY 1988 − REVISED APRIL 1996
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
5Y
5A 12 9
4Y
4A 13 8
3Y
3A 18 3
2Y
2A 19 2
1Y
1A 20 1
6Y
6A 11 10
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DW package 1.6 W. . . . . . . . . . . . . . . . . .
DB package 0.6 W. . . . . . . . . . . . . . . . . . .
N package 1.3 W. . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
74AC11004
HEX INVERTER
SCAS033B − JANUARY 1988 − REVISED APRIL 1996
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
MIN NOM MAX UNIT
VCC Supply voltage 3 5 5.5 V
VCC = 3 V 2.1
VIH High-level input voltage VCC = 4.5 V 3.15 V
VIH
High level
input
voltage
VCC = 5.5 V 3.85
V
VCC = 3 V 0.9
VIL Low-level input voltage VCC = 4.5 V 1.35 V
VIL
Low level
input
voltage
VCC = 5.5 V 1.65
V
VIInput voltage 0 VCC V
VOOutput voltage 0 VCC V
VCC = 3 V −4
IOH High-level output current VCC = 4.5 V −24 mA
IOH
High level
output
current
VCC = 5.5 V −24
mA
VCC = 3 V 12
IOL Low-level output current VCC = 4.5 V 24 mA
IOL
Low level
output
current
VCC = 5.5 V 24
mA
Δt/ΔvInput transition rise or fall rate 0 10 ns/V
TAOperating free-air temperature −40 85 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
TA = 25°C
MIN
MAX
UNIT
PARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX UNIT
3 V 2.9 2.9
IOH = −50 μA4.5 V 4.4 4.4
IOH
50
μA
5.5 V 5.4 5.4
VOH IOH = −4 mA 3 V 2.58 2.48 V
VOH
I24 A
4.5 V 3.94 3.8
V
IOH = −24 mA 5.5 V 4.94 4.8
IOH = −75 mA†5.5 V 3.85
3 V 0.1 0.1
IOL = 50 μA4.5 V 0.1 0.1
IOL
50
μA
5.5 V 0.1 0.1
VOL IOL = 12 mA 3 V 0.36 0.44 V
VOL
I24 mA
4.5 V 0.36 0.44
V
IOL = 24 mA 5.5 V 0.36 0.44
IOL = 75 mA†5.5 V 1.65
IIVI = VCC or GND 5.5 V ±0.1 ±1μA
ICC VI = VCC or GND, IO = 0 5.5 V 4 40 μA
CiVI = VCC or GND 5 V 3.5 pF
†Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
74AC11004
HEX INVERTER
SCAS033B − JANUARY 1988 − REVISED APRIL 1996
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO TA = 25°C
MIN
MAX
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT) MIN TYP MAX MIN MAX UNIT
tPLH
A
Y
1.5 6.1 9 1.5 10
ns
tPHL
A Y 1.5 5.2 7.4 1.5 8.2 ns
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO TA = 25°C
MIN
MAX
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT) MIN TYP MAX MIN MAX UNIT
tPLH
A
Y
1.5 4.2 6.3 1.5 7.1
ns
tPHL
A Y 1.5 3.8 5.5 1.5 6 ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance per inverter CL = 50 pF, f = 1 MHz 29 pF
PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORMS
LOAD CIRCUIT
Input
(see Note B)
50% VCC 50% VCC
tPHL tPLH
VCC
Output
VOL
VOH
0 V
From Output
Under Test
CL = 50 pF
(see Note A) 500 Ω
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
50% 50%
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 20-Aug-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
74AC11004DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI
74AC11004DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74AC11004DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74AC11004DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74AC11004DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74AC11004DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74AC11004DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74AC11004N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
74AC11004NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 20-Aug-2011
Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
74AC11004DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
74AC11004DWR SOIC DW 20 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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