Data Sheet No. PD60277
Features
• Floating channel designed for bootstrap operation
to +600 V
• Tolerant to negative transient voltage, dV/dt
immune
• Gate drive supply range from 10 V to 20 V
• Undervoltage lockout for both channels
• 3.3 V, 5 V, and 15 V input logic input compatible
• Cross-conduction prevention logic
• Matched propagation delay for both channels
• Lower di/dt gate driver for better noise immunity
• Internal 100 ns deadtime
• Output in phase with input
HALF-BRIDGE DRIVER
Product Summary
VOFFSET 600 V max.
IO+/- (min) 60 mA/130 mA
VOUT 10 V - 20 V
Delay Matching 50 ns
Internal deadtime 100 ns
ton/off (typ.) 150 ns/150 ns
IRS2304(S)PbF
www.irf.com 1
LIN
HIN
VCC
COM
VB
HO
VS
LO
Vcc
LIN
HIN
up to 600 V
TO
LOAD
Block Diagram
Package
8 Lead
SOIC
8-Lead
PDIP
Description
The IRS2304 is a high voltage, high speed power
MOSFET and IGBT driver with independent high-side
and low-side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction.
The logic input is compatible with
standard CMOS or LSTTL output,
down to 3.3 V logic. The output driver
features a high pulse current buffer
stage designed for minimum driver
cross-conduction. The floating chan-
nel can be used to drive an N-chan-
nel power MOSFET or IGBT in the
high-side configuration which oper-
ates up to 600 V.
Part Input
logic
Cross-
conduction
prevention
logic
Deadtime
(ns) Ground Pins ton/toff
(ns)
2106/2301 COM
21064 HIN/LIN no none VSS/COM 220/200
2108 Internal 540 COM
21084 HIN/LIN yes Programmable 540 - 5000 VSS/COM 220/200
2109/2302 Internal 540 COM
21094 IN/SD yes Programmable 540 - 5000 VSS/COM 750/200
Feature Comparison
2304 HIN/LIN yes Internal 100 COM 160/140
(Refer to Lead Assignments for cor-
rect pin configuration). These dia-
grams show electrical connections
only. Please refer to our Application
Notes and DesignTips for proper cir-
cuit board layout.
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• RoHS compliant
IRS2304(S)PbF
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Note 1: Logic operational for VS of COM -5 V to COM +600 V. Logic state held for VS of COM -5 V to COM -VBS.
Symbol Definition Min. Max. Units
VS
High-side offset voltage VB - 25 VB + 0.3
VB
High-side floating supply voltage -0.3 625
VHO
High-side floating output voltage HO VS - 0.3 VB + 0.3
VCC
Low-side and logic fixed supply voltage -0.3 25
VLO
Low-side output voltage LO -0.3 VCC + 0.3
VIN Logic input voltage (HIN, LIN) -0.3 VCC + 0.3
Com Logic ground VCC -25 VCC + 0.3
dVS/dt Allowable offset supply voltage transient — 50 V/ns
PDPackage power dissipation @ TA ≤ +25 °C 8-Lead SOIC — 0.625
8-Lead PDIP — 1.0
RthJA Thermal resistance, junction to ambient 8-Lead SOIC — 200
8-Lead PDIP — 125
TJJunction temperature — 150
TSStorage temperature -50 150
TLLead temperature (soldering, 10 seconds) — 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions.
V
°C
Symbol Definition Min. Max. Units
VB
High-side floating supply voltage VS + 10 VS + 20
VS
High-side floating supply offset voltage Note 1 600
VHO
High-side (HO) output voltage VS
VB
VLO
Low-side (LO) output voltage COM VCC
VIN Logic input voltage (HIN, LIN) COM VCC
VCC
Low-side supply voltage 10 20
TAAmbient temperature -40 125 °C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15 V differential.
V
W
°C/W
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Symbol Definition Min. Typ.Max.UnitsTest Conditions
VCCUV+ VCC and VBS supply undervoltage positive going 88.9 9.8
VBSUV+ threshold
VCCUV- VCC and VBS supply undervoltage negative going 7.4 8.2 9
VBSUV- threshold
VCCUVH VCC supply undervoltage lockout hysteresis 0.3 0.7 —
VBSUVH
ILK
Offset supply leakage current — — 50 VB = VS = 600 V
IQBS Quiescent VBS supply current 20 60 150
IQCC Quiescent VCC supply current 50 120 240
VIH Logic “1” input voltage 2.3 — —
VIL
Logic “0” input voltage
— — 0.7
VOH
High level output voltage, VBIAS - VO
— 0.05 0.2
VOL Low level output voltage, VO—0.02 0.1
IIN+ Logic “1” input bias current — 5 40 VIN = 5 V
IIN-
Logic “0” input bias current — 1.0 5.0 VIN = 0 V
IO+ Output high short circuit pulse current 60 290 —
IO-
Output low short circuit pulsed current 130 600 —
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and VS is applicable to HO and LO.
V
V
Symbol Definition Min. Typ.Max.UnitsTest Conditions
ton Turn-on propagation delay 90 150 210 VS = 0 V
toff Turn-off propagation delay 90 150 210 VS = 0 V or 600 V
trTurn-on rise time — 70 120
tf
Turn-off fall time — 35 60
DT Deadtime 80 100 190
MT Delay matching, HS & LS turn-on/off — — 50
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, VS = COM, CL = 1000 pF and TA = 25 °C unless otherwise specified.
VO = 0 V
PW ≤ 10 µs
ns
µA
IO = 2 mA
mA
µA
VIN = 0 V or 5 V
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Functional Block Diagram
2304
LIN
UV
DETECT
DELAY COM
LO
VCC
HIN VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
PULSE
GENERATOR
SHOOT-
THROUGH
PREVENTION
Lead Definitions
Symbol Description
VCCLow-side supply voltage
COMLogic ground and low-side driver return
HINLogic input for high-side gate driver output
LINLogic input for low-side gate driver output
VBHigh-side floating supply
HOHigh-side driver output
VSHigh voltage floating supply return
LOLow-side driver output
IRS2304(S)PbF
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8
7
6
4
3
2
1LIN
COM
HIN
VCC
LO
HO
VB
VS
5
8-Lead PDIP
8
7
6
4
3
2
1LIN
COM
HIN
VCC
LO
HO
VB
VS
5
Lead Assignments
8-Lead SOIC
HIN
LIN
HO
LO
Figure 1. Input/Output Functionality Diagram
Internal Deadtime
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Figure 3. Internal Deadtime Timing
Figure 2. Switching Time Waveforms
HIN LIN
HO
LO
ton tr
50%
90%
10%
50%
90%
10%
toff tf
HIN
LIN
DT DT
90%
10%
50%
90%
10%
50%
LO
HO
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Max.
Typ.
Min.
7
8
9
10
11
12
-50 -25 0 25 50 75 100 125
Temperature (oC)
V
C C
a n d
Figure 4. VCC
and VBS Undervoltage
Threshold (+) vs. Temperature
Max.
Typ.
Min.
6
7
8
9
10
11
-50 -25 0 25 50 75 100
125
Temperature (oC)
V c c U V L O T h r e s h o l d ( - ) (V)
Figure 5. VCC / VDD Undervoltage Threshold (-)
vs. Temperature
Max.
0
60
120
180
240
300
-50 -25 0 25 50 75 100 125
Temperature (oC)
O f f s e t S u p p ly L e a k a g e C u r r e n t (µA)
Figure 6A. Offset Supply Leakage Current
vs. Temperature
Max.
0
60
120
180
240
300
0100 200 300 400 500 600
VB Boost Voltage (V)
O f f s e t Supp ly Leak ag e C u r r en t (
µ
A)
Figure 6B. Offset Supply Leakage Current
vs. Supply Voltage
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V BS U V L O T h r e s h o l d ( +) (V)
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Max.
Typ.
Min.
0
60
120
180
240
300
-50 -25 0 25 50 75 100
125
Temperature (oC)
V
Figure 7A. VBS Supply Current
vs. Temperature
Min.
Typ.
Max.
0
60
120
180
240
300
10 12 14 16 18 20
V
BS Supply Voltage (V)
VBS Supply Current (
µ
A)
Figure 7B. VBS Supply Current
vs. Supply Voltage
Typ.
Max.
Min.
0
100
200
300
400
500
-50 -25 0 25 50 75 100
125
Temperature (oC)
V
C C
Supp ly C ur r e nt (
µ
A)
Figure 8A. Quiescent VCC Supply
Current vs. Temperature
Typ.
Min.
Max.
0
100
200
300
400
500
10 12 14 16 18 20
VCC Supply Voltage (V)
V
CC
Supp ly C ur r e nt (
µ
A)
Figure 8B. Quiescent Vcc Supply Current
vs. Supply Voltage
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BS Supply Current (
µ
A)
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Min.
0
1
2
3
4
5
-50 -25 0 25 50 75 100
125
Temperature (oC)
Input Voltage (V)
Figure 9A. Logic "1" Input Voltage
vs. Temperature
Min.
0
1
2
3
4
5
6
5 10 15 20
Supply Voltage (V)
Input Voltage (V)
Figure 9B. Logic "1" Input Voltage
vs. Supply Voltage
Max.
0
1
2
3
4
-50 -25 0 25 50 75 100
125
Temperatre (oC)
Input Voltage (V)
Figure 10A. Logic "0" Input Voltage vs.
Temperature
Max.
0
1
2
3
4
10 12 14 16 18 20
Supply Voltage (V)
Input Voltage (V)
Figure 10B. Logic "0" Input Voltage
vs. Supply Voltage
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Max.
0.0
0.1
0.2
0.3
0.4
0.5
-50 -25 0 25 50 75 100
125
Temperature (oC)
H ig h L e v e l O u t p u t V o lt a g e ( V )
Figure 11A. High Level Output Voltage
vs. Temperature (Io = 2 mA)
Max
0.0
0.1
0.2
0.3
0.4
0.5
10 12 14 16 18
20
VBIAS Supply Voltage (V)
H ig h L ev el O ut put Vol t a ge ( V)
Figure 11B. High Level Output Voltage
vs. Supply Voltage (Io = 2 mA)
Max.
0.00
0.05
0.10
0.15
0.20
-50 -25 0 25 50 75 100
125
Temperature (oC)
Low Level Output Volt age (V)
Figure 12A. Low Level Output Voltage
vs.Temperature (Io = 2 mA)
Max
0.00
0.05
0.10
0.15
0.20
10 12 14 16 18
20
Low Level Output Voltage (V)
Figure 12B. Low Level Output
vs. Supply Voltage (Io = 2 mA)
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VBIAS Supply Voltage (V)
IRS2304(S)PbF
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Typ.
Max.
0
25
50
75
100
-50 -25 0 25 50 75 100
125
Logic "1" Input Curren t (µA)
Figure 13A. Logic "1" Input Current vs.
Temperature
Temperature (
oC)
Typ.
Max.
0
10
20
30
40
50
10 12 14 16 18
20
VCC Supply Voltage (V)
Logic "1" Input Current (µA))
Figure 13B. Logic "1" Input Current
vs. Supply Voltage
Max
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
Temperature (°C)
Lo gic "0" Input Bia s Current (µA)
Figure 14A. Logic "0" Input Bias Current
vs. Temperature
Max
0
1
2
3
4
5
6
10 12 14 16 18 20
Supply Voltage (V)
Logic "0" Input Bias Current (µA)
Figure 14B. Logic "0" Input Bias Current
vs. Voltage
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Min.
0
25
50
75
100
-50 -25 0 25 50 75 100
125
Temperature (oC)
O ut pu t Sou r c e C ur r e nt ( mA)
Figure 15A. Output Source Current vs.
Temperature
Min.
0
25
50
75
100
10 12 14 16 18
20
VBIAS Supply Voltage (V)
O ut pu t Sou r c e C ur r en t ( mA)
Figure 15B. Output Source Current
vs. Supply Voltage
Min.
0
50
100
150
200
-50 -25 0 25 50 75 100
125
Temperature (oC)
O ut pu t Si nk Cu r r e nt (mA)
Figure 16A. Output Sink Current
vs.Temperature
Min.
0
50
100
150
200
10 12 14 16 18
20
VBIAS Supply Voltage (V)
O u t p u t S in k C u r r e n t ( m A )
Figure 16B. Output Sink Current
vs. Supply Voltage
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0
100
200
300
400
500
-50 -25 0 25 50 75 100
125
Temperature(oC)
T u r n-On D el ay T ime ( ns ) .
Figure 17A. Turn-On Propagation Delay
vs. Temperature
Typ.
Max
0
100
200
300
400
500
10 12 14 16 18 20
Supply Voltage (V)
T ur n-On De lay T ime ( ns ) .
Figure 17B. Turn-On Propagation Delay
vs. Supply Voltage
Typ.
Max
Typ.
Max.
0
100
200
300
400
500
-50 -25 0 25 50 75 100
125
Temperature(oC)
Turn- Off Time (ns)
Figure 18A. Turn-Off Propagation Delay
vs. Temperature
Max.
Typ.
0
100
200
300
400
500
10 12 14 16 18 20
Supply Voltage (V)
T u r n- O f f T ime ( ns )
Figure 18B. Turn-Off Propagation Delay
vs. Supply Voltage
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Typ.
Max.
0
100
200
300
400
500
-50 -25 0 25 50 75 100
125
Temperature (oC)
Turn-O n Rise Time (n s) .
Figure 19A. Turn-On Rise Time
vs.Temperature
Typ
Max
0
100
200
300
400
500
10 12 14 16 18
20
VBIAS Supply Voltage (V)
Turn-O n Rise Time (n s) .
Figure 19B. Turn-On Rise Time
vs. Supply Voltage
Typ.
Max.
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 20A. Turn-Off Fall Time
vs. Temperature
Typ
Max
0
100
200
300
400
500
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 20B. Turn-Off Fall Time
vs. Supply voltage
Turn-Off Fall Time (n s)
Turn-Off Fall Time (n s)
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Max.
Typ.
Min.
0
50
100
150
200
250
300
-50 -25 0 25 50 75 100
125
Temperature (oC)
Dea dt i me ( n s )
Figure 21A. Deadtime vs. Temperature
Min.
Typ.
Max.
0
50
100
150
200
250
300
10 12 14 16 18 20
Supply Voltage (V)
Figure 21B. Deadtime Supply Voltage
Typ.
-10
-8
-6
-4
-2
0
10 12 14 16 18
20
VBS Floating Supply Voltage (V)
V
S
Offset Supply Voltage (V)
Figure 22. Maximum VS Negative Offset
vs. Supply Voltage
20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
140 V
70 V
0 V
Figure 23. IRS 2304 vs. Frequency (IRFBC20),
R
gate=33 Ω
, V
CC=15 V
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Dea dt i me ( n s )
vs.
Temperature (
o
C)
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20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
140 V
70 V
0 V
Figure 24. IRS2304 vs. Frequency (IRFBC30),
20
40
60
80
100
120
140
1 10 100
111000
Frequency (kHz)
Temperature (
o
C)
140 V
70 V
0 V
Figure 25. IRS2304 vs. Frequency (IRFBC40),
20
40
60
80
100
120
140
1 10 100
1000
Frequency (kHz)
Figure 26. IRS2304 vs. Frequency (IRFPE50),
70 V
0 V
140 V
20
40
60
80
100
120
140
110 100 1000
Frequency (kHz)
Tempe rature (
o
C)
Figure 27. IRS2304S vs. Frequency (IRFBC20),
140 V
70 V
0 V
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Rgate =22 Ω , Vcc =15 V
R
gate =15 Ω , Vcc =15 V
R
gate =33 Ω , Vcc =15 V
R
gate =10 Ω , Vcc =15 V
Temperature (
o
C)
IRS2304(S)PbF
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20
40
60
80
100
120
140
1 10 100 1000
Frequency (kHz)
Temperature (
o
C)
140 V
70 V
0 V
Figure 28. IRS2304S vs. Frequency (IRFBC30),
Rgate =22 Ω , Vcc =15 V
20
40
60
80
100
120
140
1 10 100
1000
Frequency (kHz)
Temperature (
o
C)
0 V
Figure 29. IRS2304S vs. Frequency (IRFBC40),
Rgate =15 Ω , Vcc =15 V
1140 V 70 V
20
40
60
80
100
120
140
1 10 100
1000
Frequency (kHz)
Tempr eture (
o
C)
Figure 30. IR2304s vs. Frequency (IRFPB50),
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Rgate =10 Ω , Vcc =15 V
140 V
70 V
0 V
IRS2304(S)PbF
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01-6027
01-0021 11 (MS-012AA)
8 Lead SOIC
87
5
65
D B
E
A
e
6X
H
0. 25 [. 010] A
6
4312
4. OUT LINE CONFORMS TO JEDEC OUT LINE MS-0 12AA.
NOTES:
1 . D IM E NSIONING & TOLER A N CING PER A S ME Y 14.5M-1 9 94.
2 . CONTROLLING DIMEN SION: MILLIME TER
3. DIMENSIONS ARE SHOWN IN MI L LIMETERS [ INCHES].
7
K x 45 °
8X L 8X c
y
FOOTPRINT
8X 0.7 2 [.028]
6.46 [ .255]
3X 1.2 7 [.050] 8X 1.7 8 [.070]
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSI ONS NOT TO EXCEED 0.25 [ .010] .
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
MOLD PROTRUSI ONS NOT TO EXCEED 0.15 [ .006] .
0. 25 [. 010] C A B
e1 A
A1
8X b
C
0. 10 [. 004]
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASI C
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX MILLIMETERSIN C H ES MIN MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BASI C 0.635 BASI C
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
Case outlines
IRS2304(S)PbF
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CARRIER TAPE DIMENSION FOR 8SOICN
Code Min Max Min Max
A7.90 8.10 0.311 0.318
B 3.90 4.10 0.153 0.161
C 11.70 12.30 0.46 0.484
D5.45 5.55 0.214 0.218
E6.30 6.50 0.248 0.255
F5.10 5.30 0.200 0.208
G1.50 n/a 0.059 n/a
H1.50 1.60 0.059 0.062
Metric Imperial
REEL DIMENSIONS FOR 8SOICN
Code Min Max Min Max
A 329.60 330.25 12.976 13.001
B20.95 21.45 0.824 0.844
C 12.80 13.20 0.503 0.519
D1.95 2.45 0.767 0.096
E 98.00 102.00 3.858 4.015
Fn/a 18.40 n/a 0.724
G 14.50 17.10 0.570 0.673
H 12.40 14.40 0.488 0.566
Metric Imperial
E
F
A
C
D
G
A
BH
NOTE : CONTROLLING
DIMENSION IN MM
LOADED TAPE FEED DIRECTION
A
H
F
E
G
D
B
C
Tape & Reel
8-lead SOIC
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IRS2304(S)PbF
20
ORDER INFORMATION
8-Lead PDIP IRS2304PbF
8-Lead SOIC IRS2304SPbF
8-Lead SOIC Tape & Reel IRS2304STRPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
LEADFREE PART MARKING INFORMATION
Lead Free Released
Non-Lead Free
Released
Part number
Date code
IRSxxxxx
YWW?
?XXXX
Pin 1
Identifier
IR logo
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
P
?MARKING CODE
www.irf.com
The SOIC-8 is MSL2 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
Data and specifications subject to change without notice. 12/4/2006