S-93C46B/56B/66B H Series
www.sii-ic.com
105°C OPERATION 3-WIRE SERIAL
E2PROM FOR AUTOMOTIVE
© Seiko Instruments Inc., 2010 Rev.2.0_00
Seiko Instruments Inc. 1
The S-93C46B/56B/66B H Series is a high temperature operation 1/2/4 K-bit 3-wire serial E2PROM for automotive
components. It is organized as 64-word × 16-bit, 128-word × 16-bit, 256-word × 16-bit, respectively. Each is capable of
sequential read, at which time addresses are automatically incremented in 16-bit blocks.
The communication method is by the Microwire bus.
Features
• Low current consumption Standby: 1.5 μA Max. (VCC = 5.5 V)
Read: 0.8 mA Max. (VCC = 5.5 V)
• Wide operating voltage range Read: 2.7 to 5.5 V (at −40 to +105°C)
Write: 2.7 to 5.5 V (at −40 to +105°C)
• Sequential read capable
• Write protect function during the low power supply Voltage
• Function to protect against write due to erroneous instruction recognition
• Endurance: 106 cycles/word*1 (at +85°C)
5 × 105 cycles/word*1 (at +105°C)
• Data retention: 100 years (at +25°C)
20 years (at +105°C)
• S-93C46B: 1 K-bit
• S-93C56B: 2 K-bit
• S-93C66B: 4 K-bit
• Lead-free, Sn 100%, halogen-free*2
*1. For each address (Word: 16-bit)
*2. Refer to “ Product Name Structure” for details.
Packages
• 8-Pin SOP (JEDEC)
• 8-Pin TSSOP
• TMSOP-8
Caution Before using the product in medical equipment or automobile equipment including car audio, keyless
entry and engine control unit, contact to SII is indispensable.
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
2
Pin Configurations
8-Pin SOP(JEDEC)
Top view Table 1
Pin No. Symbol Description
1 CS Chip select input
2 SK Serial clock input
3 DI Serial data input
4 DO Serial data output
5 GND Ground
6 TEST*1 T est
7 NC No connection
8 VCC Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so
long as the absolute maximum rating is not exceeded.
1
2
3
4
8
7
6
5
VCC
NC
TEST
GND
CS
SK
DO
DI
Figure 1
S-93C46BD0H-J8T2U
S-93C56BD0H-J8T2U
S-93C66BD0H-J8T2U
8-Pin TSSOP
Top view Table 2
Pin No. Symbol Description
1 CS Chip select input
2 SK Serial clock input
3 DI Serial data input
4 DO Serial data output
5 GND Ground
6 TEST*1 T est
7 NC No connection
8 VCC Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so long
as the absolute maximum rating is not exceeded.
1
2
3
4
8
7
6
5
VCC
NC
TEST
GND
CS
SK
DO
DI
Figure 2
S-93C46BD0H-T8T2U
S-93C56BD0H-T8T2U
S-93C66BD0H-T8T2U
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 3
TMSOP-8
Top view Table 3
Pin No. Symbol Description
1 CS Chip select input
2 SK Serial clock input
3 DI Serial data input
4 DO Serial data output
5 GND Ground
6 TEST*1 T est
7 NC No connection
8 VCC Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so long as
the absolute maximum rating is not exceeded.
3
2
4
1 8
6
7
5
VCC
NC
TEST
GND
CS
SK
DO
DI
Figure 3
S-93C46BD0H-K8T2U
S-93C56BD0H-K8T2U
S-93C66BD0H-K8T2U
Remark 1. See Dimensions for details of the package drawings.
2. Please select products of environmental code = U for Sn 100%, halogen-free products.
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
4
Block Diagram
Memory array
Data register
Address
decoder
Mode decode logic
Clock pulse
monitoring circuit
Output buffer
VCC
GND
DO
DI
CS
Clock generator
Voltage detector
SK
Figure 4
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 5
Instruction Sets
1. S-93C46B
Table 4
Instruction Start Bit
Operation
Code Address Data
SK input clock 1 2 3 4 5 6 7 8 9 10 to 25
READ (Read data) 1 1 0 A5 A4 A3 A2 A1 A0 D15 to D0 Output*1
WRITE (Write data) 1 0 1 A5 A4 A3 A2 A1 A0 D15 to D0 Input
ERASE (Erase data) 1 1 1 A5 A4 A3 A2 A1 A0 ⎯
WRAL (Write all) 1 0 0 0 1 x x x x D15 to D0 Input
ERAL (Erase all) 1 0 0 1 0 x x x x ⎯
EWEN (Write enable) 1 0 0 1 1 x x x x ⎯
EWDS (Write disable) 1 0 0 0 0 x x x x ⎯
*1. When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
2. S-93C56B
Table 5
Instruction Start Bit
Operation
Code Address Data
SK input clock 1 2 3 4 5 6 7 8 9 10 11 12 to 27
READ (Read data) 1 1 0 x A6 A5 A4 A3 A2 A1 A0 D15 to D0 Output*1
WRITE (Write data) 1 0 1 x A6 A5 A4 A3 A2 A1 A0 D15 to D0 Input
ERASE (Erase data) 1 1 1 x A6 A5 A4 A3 A2 A1 A0 ⎯
WRAL (Write all) 1 0 0 0 1 x x x x x x D15 to D0 Input
ERAL (Era s e all) 1 0 0 1 0 x x x x x x ⎯
EWEN (Write enable) 1 0 0 1 1 x x x x x x ⎯
EWDS (Write disable) 1 0 0 0 0 x x x x x x ⎯
*1. When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
3. S-93C66B
Table 6
Instruction Start Bit
Operation
Code Address Data
SK input clock 1 2 3 4 5 6 7 8 9 10 11 12 to 27
READ (Read data) 1 1 0 A7 A6 A5 A4 A3 A2 A1 A0 D15 to D0 Output*1
WRITE (Write data) 1 0 1 A7 A6 A5 A4 A3 A2 A1 A0 D15 to D0 Input
ERASE (Erase data) 1 1 1 A7 A6 A5 A4 A3 A2 A1 A0 ⎯
WRAL (Write all) 1 0 0 0 1 x x x x x x D15 to D0 Input
ERAL (Era s e all) 1 0 0 1 0 x x x x x x ⎯
EWEN (Write enable) 1 0 0 1 1 x x x x x x ⎯
EWDS (Write disable) 1 0 0 0 0 x x x x x x ⎯
*1. When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
6
Absolute Maximum Ratings
Table 7
Item Symbol Ratings Unit
Power supply voltage VCC −0.3 to +7.0 V
Input voltage VIN −0.3 to VCC +0.3 V
Output voltage VOUT −0.3 to VCC V
Operating ambient
temperature Topr −40 to +105 °C
Storage temperature Tstg −65 to +150 °C
Caution The absolute maximum ratings are rated values exceeding which the product
could suffer ph ysical damage. T h ese values must therefore no t be exceeded
under any conditions.
Recommended Operating Conditions
Table 8
−40 to +85°C +85 to +105°C
Item Symbol Conditions Min. Max. Min. Max.
Unit
READ, EWDS 1.8 5.5 2.7 5.5 V
WRITE, ERASE, EWEN 2.7 5.5 2.7 5.5 V
Power supply voltage VCC WRAL, ERAL 2.7 5.5 4.5 5.5 V
VCC = 4.5 to 5.5 V 2.0 VCC 2.0 VCC V
VCC = 2.7 to 4.5 V 0.8 × VCC VCC 0.8 × VCC V
CC V
High level input voltage VIH VCC = 1.8 to 2.7 V 0.8 × VCC VCC ⎯ ⎯ V
VCC = 4.5 to 5.5 V 0.0 0.8 0.0 0.8 V
VCC = 2.7 to 4.5 V 0.0 0.2 × VCC 0.0 0.2 × VCC V
Low level input voltage VIL VCC = 1.8 to 2.7 V 0.0 0.15 × VCC ⎯ ⎯ V
Pin Capacitance
Table 9
(Ta = 25°C, f = 1.0 MHz, VCC = 5.0 V)
Item Symbol Conditions Min. Max. Unit
Input Capacitance CIN VIN = 0 V ⎯ 8 pF
Output Capacitance COUT VOUT = 0 V ⎯ 10 pF
Endurance
Table 10
Item Symbol Operating Ambient Temperature Min. Max. Unit
−40 to +85°C 106 ⎯ cycles/word*1
Endurance NW +85 to +105°C 5 × 105 ⎯ cycles/word*1
*1. For each address (Word: 16 bits)
Data Retention
Table 11
Item Symbol Operating Ambient Temperature Min. Max. Unit
+25°C 100 ⎯ year
Data Retention ⎯ −40 to +105°C 20 ⎯ year
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 7
DC Electrical Characteristics
Table 12 (1/2)
−40 to +85°C
VCC = 4.5 to 5.5 V VCC = 2.5 to 4.5 V VCC = 1.8 to 2.5 V
Item Symbol Conditions
Min. Max. Min. Max. Min. Max.
Unit
Current consumption
(READ) ICC1 DO no load ⎯ 0.8 ⎯ 0.5 ⎯ 0.4 mA
Table 12 (2/2)
+85 to +105°C
VCC = 4.5 to 5.5 V VCC = 2.7 to 4.5 V
Item Symbol Conditions
Min. Max. Min. Max.
Unit
Current consumption
(READ) ICC1 DO no load ⎯ 0.8 ⎯ 0.5 mA
Table 13 (1/2)
−40 to +85°C
VCC = 4.5 to 5.5 V VCC = 2.7 to 4.5 V
Item Symbol Conditions
Min. Max. Min. Max.
Unit
Current consumption
(WRITE) ICC2 DO no load ⎯ 2.0 ⎯ 1.5 mA
Table 13 (2/2)
+85 to +105°C
VCC = 2.7 to 5.5 V
Item Symbol Conditions Min. Max.
Unit
Current consumption
(WRITE) ICC2 DO no load ⎯ 2.0 mA
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
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Table 14 (1/2)
−40 to +85°C
VCC = 4.5 to 5.5 V VCC = 2.5 to 4.5 V VCC = 1.8 to 2.5 V
Item Symbol Conditions
Min. Max. Min. Max. Min. Max.
Unit
Standby current
consumption ISB
CS = GND, DO = Open,
Other inputs to
VCC or GND ⎯ 1.5 ⎯ 1.5 ⎯ 1.5 μA
Input leakage current ILI VIN = GND to VCC ⎯ 1.0 ⎯ 1.0 ⎯ 1.0 μA
Output leakage current ILO V
OUT = GND to VCC ⎯ 1.0 ⎯ 1.0 ⎯ 1.0 μA
IOL = 2.1 mA ⎯ 0.4 ⎯ ⎯ ⎯ ⎯ V
Low level output voltage VOL IOL = 100 μA ⎯ 0.1 ⎯ 0.1 ⎯ 0.1 V
IOH = −400 μA 2.4 ⎯ ⎯ ⎯ ⎯ ⎯ V
IOH = −100 μA VCC− 0.3 ⎯ V
CC− 0.3 ⎯ ⎯ ⎯ V
High level output voltage VOH IOH = −10 μA VCC− 0.2 ⎯ V
CC− 0.2 ⎯ V
CC− 0.2 ⎯ V
Write enable latch data
hold voltage VDH Only when write
disable mode 1.5 ⎯ 1.5 ⎯ 1.5 ⎯ V
Table 14 (2/2)
+85 to +105°C
VCC = 4.5 to 5.5 V VCC = 2.7 to 4.5 V
Item Symbol Conditions Min. Max. Min. Max.
Unit
Standby current
consumption ISB
CS = GND, DO = Open,
Other inputs to
VCC or GND ⎯ 1.5 ⎯ 1.5 μA
Input leakage current ILI VIN = GND to VCC ⎯ 1.0 ⎯ 1.0 μA
Output leakage current ILO V
OUT = GND to VCC ⎯ 1.0 ⎯ 1.0 μA
IOL = 2.1 mA ⎯ 0.4 ⎯ ⎯ V
Low level output voltage VOL IOL = 100 μA ⎯ 0.1 ⎯ 0.1 V
IOH = −400 μA 2.4 ⎯ ⎯ ⎯ V
IOH = −100 μA VCC− 0.3 ⎯ V
CC− 0.3 ⎯ V
High level output voltage VOH IOH = −10 μA VCC− 0.2 ⎯ V
CC− 0.2 ⎯ V
Write enable latch data
hold voltage VDH Only when write
disable mode 1.5 ⎯ 1.5 ⎯ V
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 9
AC Electrical Characteristics
Table 15 Measurement Conditions
Input pulse voltage 0.1 × VCC to 0.9 × VCC
Output reference voltage 0.5 × VCC
Output load 100 pF
Table 16 (1/2)
−40 to +85°C
VCC = 4.5 to 5.5 V VCC = 2.5 to 4.5 V VCC = 1.8 to 2.5 V
Item Symbol
Min. Max. Min. Max. Min. Max.
Unit
CS setup time tCSS 0.2 ⎯ 0.4 ⎯ 1.0 ⎯ μs
CS hold time tCSH 0 ⎯ 0 ⎯ 0 ⎯ μs
CS deselect time tCDS 0.2 ⎯ 0.2 ⎯ 0.4 ⎯ μs
Data setup time tDS 0.1 ⎯ 0.2 ⎯ 0.4 ⎯ μs
Data hold time tDH 0.1 ⎯ 0.2 ⎯ 0.4 ⎯ μs
Output delay time tPD ⎯ 0.4 ⎯ 0.8 ⎯ 2.0 μs
Clock frequency*1 fSK 0 2.0 0 0.5 0 0.25 MHz
SK clock time “L” *1 tSKL 0.1 ⎯ 0.5 ⎯ 1.0 ⎯ μs
SK clock time “H” *1 tSKH 0.1 ⎯ 0.5 ⎯ 1.0 ⎯ μs
Output disable time tHZ1, tHZ2 0 0.15 0 0.5 0 1.0 μs
Output enable time tSV 0 0.15 0 0.5 0 1.0 μs
Table 16 (2/2)
+85 to +105°C
VCC = 4.5 to 5.5 V VCC = 2.7 to 4.5 V
Item Symbol
Min. Max. Min. Max.
Unit
CS setup time tCSS 0.2 ⎯ 0.4 ⎯ μs
CS hold time tCSH 0 ⎯ 0 ⎯ μs
CS deselect time tCDS 0.2 ⎯ 0.2 ⎯ μs
Data setup time tDS 0.1 ⎯ 0.2 ⎯ μs
Data hold time tDH 0.1 ⎯ 0.2 ⎯ μs
Output delay time tPD ⎯ 0.6 ⎯ 0.8 μs
Clock frequency*1 fSK 0 1.0 0 0.5 MHz
SK clock time “L” *1 tSKL 0.25 ⎯ 0.5 ⎯ μs
SK clock time “H” *1 tSKH 0.25 ⎯ 0.5 ⎯ μs
Output disable time tHZ1, tHZ2 0 0.15 0 0.5 μs
Output enable time tSV 0 0.15 0 0.5 μs
*1. T he clock cycle of the SK clock (frequency: fSK) is 1/fSK μs. This clock cycle is determined by a combination
of several AC characteristics, so be aware that even if the SK clock cycle time is minimized, the clock cycle
(1/fSK) cannot be made equal to tSKL(Min.) + tSKH(Min.).
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
10
Table 16
−40 to +85°C +85 to +105°C
VCC = 2.7 to 5.5 V VCC = 2.7 to 5.5 V
Item Symbol
Min. Typ. Max. Min. Typ. Max. Unit
Write time tPR ⎯ 4.0 8.0 ⎯ 4.0 8.0 ms
tSKH
tCDS
tCSS
CS
Valid data
DI
tSKL
SK
tSV tHZ2
tCSH
tHZ1
tPD tPD
tDS tDH
tDS tDH
High-Z Hi
g
h-Z
High-Z
DO
DO
(READ)
(VERIFY)
High-Z*1
Valid data
1/fSK*2
*1. Indicates high impedance.
*2. 1/fSK is the SK clock cycle. This clock cycle is determined by a combination of several AC characteristics,
so be aware that even if the SK clock cycle time is minimized, the clock cycle (1/fSK) cannot be made equal
to tSKL(Min.) + tSKH(Min.).
Figure 5 Timing Chart
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 11
Operation
All instructions are executed by inputting DI in synchronization with the rising edge of SK after CS goes high. An
instruction set is input in the order of start bit, instruction, address, and data.
Instruction input finishes when CS goes low. A low level must be input to CS between commands during tCDS. While a
low level is being input to CS, the S-93C46B/56B/66B is in standby mode, so the SK and DI inputs are invalid and no
instructions are allowed.
Start Bit
A start bit is recognized when the DI pin goes high at the rise of SK after CS goes high. After CS goes high, a start bit
is not recognized even if the SK pulse is input as long as the DI pin is low.
1. Dummy clock
SK clocks input while the DI pin is low before a start bit is input are called dummy clocks. Dummy clocks are
effective when aligning the number of instruction sets (clocks) sent by the CPU with those required for serial
memory operation. For example, when a CPU instruction set is 16 bits, the number of instruction set clocks can be
adjusted by inserting a 7-bit dummy clock for the S-93C46B and a 5-bit dummy clock for the S-93C56B/66B.
2. Start bit input failure
• When the output status of the DO pin is high during the verify period after a write operation, if a high level is input
to the DI pin at the rising edge of SK, the S-93C46B/56B/66B recognizes that a start bit has been input. To
prevent this failure, input a low level to the DI pin during the verify operation period (refer to “4.1 Verify
operation”).
• When a 3-wire interface is configured by connecting the DI input pin and DO output pin, a period in which the
data output from the CPU and the serial memory collide may be generated, preventing successful input of the
start bit. Take the measures described in “ 3-Wire Interface (Direct Connection between DI and DO)”.
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
12
3. Reading (READ)
The READ instruction reads data from a specified address.
After CS has gone high, input an instruction in the order of the start bit, read instruction, and address. Since the
last input address (A0) has been latched, the output status of the DO pin changes from high impedance (Hi-Z) to
low, which is held until the next rise of SK. 16-bit data starts to be output in synchronization with the next rise of
SK.
3. 1 Sequential read
After the 16-bit data at the specified address has been output, inputting SK while CS is high automatically
increments the address, and causes the 16-bit data at the next address to be output sequentially. The above
method makes it possible to read the data in the whole memory space. The last address (A n yyy A
1 A0 = 1 y
yy 1 1) rolls over to the top address (An yyy A
1 A0 = 0 yyy 0 0).
D15
D15 D14
D14 D13 D14
D13
D0
D1
D2
D15
0 D0
D1
D2 D13
A1
A2
A3
A4
A5
0 1 ① A
0
SK
DI
CS
DO High-Z
ADRINC
High-Z
282726252423121110 9 8 7 6 5 4 3 2 1 44 43 42 41 40 39
ADRINC
Figure 6 Read Ti min g (S-93C46B)
SK
D13
D15
0 D14 D14 D13
D0
D1
D2 D15 D14
D0
D1
D2 D13
D15
4140 43 44 42
2827262524
A3
A4
A5 A0
A1
A2
DI
13
11 10 9 8 76 5 4 3 2 1 12
CS
DO
A6
45
29
14
High-Z
ADRINC
High-Z
0 1 ①
ADRINC
x : S-93C56B
A7: S-93C66B
Figure 7 Read Ti min g (S-93C56B, S-93C66B)
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 13
4. Writing (WRITE, ERASE, WRAL, ERAL)
A write operation includes four write instructions: data write (WRITE), data erase (ER ASE), chip write (WRAL), and
chip erase (ERAL).
A write instruction (WRITE, ERASE, WRAL, ERAL) starts a write operation to the memory cell when a low level is
input to CS after a specified number of clocks have been input. The SK and DI inputs are invalid during the write
period, so do not input an instruction.
Input an instruction while the output status of the DO pin is high or high impedance (High-Z).
A write operation is valid only in program enable mode (refer to “5. Write enable (EWEN) and write disable
(EWDS)”).
4. 1 Verify operation
A write operation executed by any instruction is completed within 8 ms (write time tPR: typically 4 ms), so if the
completion of the write operation is recognized, the write cycle can be minimized. A sequential operation to
confirm the status of a write operation is called a verify operation.
(1) Operation
After the write operation has started (CS = low), the status of the write operation can be verified by
confirming the output status of the DO pin by inputting a high level to CS again. This sequence is called a
verify operation, and the period that a high level is input to the CS pin after the write operation has started
is called the verify operation period.
The relationship between the output status of the DO pin and the write operation during the verify
operation period is as follows.
• DO pin = low: Writing in progress (busy)
• DO pin = high: Writing completed (ready)
(2) Operation example
There are two methods to perform a verify operation: Waiting for a change in the output status of the DO
pin while keeping CS high, or suspending the verify operation (CS = low) once and then performing it again
to verify the output status of the DO pin. The latter method allows the CPU to perform other processing
during the wait period, allowing an efficient system to be designed.
Caution 1. Input a low level to the DI pin during a verify operation.
2. If a high level is input to the DI pin at the rise of SK when the output status of the DO pin is high,
the S-93C46B/56B/66B latches the instruction assuming that a start bit has been input. In this
case, note that the DO pin immed iately enters a high-impedance
(High-Z) state.
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
14
4. 2 Writing data (WRITE)
To write 16-bit data to a specified address, change CS to high and then input the WRITE instruction, address,
and 16-bit data following the start bit. The write operation starts when CS goes low. T here is no need to set
the data to 1 before writing. If the clocks more than the specified number have been input, the clock pulse
monitoring circuit cancels the WRITE instruction. For details of the clock pulse monitoring circuit, refer to “
Function to Protect Against Write due to Erroneous Instruction Recognition”.
A5 A3 A2 A1 A0 D15 A4
1 3 4 56789102
0 1
c
25
tCDS
Verify
busy
Standby
tSV tHZ1
ready
tPR High-Z
CS
SK
DI
DO High-Z
D0
Figure 8 Data Write Timin g (S-93C46B)
c
ready
busy
tPR
tSV
tCDS
271 2 3 4 5 6 7 8 9 10 11 12
0 1 D0 A6 A5 A4 A3 A2 A1 A0 D15
CS
SK
DI
DO High-Z
Verify Standby
High-Z tHZ1
x : S-93C56B
A7: S-93C66B
Figure 9 Data Write Timin g (S-93C56B, S-93C66B)
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 15
4. 3 Erasing data (ERASE)
To erase 16-bit data at a specified address, set all 16 bits of the data to 1, change CS to high, and then input
the ERASE instruction and address following the start bit. There is no need to input data. The data erase
operation starts when CS goes low. If the clocks more than the specified number have been input, the clock
pulse monitoring circuit cancels the ERASE instruction. For details of the clock pulse monitoring circuit, refer
to “ Function to Protect Against Write due to Erroneous Instruction Recognition”.
Verify
tSV
SK
DI A5 A4 A3 A2 A1
1 2 3 456789
CS
DO
tCDS
tPR
busy
High-Z
Standby
High-Z tHZ1
c 1 A0
ready
1
Figure 10 Data Erase Timin g (S-93C46B)
ready
tCDS
tSV
High-Z
tHZ1
tPR
SK
DI c A6 A5 A4 A3 A2 A1 A0
1 2 3 4 5 6 7 8 9 10 11
CS
DO busy
Verify Standby
High-Z
1 1
x : S-93C56B
A7: S-93C66B
Figure 11 Data Erase Timin g (S-93C56B, S-93C66B)
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
16
4. 4 Writing to chip (WRAL)
To write the same 16-bit data to the entire memory address space, change CS to high, and then input the
WRAL instruction, an address, and 16-bit data following the start bit. Any address can be input. The write
operation starts when CS goes low. There is no need to set the data to 1 before writing. If the clocks more
than the specified number have been input, the clock pulse monitoring circuit cancels the WRAL instruction.
For details of the clock pulse monitoring circuit, refer to “ Function to Protect Against Write due to
Erroneous Instruction Recognition”.
23 4 5 6 7 8 9 101
SK
DI
tCDS
tSV tHZ1
High-Z
tPR
CS
DO busy
Verify Standby
High-Z
25
c 0 D0
ready
0 0 1 4Xs D15
Figure 12 Chip Write T iming (S-93C46B)
Verify
2 3 4 5 6 7 8 9 101
SK
DI
tCDS
tSV tHZ1
High-Z
tPR
CS
DO busy
Standby
High-Z
11 12 27
c 0 D0
ready
0 0 1 6Xs D15
Figure 13 Chip Write T iming (S-93C56B, S-93C66B)
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 17
4. 5 Erasing chip (ERAL)
To erase the data of the entire memory address space, set all the data to 1, change CS to high, and then input
the ERAL instruction and an address following the start bit. Any address can be input. There is no need to
input data. The chips erase operation starts when CS goes low. If the clocks more than the specified
number have been input, the clock pulse monitoring circuit cancels the ERAL instruction. For details of the
clock pulse monitoring circuit, refer to “ Function to Protect Against Write due to Erroneous Instruction
Recognition”.
tCDS
4Xs
01 0
87654 3 2 1
c 0
tPR High-Z
tHZ1
ready
busy
tSV
Standby
Verify
9
SK
DI
CS
DO High-Z
Figure 14 Chip Erase T i ming (S-93C46B)
765 4 3 2 1 98
CS
SK
DI
DO
tCDS
tSV
ready
busy tHZ1
High-Z
tPR
11
6Xs
0 1 0
c 0
Standby
Verif
y
10
High-Z
Figure 15 Chip Erase Ti ming (S-93C56B, S-93C66B)
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
18
5. Write enable (EWEN) and write disable (EWDS)
The EWEN instruction is an instruction that enables a write operation. The status in which a write operation is
enabled is called the program enable mode.
The EWDS instruction is an instruction that disables a write operation. The status in which a write operation is
disabled is called the program disable mode.
After CS goes high, input an instruction in the order of the start bit, EWEN or EWDS instruction, and address
(optional). Each mode becomes valid by inputting a low level to CS after the last address (optional) has been
input.
5432 1 9876
SK
DI
CS
4Xs
11 = EWEN
00 = EWDS
0
c 0
Standby
Figure 16 Write Enable/Disab le Timing (S-93C46B)
DI
SK 6543 2 19811 10
7
CS
6Xs
11 = EWEN
00 = EWDS
0
c0
Standby
Figure 17 Write Enable/Disab le Timing (S-93C56B, S-93C66B)
(1) Recommendation for write operation disable instruction
It is recommended to implement a design that prevents an incorrect write operation when a write instruction is
erroneously recognized by executing the write operation disable instruction when executing instructions other
than write instruction, and immediately after power-on and before power off.
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 19
Write Protect Function during the Low Pow er Supply Voltage
The S-93C46B/56B/66B provides a built-in detector. When the power supply voltage is low or at power application, the
write instructions (WRITE, ERASE, WRAL, and ERAL) are cancelled, and the write disable state (EWDS) is
automatically set. The detection voltage is 1.75 V typ., the release voltage is 2.05 V typ., and there is a hysteresis of
about 0.3 V (refer to Figure 18). Therefore, when a write operation is performed after the power supply voltage has
dropped and then risen again up to the level at which writing is possible, a write enable instruction (EWEN) must be
sent before a write instruction (WRITE, ERASE, WRAL, or ERAL) is executed.
When the power supply voltage drops during a write operation, the data being written to an address at that time is not
guaranteed.
Release voltage (+VDET)
2.05 V Typ.
Power supply voltage
Hysteresis
About 0.3 V
Detection voltage (−VDET)
1.75 V Typ.
Write instruction cancelled
Write disable state (EWDS) automatically set
Figure 18 Operation during Low Power Supply Voltage
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
20
Function to Protect Against Write due to Erroneous Instruction Recognition
The S-93C46B/56B/66B provides a built-in clock pulse monitoring circuit which is used to prevent an erroneous write
operation by canceling write instructions (WRITE, ERASE, WRAL, and ERAL) recognized erroneously due to an
erroneous clock count caused by the application of noise pulses or double counting of clocks.
Instructions are cancelled if a clock pulse more or less than specified number decided by each write operation (WRITE,
ERASE, WRAL, or ERAL) is detected.
<Example> Erroneous recognition of program disable instruction (EWDS) as erase instruction (ERASE)
1 3 4 5 6 7 2 8 9
CS
SK
DI
Input EWDS instruction
Erroneous recognition as
ERASE instruction due to
noise pulse
1 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 1 0
Noise pulse
Example of S-93C4 6B
1
In products that do not incl ude a clock pulse monitoring circuit, FF FF is mistakenly written
on address 00h. Ho wever the S-93C 46B det ects the overcount a nd cance ls the instruction
without performing a write operation.
Figure 19 Example of Clock Pulse Monitoring Circuit Operation
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 21
3-Wire Interface (Direct Connection between DI and DO)
There are two types of serial interface configurations: a 4-wire interface configured using the CS, SK, DI, and DO pins,
and a 3-wire interface that connects the DI input pin and DO output pin.
When the 3-wire interface is employed, a period in which the data output from the CPU and the data output from the
serial memory collide may occur, causing a malfunction. To prevent such a malfunction, connect the DI and DO pins
of the S-93C46B/56B/66B via a resistor (10 to 100 kΩ) so that the data output from the CPU takes precedence in being
input to the DI pin (refer to “Figure 20 Connection of 3-Wire Interface”).
CPU
DI
SIO
DO
S-93C46B
/
56B
/
66B
R : 10 to 100 kΩ
Figure 20 Connection of 3-Wire Interface
I/O Pin
1. Connection of input pins
All the input pins of the S-93C46B/56B/66B employ a CMOS structure, so design the equipment so that high
impedance will not be input while the S-93C46B/56B/66B is operating. Especially, deselect the CS input (a low
level) when turning on/off power and during standby. When the CS pin is deselected (a low level), incorrect data
writing will not occur. Connect the CS pin to GND via a resistor (10 to 100 kΩ pull-down resistor). To prevent
malfunction, it is recommended to use equivalent pull-down resistors for pins other than the CS pin.
2. Equivalent circuit of input and output pin
The following shows the equivalent circuits of input pins of the S-93C46B/56B/66B. None of the input pins
incorporate pull-up and pull-down elements, so special care must be taken when designing to prevent a floating
status.
Output pins are high-level/low-level/high-impedance tri-state outputs. The TEST pin is disconnected from the
internal circuit by a switching transistor during normal operation. As long as the absolute maximum rating is
satisfied, the TEST pin and internal circuit will never be connected.
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
22
2. 1 Input pin
CS
Figure 21 CS Pin
SK, DI
Figure 22 SK, DI Pin
TEST
Figure 23 TEST Pin
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.0_00 S-93C46B/56B/66B H Series
Seiko Instruments Inc. 23
2. 2 Output pin
DO
VCC
Figure 24 DO Pin
3. Input pin noise elimination time
The S-93C46B/56B/66B include a built-in low-pass filter to eliminate noise at the SK, DI, and CS pins. This means
that if the supply voltage is 5.0 V (at room temperature), noise with a pulse width of 20 ns or less can be eliminated.
Note, therefore, the noise with a pulse width of more than 20 ns will be recognized as a pulse if the voltage exceeds
VIH/VIL.
Precaution
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
105°C OPERATION 3-WIRE SERIAL E2PROM FOR AUTOMOTIVE
S-93C46B/56B/66B H Series Rev.2.0_00
Seiko Instruments Inc.
24
Product Name Structure
1. Product name
S-93CxxB D0 H - xxxx U
Envir onmental code
U: Lead- f r ee (Sn 100%), hal ogen-free
Package name (abbreviation) and I C packi ng specif icat i ons
J8T2: 8-Pin SOP ( J EDEC) , Tape
T8T2: 8-Pin TSSO P, Tape
K8T2: TMSO P-8, Tape
Operation tem perat ur e
H: −40 to +105°C
Fixed
Product name
S-93C46B: 1 K-bit
S-93C56B: 2 K-bit
S-93C66B: 4 K-bit
Remark Please contact our sales office for products with product name structure other than those specified above.
2. Package
Drawing code
Package name Package Tape Reel
8-Pin SOP (JEDEC) FJ008-A-P-SD FJ008-D-C-SD FJ008-D-R-SD
8-Pin TSSOP FT008-A-P-SD FT008-E-C-SD FT008-E-R-SD
TMSOP-8 FM008-A-P-SD FM008-A-C-SD FM008-A-R-SD
No. FJ008-A-P-SD-2.1
No.
TITLE
SCALE
UNIT mm
SOP8J-D-PKG Dimensions
Seiko Instruments Inc.
FJ008-A-P-SD-2.1
0.4±0.05
1.27
0.20±0.05
5.02±0.2
14
85
No.
TITLE
SCALE
UNIT mm
5
8
1
4
ø2.0±0.05
ø1.55±0.05 0.3±0.05
2.1±0.1
8.0±0.1
5°max.
6.7±0.1
2.0±0.05
Seiko Instruments Inc.
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
SOP8J-D-Carrier Tape
No. FJ008-D-C-SD-1.1
FJ008-D-C-SD-1.1
No.
TITLE
SCALE
UNIT mm
QTY. 2,000
2±0.5
13.5±0.5
60°
2±0.5
ø13±0.2
ø21±0.8
Seiko Instruments Inc.
Enlarged drawing in the central part
SOP8J-D-Reel
No. FJ008-D-R-SD-1.1
FJ008-D-R-SD-1.1
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
TSSOP8-E-PKG Dimensions
No. FT008-A-P-SD-1.1
FT008-A-P-SD-1.1
0.17±0.05
3.00 +0.3
-0.2
0.65
0.2±0.1
14
5
8
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
ø1.55±0.05
2.0±0.05
8.0±0.1 ø1.55 +0.1
-0.05
(4.4)
0.3±0.05
1
45
8
4.0±0.1
Feed direction
TSSOP8-E-Carrier Tape
No. FT008-E-C-SD-1.0
FT008-E-C-SD-1.0
+0.4
-0.2
6.6
mm
No.
TITLE
SCALE
UNIT
Seiko Instruments Inc.
Enlarged drawing in the central part
No. FT008-E-R-SD-1.0
2±0.5
ø13±0.5
ø21±0.8
13.4±1.0
17.5±1.0
3,000
QTY.
TSSOP8-E-Reel
FT008-E-R-SD-1.0
mm
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
2.90±0.2
85
0.2±0.1
0.65±0.1
0.13±0.1
14
TMSOP8-A-PKG Dimensions
No. FM008-A-P-SD-1.0
FM008-A-P-SD-1.0
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
0.30±0.05
1.00±0.1
1.05±0.05
1.55
2.00±0.05
4.00±0.1
3.25±0.05
4.00±0.1
1
4
58
TMSOP8-A-Carrier Tape
Feed direction
No. FM008-A-C-SD-1.0
FM008-A-C-SD-1.0
+0.1
-0
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
16.5max.
13.0±0.3
QTY. 4,000
(60°)
(60°)
13±0.2
Enlarged drawing in the central part
TMSOP8-A-Reel
No. FM008-A-R-SD-1.0
FM008-A-R-SD-1.0
www.sii-ic.com
• The information described herein is subject to change without notice.
• Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
• When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the approp riate governmental authority.
• Use of the information described herein for other purposes and/or reproduction or copying without the
express permissi on of Seiko Instruments Inc. is strictly prohibited.
• The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicle s, without prior written permission of Seiko Instruments Inc.
• The products described herein are not designed to be radiation-proof .
• Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or comm unity damage that may ensue.
