5962-9221401M2A - Texas Instruments High-Performance Analog

CY54FCT245T, CY74FCT245T

8-BIT TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS018B – MAY 1994 – REVISED NOVEMBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function, Pinout, and Drive Compatible

With FCT and F Logic

Reduced VOH (Typically = 3.3 V) Versions

of Equivalent FCT Functions

Edge-Rate Control Circuitry for

Significantly Improved Noise

Characteristics

Ioff Supports Partial-Power-Down Mode

Operation

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Matched Rise and Fall Times

Fully Compatible With TTL Input and

Output Logic Levels

CY54FCT245T

– 48-mA Output Sink Current

12-mA Output Source Current

CY74FCT245T

– 64-mA Output Sink Current

32-mA Output Source Current

3-State Outputs

description

The ’FCT245T devices contain eight noninverting

bidirectional buffers with 3-state outputs and are

intended for bus-oriented applications.

The transmit/receive (T/R) input determines the direction of data flow through these bidirectional transceivers.

T ransmit (active high) enables data from A ports to B ports. The output enable (OE), when high, disables both

the A and B ports by putting them in the high-impedance state.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow through the device when it is powered down.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

CY54FCT245T ...L PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

T/R

GND

VCC

T/R

GND

VCC

CY54FCT245T ...D PACKAGE

CY74FCT245T ...P, Q, OR SO PACKAGE

(TOP VIEW)

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

CY54FCT245T, CY74FCT245T

8-BIT TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS018B – MAY 1994 – REVISED NOVEMBER 2001

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ORDERING INFORMATION

TAPACKAGE†SPEED

(ns) ORDERABLE

PART NUMBER TOP-SIDE

MARKING

QSOP – Q Tape and reel 3.8 CY74FCT245DTQCT FCT245D

QSOP – Q Tape and reel 4.1 CY74FCT245CTQCT FCT245C

SOIC SO

Tube 4.1 CY74FCT245CTSOC

FCT245C

SOIC

–

Tape and reel 4.1 CY74FCT245CTSOCT

FCT245C

DIP – P Tube 4.6 CY74FCT245ATPC CY74FCT245ATPC

–40°C to 85°CQSOP – Q Tape and reel 4.6 CY74FCT245ATQCT FCT245A

SOIC SO

Tube 4.6 CY74FCT245ATSOC

FCT245A

SOIC

–

Tape and reel 4.6 CY74FCT245ATSOCT

FCT245A

QSOP – Q Tape and reel 7 CY74FCT245TQCT FCT245

SOIC SO

Tube 7 CY74FCT245TSOC

FCT245

SOIC

–

Tape and reel 7 CY74FCT245TSOCT

FCT245

CDIP – D Tube 4.5 CY54FCT245CTDMB

LCC – L Tube 4.5 CY54FCT245CTLMB

55°Cto125°C

CDIP – D Tube 4.9 CY54FCT245ATDMB

–

55°C

125°C

LCC – L Tube 4.9 CY54FCT245ATLMB

CDIP – D Tube 7.5 CY54FCT245TDMB

LCC – L Tube 7.5 CY54FCT245TLMB

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available

at www.ti.com/sc/package.

FUNCTION TABLE

INPUTS

OPERATION

OE T/R

OPERATION

L L B data to bus A

LH A data to bus B

H X Z

H = High logic level, L = Low logic level,

X = Don’t care, Z = High-impedance

state

logic diagram (positive logic)

T/R

To Seven Other Channels

CY54FCT245T, CY74FCT245T

8-BIT TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS018B – MAY 1994 – REVISED NOVEMBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage range to ground potential –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC input voltage range –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC output voltage range –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC output current (maximum sink current/pin) 120 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 1): P package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Q package 68°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SO package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Ambient temperature range with power applied, TA –65°C to 135°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.

Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Note 2)

CY54FCT245T

CY74FCT245T

CY74FCT245AT

CY74FCT245CT

CY74FCT245DT UNIT

MIN NOM MAX MIN NOM MAX

VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V

VIH High-level input voltage 2 2 V

VIL Low-level input voltage 0.8 0.8 V

IOH High-level output current –12 –32 mA

IOL Low-level output current 48 64 mA

TAOperating free-air temperature –55 125 –40 85 °C

NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.

CY54FCT245T, CY74FCT245T

8-BIT TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS018B – MAY 1994 – REVISED NOVEMBER 2001

4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

CY54FCT245T CY74FCT245T

UNIT

PARAMETER

TEST

CONDITIONS

MIN TYP†MAX MIN TYP†MAX

UNIT

VIK

VCC = 4.5 V, IIN = –18 mA –0.7 –1.2

IK VCC = 4.75 V, IIN = –18 mA –0.7 –1.2

VCC = 4.5 V, IOH = –12 mA 2.4 3.3

VOH

VCC 475V

IOH = –32 mA 2V

CC =

IOH = –15 mA 2.4 3.3

VOL

VCC = 4.5 V, IOL = 48 mA 0.3 0.55

OL VCC = 4.75 V, IOL = 64 mA 0.3 0.55

Vhys All inputs 0.2 0.2 V

VCC = 5.5 V, VIN = VCC 5

µA

IVCC = 5.25 V, VIN = VCC 5µ

IIH

VCC = 5.5 V, VIN = 2.7 V ±1

µA

IH VCC = 5.25 V, VIN = 2.7 V ±1µ

IIL

VCC = 5.5 V, VIN = 0.5 V ±1

µA

IL VCC = 5.25 V, VIN = 0.5 V ±1µ

IOZH

VCC = 5.5 V, VOUT = 2.7 V 10

µA

OZH VCC = 5.25 V, VOUT = 2.7 V 10 µ

IOZL

VCC = 5.5 V, VOUT = 0.5 V –10

µA

OZL VCC = 5.25 V, VOUT = 0.5 V –10 µ

IOS‡

VCC = 5.5 V, VOUT = 0 V –60 –120 –225

‡

VCC = 5.25 V, VOUT = 0 V –60 –120 –225

Ioff VCC = 0 V, VOUT = 4.5 V ±1±1µA

ICC

VCC = 5.5 V, VIN ≤ 0.2 V, VIN ≥VCC – 0.2 V 0.1 0.2

CC VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≥VCC – 0.2 V 0.1 0.2

∆ICC

VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2

∆I

CC VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2

ICCD¶

VCC = 5.5 V, One input switching at 50% duty cycle,

Outputs open, T/R or OE = GND and

VIN ≤ 0.2 V or VIN ≥VCC – 0.2 V 0.06 0.12 mA/

CCD

VCC = 5.25 V, One input switching at 50% duty cycle,

Outputs open, T/R or OE = GND and

VIN ≤ 0.2 V or VIN ≥VCC – 0.2 V 0.06 0.12 MHz

†Typical values are at VCC = 5 V, TA = 25°C.

‡Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or

sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged

shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence

of parameter tests, IOS tests should be performed last.

§Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND

¶This parameter is derived for use in total power-supply calculations.

CY54FCT245T, CY74FCT245T

8-BIT TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS018B – MAY 1994 – REVISED NOVEMBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted) (continued)

PARAMETER

TEST CONDITIONS

CY54FCT245T CY74FCT245T

UNIT

PARAMETER

TEST

CONDITIONS

MIN TYP†MAX MIN TYP†MAX

UNIT

One bit

switching

at f

= 10 MHz

VIN ≤ 0.2 V or

VIN ≥VCC – 0.2 V 0.7 1.4

VCC = 5.5 V,

Out

uts o

at 50% duty

cycle VIN = 3.4 V or GND 1.2 3.4

s open,

T/R or OE = GND Eight bits

switching

at f

= 2.5 MHz

VIN ≤ 0.2V or

VIN ≥VCC – 0.2 V 1.3 2.6||

IC#

at 50% duty

cycle VIN = 3.4 V or GND 3.3 10.6||

One bit

switching

at f

= 10 MHz

VIN ≤ 0.2 V or

VIN ≥VCC – 0.2 V 0.7 1.4

VCC = 5.25 V,

Out

uts o

at 50% duty

cycle VIN = 3.4 V or GND 1.2 3.4

s open,

T/R or OE = GND Eight bits

switching

at f

= 2.5 MHz

VIN ≤ 0.2V or

VIN ≥VCC – 0.2 V 1.3 2.6||

at 50% duty

cycle VIN = 3.4 V or GND 3.3 10.6||

Ci5 10 5 10 pF

Co9 12 9 12 pF

†Typical values are at VCC = 5 V, TA = 25°C.

#IC= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)

Where:

IC= Total supply current

ICC = Power-supply current with CMOS input levels

∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)

DH= Duty cycle for TTL inputs high

NT= Number of TTL inputs at DH

ICCD = Dynamic current caused by an input transition pair (HLH or LHL)

f0= Clock frequency for registered devices, otherwise zero

f1= Input signal frequency

N1= Number of inputs changing at f1

All currents are in milliamperes and all frequencies are in megahertz.

|| Values for these conditions are examples of the ICC formula.

CY54FCT245T, CY74FCT245T

8-BIT TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS018B – MAY 1994 – REVISED NOVEMBER 2001

6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

switching characteristics over operating free-air temperature range (see Figure 1)

PARAMETER

FROM TO CY54FCT245T CY54FCT245AT CY54FCT245CT

UNIT

PARAMETER

(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX

UNIT

tPLH

AorB

BorA

1.5 7.5 1.5 4.9 1.5 4.5

tPHL

1.5 7.5 1.5 4.9 1.5 4.5

tPZH

OE or T/R

AorB

1.5 10 1.5 6.5 1.5 6.2

tPZL

T/R

1.5 10 1.5 6.5 1.5 6.2

tPHZ

OE or T/R

AorB

1.5 10 1.5 6 1.5 5.2

tPLZ

T/R

1.5 10 1.5 6 1.5 5.2

switching characteristics over operating free-air temperature range (see Figure 1)

PARAMETER

FROM TO CY74FCT245T CY74FCT245AT CY74FCT245CT CY74FCT245DT

UNIT

PARAMETER

(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX

UNIT

tPLH

AorB

BorA

1.5 7 1.5 4.6 1.5 4.1 1.5 3.8

tPHL

1.5 7 1.5 4.6 1.5 4.1 1.5 3.8

tPZH

OE or T/R

AorB

1.5 9.5 1.5 6.2 1.5 5.8 1.5 5

tPZL

T/R

1.5 9.5 1.5 6.2 1.5 5.8 1.5 5

tPHZ

OE or T/R

AorB

1.5 7.5 1.5 5 1.5 4.8 1.5 4.3

tPLZ

T/R

1.5 7.5 1.5 5 1.5 4.8 1.5 4.3

CY54FCT245T, CY74FCT245T

8-BIT TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS018B – MAY 1994 – REVISED NOVEMBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

3 V

0 V

tsu

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Data Input

tPLH

tPHL

tPLH

VOH

VOL

3 V

0 V

Input

Out-of-Phase

Output

In-Phase

Output

Timing Input

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

Output

Control

Output

W aveform 1

(see Note B)

Output

W aveform 2

(see Note B)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

≈3.5 V

0 V

VOL + 0.3 V

≈0 V

3 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

Open

7 V

Open

TEST S1

3 V

0 V

VOLTAGE WAVEFORMS

PULSE DURATION

Input

NOTES: A. CL includes probe and jig capacitance.

B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. The outputs are measured one at a time with one input transition per measurement.

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT FOR

3-STATE OUTPUTS

S1 7 V

500 ΩGND

From Output

Under Test

CL = 50 pF

(see Note A)

Test

Point

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

Open

VOH – 0.3 V

500 Ω

1.5 V1.5 V

1.5 V 1.5 V

1.5 V

1.5 V1.5 V

1.5 V 1.5 V

1.5 V

Figure 1. Load Circuit and Voltage Waveforms

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

5962-9221401M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221401M2A

CY54FCT

245TLMB

5962-9221401MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221401MR

5962-9221403M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221403M2A

5962-9221403MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221403MR

CY54FCT245ATDM

5962-9221405M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221405M2A

CY54FCT

245CTLMB

5962-9221405MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221405MR

CY54FCT245ATDMB ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221403MR

CY54FCT245ATDM

CY54FCT245CTLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221405M2A

CY54FCT

245CTLMB

CY54FCT245TLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9221401M2A

CY54FCT

245TLMB

CY74FCT245ATPC ACTIVE PDIP N 20 20 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 CY74FCT245ATPC

CY74FCT245ATPCE4 ACTIVE PDIP N 20 20 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 CY74FCT245ATPC

CY74FCT245ATQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245A

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

CY74FCT245ATQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245A

CY74FCT245ATQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245A

CY74FCT245ATSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245A

CY74FCT245ATSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245A

CY74FCT245ATSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245A

CY74FCT245ATSOCT ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245A

CY74FCT245ATSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245A

CY74FCT245ATSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245A

CY74FCT245CTQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245C

CY74FCT245CTQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245C

CY74FCT245CTQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245C

CY74FCT245CTSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245C

CY74FCT245CTSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245C

CY74FCT245CTSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245C

CY74FCT245DTQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245D

CY74FCT245DTQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245D

CY74FCT245DTQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245D

CY74FCT245TQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 3

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

CY74FCT245TQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245

CY74FCT245TQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT245

CY74FCT245TSOC ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245

CY74FCT245TSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245

CY74FCT245TSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245

CY74FCT245TSOCT ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245

CY74FCT245TSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245

CY74FCT245TSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT245

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 4

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

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TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

CY74FCT245ATQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT245ATSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1

CY74FCT245CTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT245DTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT245TQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

CY74FCT245TSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 16-Aug-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

CY74FCT245ATQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT245ATSOCT SOIC DW 20 2000 367.0 367.0 45.0

CY74FCT245CTQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT245DTQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT245TQCT SSOP DBQ 20 2500 367.0 367.0 38.0

CY74FCT245TSOCT SOIC DW 20 2000 367.0 367.0 45.0

PACKAGE MATERIALS INFORMATION

www.ti.com 16-Aug-2012

Pack Materials-Page 2

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