Features
• Performance specied for bommon IPM applications
over industrial temperature range: -40°C to 100°C
• Fast maximum propagation delays
tPHL = 480 ns
tPLH = 550 ns
• Minimized Pulse Width Distortion
PWD = 450 ns
• 15 kV/µs minimum common mode transient immu-
nity
at VCM = 1500 V
• CTR > 44% at IF = 10 mA
• Safety approval:
UL Recognized
-3750 V rms / 1 min. for HCPL-4506/0466/J456
-5000 V rms / 1 min. for HCPL-4506 Option 020
and HCNW4506
CSA Approved
IEC/EN/DIN EN 60747-5-2 Approved
-VIORM = 560 Vpeak for HCPL-0466 Option 060
-VIORM = 630 Vpeak for HCPL-4506 Option 060
-VIORM = 891 Vpeak for HCPL-J456
-VIORM = 1414 Vpeak for HCNW4506
Applications
• IPM isolation
• Isolated IGBT/MOSFET gate drive
• AC and brushless DC motor drives
• Industrial inverters
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
HCPL-4506 Functional Diagram
8
7
6
1
3
SHIELD 5
2
4
20 kΩ
NC
ANODE
CATHODE
NC
VCC
VL
VO
GND
HCPL-4506/J456/0466, HCNW4506
Intelligent Power Module and Gate Drive Interface Optocouplers
Data Sheet
Description
The HCPL-4506 and HCPL-0466 contain a GaAsP LED while
the HCPL-J456 and the HCNW4506 contain an AlGaAs LED.
The LED is optically coupled to an integrated high gain
photo detector. Minimized propagation delay dierence
between devices makes these optocouplers excellent so-
lutions for improving inverter eciency through reduced
switching dead time.
An on chip 20 kΩ output pull-up resistor can be enabled by
shorting output pins 6 and 7, thus eliminating the need for
an external pull-up resistor in common IPM applications.
Specications and performance plots are given for typical
IPM applications.
Functional Diagram
The connection of a 0.1 µF bypass capacitor
between pins 5 and 8 is recommended.
Truth Table
LED V
O
ON L
OFF H
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
2
Selection Guide
Standard White Mold
Package 8-Pin DIP 8-Pin DIP Small Outline Widebody
Type (300 Mil) (300 Mil) SO8 (400 Mil) Hermetic*
Part HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506 HCPL-5300
Number HCPL-5301
IEC/EN/DIN VIORM = 630 Vpeak VIORM = 891 Vpeak VIORM = 560 Vpeak VIORM = 1414 Vpeak —
EN 60747- (Option 060) (Option 060)
5-2
Approval
*Technical data for these products are on separate Avago publications.
3
Ordering Information
HCPL-0466, HCPL-4506 and HCPL-J456 are UL Recognized with 3750 Vrms for 1 minute per UL1577.
HCNW4506 is UL Recognized with 5000 Vrms for 1 minute per UL1577. HCPL-0466, HCPL-4506, HCPL-J456 and
HCNW4506 are approved under CSA Component Acceptance Notice #5, File CA 88324.
Option
Part RoHS non RoHS Surface Gull Tape UL 5000 Vrms/ IEC/EN/DIN
Number Compliant Compliant Package Mount Wing & Reel 1 Minute rating EN 60747-5-2 Quantity
-000E no option 300 mil DIP-8 50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 X 50 per tube
HCPL-4506
-320E #320 X X X 50 per tube
-520E #520 X X X X 1000 per reel
-060E #060 X 50 per tube
-360E #360 X X X 50 per tube
-560E #560 X X X X 1000 per reel
-000E no option 300 mil DIP-8 X 50 per tube
HCPL-J456
-300E #300 X X X 50 per tube
-500E #500 X X X X 1000 per reel
-000E no option SO-8 X 100 per tube
HCPL-0466
-500E #500 X X 1500 per reel
-060E #060 X X 100 per tube
-560E #560 X X X 1500 per reel
-000E no option 400 mil X X 42 per tube
HCNW4506
-300E #300 Widebody X X X X 42 per tube
-500E #500 DIP-8 X X X X X 750 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-4506-560E to order product of 300 mil DIP Gull Wing Surface Mount package in Tape and Reel packaging with
IEC/EN/DIN EN 60747-5-2 Safety Approval and RoHS compliant.
Example 2:
HCPL-4506 to order product of 300 mil DIP package in Tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since July 15, 2001 and
RoHS compliant will use ‘–XXXE.’
4
Package Outline Drawings
HCPL-4506 Outline Drawing
HCPL-4506 Gull Wing Surface Mount Option 300 Outline Drawing
1.080 ± 0.320
(0.043 ± 0.013) 2.54 ± 0.25
(0.100 ± 0.010)
0.51 (0.020) MIN.
0.65 (0.025) MAX.
4.70 (0.185) MAX.
2.92 (0.115) MIN.
5° TYP. 0.254 + 0.076
- 0.051
(0.010+ 0.003)
- 0.002)
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
1.78 (0.070) MAX.
1.19 (0.047) MAX.
A XXXXZ
YYWW
DATE CODE
DIMENSIONS IN MILLIMETERS AND (INCHES).
5678
4321
OPTION CODE*
UL
RECOGNITION
UR
TYPE NUMBER
* MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
0.635 ± 0.25
(0.025 ± 0.010) 12° NOM.
9.65 ± 0.25
(0.380 ± 0.010)
0.635 ± 0.130
(0.025 ± 0.005)
7.62 ± 0.25
(0.300 ± 0.010)
5
6
7
8
4
3
2
1
9.65 ± 0.25
(0.380 ± 0.010)
6.350 ± 0.25
(0.250 ± 0.010)
1.016 (0.040)
1.27 (0.050)
10.9 (0.430)
2.0 (0.080)
LAND PATTERN RECOMMENDATION
1.080 ± 0.320
(0.043 ± 0.013)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.254 + 0.076
- 0.051
(0.010+ 0.003)
- 0.002)
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
5
Package Outline Drawings
HCPL-J456 Outline Drawing
HCPL-J456 Gull Wing Surface Mount Option 300 Outline Drawing
1.080 ± 0.320
(0.043 ± 0.013) 2.54 ± 0.25
(0.100 ± 0.010)
0.51 (0.020) MIN.
0.65 (0.025) MAX.
4.70 (0.185) MAX.
2.92 (0.115) MIN.
5° TYP. 0.254 + 0.076
- 0.051
(0.010+ 0.003)
- 0.002)
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
9.80 ± 0.25
(0.386 ± 0.010)
1.78 (0.070) MAX.
1.19 (0.047) MAX.
A XXXXZ
YYWW
DATE CODE
DIMENSIONS IN MILLIMETERS AND (INCHES).
5678
4321
OPTION CODE*
UL
RECOGNITION
UR
TYPE NUMBER
* MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
0.635 ± 0.25
(0.025 ± 0.010) 12° NOM.
9.65 ± 0.25
(0.380 ± 0.010)
0.635 ± 0.130
(0.025 ± 0.005)
7.62 ± 0.25
(0.300 ± 0.010)
5
6
7
8
4
3
2
1
9.80 ± 0.25
(0.386 ± 0.010)
6.350 ± 0.25
(0.250 ± 0.010)
1.016 (0.040)
1.27 (0.050)
10.9 (0.430)
2.0 (0.080)
LAND PATTERN RECOMMENDATION
1.080 ± 0.320
(0.043 ± 0.013)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.254 + 0.076
- 0.051
(0.010+ 0.003)
- 0.002)
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
6
HCPL-0466 Outline Drawing (8-Pin Small Outline Package)
HCNW4506 Outline Drawing (8-Pin Widebody Package)
5
6
7
8
4
3
2
1
11.15 ± 0.15
(0.442 ± 0.006)
1.78 ± 0.15
(0.070 ± 0.006)
5.10
(0.201)MAX.
1.55
(0.061)
MAX.
2.54 (0.100)
TYP.
DIMENSIONS IN MILLIMETERS (INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
7° TYP. 0.254 + 0.076
- 0.0051
(0.010+ 0.003)
- 0.002)
11.00
(0.433)
9.00 ± 0.15
(0.354 ± 0.006)
MAX.
10.16 (0.400)
TYP.
A
HCNWXXXX
YYWW
DATE CODE
TYPE NUMBER
0.51 (0.021) MIN.
0.40 (0.016)
0.56 (0.022)
3.10 (0.122)
3.90 (0.154)
XXX
YWW
8765
4321
5.994 ± 0.203
(0.236 ± 0.008)
3.937 ± 0.127
(0.155 ± 0.005)
0.406 ± 0.076
(0.016 ± 0.003) 1.270
(0.050)BSC
5.080 ± 0.127
(0.200 ± 0.005)
3.175 ± 0.127
(0.125 ± 0.005) 1.524
(0.060)
45° X 0.432
(0.017)
0.228 ± 0.025
(0.009 ± 0.001)
TYPE NUMBER
(LAST 3 DIGITS)
DATE CODE
0.305
(0.012)MIN.
TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
0.203 ± 0.102
(0.008 ± 0.004)
7°
PIN ONE
0 ~ 7°
*
*
7.49 (0.295)
1.9 (0.075)
0.64 (0.025)
LAND PATTERN RECOMMENDATION
7
HCNW4506 Gull Wing Surface Mount Option 300 Outline Drawing
8
Recommended Pb-Free IR Prole
Solder Reow Temperature Prole
0
TIME (SECONDS)
TEMPERATURE (°C)
200
100
50 150100 200 250
300
0
30
SEC.
50 SEC.
30
SEC.
160 °C
140 °C
150 °C
PEAK
TEMP.
245 °C
PEAK
TEMP.
240 °CPEAK
TEMP.
230 °C
SOLDERING
TIME
200 °C
PREHEATING TIME
150 °C, 90 + 30 SEC.
2.5 C ± 0.5 °C/SEC.
3°C+1°C/–0.5 °C
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
PREHEATING RATE 3 °C+1°C/–0.5 °C/SEC.
REFLOW HEATING RATE 2.5 °C ± 0.5 °C/SEC.
NOTE: NON-HALIDE FLUX SHOULD BE USED.
217 °C
RAMP-DOWN
6°C/SEC. MAX.
RAMP-UP
3°C/SEC. MAX.
150 - 200 °C
* 260 +0/-5 °C
t 25 °C to PEAK
60 to 150 SEC.
15 SEC.
TIME WITHIN 5 °C of ACTUAL
PEAK TEMPERATURE
tp
ts
PREHEAT
60 to 180 SEC.
tL
TL
Tsmax
Tsmin
25
Tp
TIME
TEMPERATURE
NOTES:
THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 °C, Tsmin = 150 °C
NOTE: NON-HALIDE FLUX SHOULD BE USED.
* RECOMMENDED PEAK TEMPERATURE FOR WIDEBODY 400mils PACKAGE IS 245 °C
9
Insulation and Safety Related Specications
Value
Parameter Symbol HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506 Units Conditions
Minimum External L(101) 7.1 7.4 4.9 9.6 mm Measured from input
Air Gap (External terminals to output
Clearance) terminals, shortest
distance through air.
Minimum External L(102) 7.4 8.0 4.8 10.0 mm Measured from input
Tracking (External terminals to output
Creepage) terminals, shortest
distance path along body.
Minimum Internal 0.08 0.5 0.08 1.0 mm Through insulation
Plastic Gap distance, conductor to
(Internal Clearance) conductor, usually the
direct distance between
the photoemitter and
photodetector inside the
optocoupler cavity.
Minimum Internal NA NA NA 4.0 mm Measured from input
Tracking (Internal terminals to output
Creepage) terminals, along internal
cavity.
Tracking Resistance CTI ≥175 ≥175 ≥175 ≥200 Volts DIN IEC 112/VDE 0303
(Comparative Part 1
Tracing Index)
Isolation Group IIIa IIIa IIIa IIIa Material Group (DIN
VDE 0110, 1/89, Table 1)
Regulatory Information
The devices contained in this data sheet have been approved by the following agencies:
Agency/Standard HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506
Underwriters Laboratories (UL) UL 1577
Recognized under UL 1577, Component • • • •
Recognized Program, Category FPQU2,
File E55361
Canadian Standards Component
Association (CSA) Acceptance • • • •
File CA88324 Notice #5
Verband Deutscher DIN VDE 0884
Electrotechniker (VDE) (June 1992) • • •
IEC/EN/DIN EN 60747-5-2
Approved under:
IEC 60747-5-2:1997 + A1:2002 • • • •
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01
10
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics
HCPL-0466 HCPL-4506
Description Symbol Option 060 Option 060 HCPL-J456 HCNW4506 Unit
Installation classication per
DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤150 V rms I-IV I-IV I-IV I-IV
for rated mains voltage ≤300 V rms I-III I-IV I-IV I-IV
for rated mains voltage ≤450 V rms I-III I-III I-IV
for rated mains voltage ≤600 V rms I-III I-IV
for rated mains voltage ≤1000 V rms I-III
Climatic Classication 55/100/21 55/100/21 55/100/21 55/100/21
Pollution Degree 2 2 2 2
(DIN VDE 0110/1.89)
Maximum Working VIORM 560 630 891 1414 Vpeak
Insulation Voltage
Input to Output Test Voltage,
Method b* VIORM x 1.875 = VPR,
100% Production Test with tm = VPR 1050 1181 1670 2652 Vpeak
1 sec, Partial Discharge < 5pC
Input to Output Test Voltage,
Method a* VIORM x 1.5 = VPR,
Type and Sample Test, tm = 60 sec, VPR 840 945 1336 2121 Vpeak
Partial Discharge < 5pC
Highest Allowable Overvoltage* VIOTM 4000 6000 6000 8000 Vpeak
(Transient Overvoltage, tini = 10 sec)
Safety Limiting Values – maximum
values allowed in the event of a fail-
ure, also see Thermal Derating curve.
Case Temperature TS 150 175 175 150 °C
Input Current IS INPUT 150 230 400 400 mA
Output Power PS OUTPUT 600 600 600 700 mW
Insulation Resistance at TS , RS ≥ 109 ≥109 ≥109 ≥109 Ω
VIO = 500 V
*Refer to the optocoupler section of the Designer's Catalog, under regulatory information (IEC/EN/DIN EN 60747-5-2) for a detailed description of
Method a and Method b partial discharge test proles.
Notes:
These optocouplers are suitable for "safe electrical isolation" only within the safety limit data. Maintenance of the safety data shall be ensured by
means of protective circuits.
Insulation Characteristics are per IEC/EN/DIN EN 60747-5-2.
Surface mount classication is Class A in accordance with CECC 00802.
All Avago data sheets report the creepage and clearance
inherent to the optocoupler component itself. These di-
mensions are needed as a starting point for the equip-
ment designer when determining the circuit insulation
requirements. However, once mounted on a printed
circuit board, minimum creepage and clearance require-
ments must be met as specied for individual equipment
standards. For creepage, the shortest distance path along
the surface of a printed circuit board between the solder
llets of the input and output leads must be considered.
There are recommended techniques such as grooves
and ribs which may be used on a printed circuit board to
achieve desired creepage and clearances. Creepage and
clearance distances will also change depending on fac-
tors such as pollution degree and insulation level.
11
Absolute Maximum Ratings
Parameter Symbol Min. Max. Units
Storage Temperature TS -55 125 °C
Operating Temperature TA -40 100 °C
Average Input Current[1] IF(avg) 25 mA
Peak Input Current[2] (50% duty cycle, ≤1 ms pulse width) IF(peak) 50 mA
Peak Transient Input Current (<1 µs pulse width, 300 pps) IF(tran) 1.0 A
Reverse Input Voltage (Pin 3-2) HCPL-4506, HCPL-0466 VR 5 Volts
HCPL-J456, HCNW4506 3
Average Output Current (Pin 6) IO(avg) 15 mA
Resistor Voltage (Pin 7) V7 -0.5 VCC Volts
Output Voltage (Pin 6-5) VO -0.5 30 Volts
Supply Voltage (Pin 8-5) VCC -0.5 30 Volts
Output Power Dissipation[3] PO 100 mW
Total Power Dissipation[4] PT 145 mW
Lead Solder Temperature (HCPL-4506, HCPL-J456) 260°C for 10 s, 1.6 mm below seating plane
Lead Solder Temperature (HCNW4506) 260°C for 10 s
(up to seating plane)
Infrared and Vapor Phase Reow Temperature See Package Outline Drawings Section
(HCPL-0466 and Option 300)
Recommended Operating Conditions
Parameter Symbol Min. Max. Units
Power Supply Voltage VCC 4.5 30 Volts
Output Voltage VO 0 30 Volts
Input Current (ON) IF(on) 10 20 mA
Input Voltage (OFF) VF(o )* -5 0.8 V
Operating Temperature TA -40 100 °C
*Recommended VF(OFF) = -3 V to 0.8 V for HCPL-J456, HCNW4506.
12
Electrical Specications
Over recommended operating conditions unless otherwise specied:
TA = -40°C to +100°C, VCC = +4.5 V to 30 V, IF(on) = 10 mA to 20 mA, VF(o) = -5 V to 0.8 V†
Parameter Symbol Device Min. Typ.* Max. Units Test Conditions Fig. Note
Current Transfer Ratio CTR 44 90 % IF = 10 mA, 5
VO = 0.6 V
Low Level Output Current IOL 4.4 9.0 mA IF = 10 mA, 1, 2
VO = 0.6 V
Low Level Output Voltage VOL 0.3 0.6 V IO = 2.4 mA
Input Threshold Current ITH HCPL-4506 1.5 5 mA VO = 0.8 V, 1 16
HCPL-0466 IO = 0.75 mA
HCNW4506
HCPL-J456 0.6
High Level Output Current IOH 5 50 µA VF = 0.8 V 3
High Level Supply Current ICCH 0.6 1.3 mA VF = 0.8 V, 16
VO = Open
Low Level Supply Current ICCL 0.6 1.3 mA IF = 10 mA, 16
VO = Open
Input Forward Voltage VF HCPL-4506 1.5 1.8 V IF = 10 mA 4
HCPL-0466
HCPL-J456 1.2 1.6 1.95 5
HCNW4506 1.6 1.85
Temperature Coecient ∆VF/∆TA HCPL-4506 -1.6 mV/°C IF = 10 mA
of Forward Voltage HCPL-0466
HCPL-J456
HCNW4506 -1.3
Input Reverse Breakdown BVR HCPL-4506 5 V IR = 10 µA
Voltage HCPL-0466
HCPL-J456 3 IR = 100 µA
HCNW4506
Input Capacitance CIN HCPL-4506 60 pF f = 1 MHz,
HCPL-0466 VF = 0 V
HCPL-J456 72
HCNW4506
Internal Pull-up Resistor RL 14 20 25 kΩ TA = 25°C 12, 13
Internal Pull-up Resistor ∆RL/∆TA 0.014 kΩ/°C
Temperature Coecient
*All typical values at 25°C, VCC = 15 V.
†VF(o) = -3 V to 0.8 V for HCPL-J456, HCNW4506.
13
Switching Specications (RL= Internal Pull-up)
Over recommended operating conditions unless otherwise specied:
TA = -40°C to +100°C, VCC = +4.5 V to 30 V, IF(on) = 10 mA to 20 mA, VF(o) = -5 V to 0.8 V†
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Propagation Delay tPHL 20 200 400 ns IF(on) = 10 mA, VF(o) = 0.8 V, 6, 9 11-14,
Time to Logic HCPL-J456 485 VCC = 15.0 V, CL = 100 pF, 16
Low at Output VTHLH = 2.0 V, VTHHL = 1.5 V
Propagation Delay Time tPLH 220 450 650 ns
to High Output Level
Pulse Width PWD 250 500 ns 20
Distortion
Propagation Delay tPLH-tPHL -150 250 500 ns 17
Dierence Between
Any 2 Parts
Output High Level |CMH| 30 kV/µs IF = 0 mA, VCC = 15.0 V, 7 18
Common Mode VO > 3.0 V CL = 100 pF,
Transient Immunity VCM = 1500 Vp-p,
Output Low Level |CML| 30 kV/µs IF = 16 mA, TA = 25°C 19
Common Mode VO < 1.0 V
Transient Immunity
Power Supply PSR 1.0 Vp-p Square Wave, tRISE, tFALL 16
Rejection > 5 ns, no bypass capacitors
Switching Specications (RL= 20 kΩ External)
Over recommended operating conditions unless otherwise specied:
TA = -40°C to +100°C, VCC = +4.5 V to 30 V, IF(on) = 10 mA to 20 mA, VF(o) = -5 V to 0.8 V†
Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note
Propagation Delay TPHL 30 200 400 ns CL = 100 pF IF(on) = 10 mA, 6, 8, 11,
Time to Logic HCPL-J456 480 VF(o ) = 0.8 V, 10- 14,
Low at Output 100 CL = 10 pF VCC = 15.0 V, 13 16
Propagation Delay TPLH 270 400 550 ns CL = 100 pF VTHLH = 2.0 V,
Time to High VTHHL = 1.5 V
Output Level 130 CL = 10 pF
Pulse Width PWD 200 450 ns CL = 100 pF 20
Distortion
Propagation Delay tPLH-tPHL -150 200 450 ns 17
Dierence Between
Any 2 Parts
Output High Level |CMH| 15 30 kV/µs IF = 0 mA, VCC = 15.0 V, 7 18
Common Mode VO > 3.0 V CL = 100 pF,
Transient Immunity VCM = 1500 Vp-p
Output Low Level |CML| 15 30 kV/µs IF = 10 mA TA = 25°C 19
Common Mode VO < 1.0 V
Transient Immunity
*All typical values at 25°C, VCC = 15 V.
†VF(o) = -3 V to 0.8 V for HCPL-J456, HCNW4506.
14
Package Characteristics
Over recommended temperature (TA = -40°C to 100°C) unless otherwise specied.
Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note
Input-Output Momentary VISO HCPL-4506 3750 V rms RH < 50% 6,7,10
Withstand Voltage† HCPL-0466 t = 1 min.
HCPL-J456 3750 TA = 25°C 6,8,10
HCPL-4506 5000 6,9,
Option020 15
HCNW4506 5000 6,9,10
Resistance RI-O HCPL-4506 1012 VI-O = 500 Vdc 6
(Input-Output) HCPL-J456 Ω
HCPL-0466
HCNW4506 1012 1013
Capacitance CI-O HCPL-4506 0.6 pF f = 1 MHz 6
(Input-Output) HCPL-0466
HCPL-J456 0.8
HCNW4506 0.5
*All typical values at 25°C, VCC = 15 V.
†The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Table (if applicable), your
equipment level safety specication or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,” publication num-
ber 5963-2203E.
Notes:
1. Derate linearly above 90°C free-air temperature at a rate of 0.8 mA/°C.
2. Derate linearly above 90°C free-air temperature at a rate of 1.6 mA/°C.
3. Derate linearly above 90°C free-air temperature at a rate of 3.0 mW/°C.
4. Derate linearly above 90°C free-air temperature at a rate of 4.2 mW/°C.
5. CURRENT TRANSFER RATIO in percent is dened as the ratio of output collector current (IO) to the forward LED input current (IF) times 100.
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥4500 V rms for 1 second (leakage
detection current limit, II-O ≤5 µA).
8. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage
detection current limit, Ii-o ≤ 5 µA).
9. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage
detection current limit, II-O ≤ 5 µA).
10. This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Table, if ap-
plicable.
11. Pulse: f = 20 kHz, Duty Cycle = 10%.
12. The internal 20 kΩ resistor can be used by shorting pins 6 and 7 together.
13. Due to tolerance of the internal resistor, and since propagation delay is dependent on the load resistor value, performance can be improved
by using an external 20 kΩ 1% load resistor. For more information on how propagation delay varies with load resistance, see Figure 8.
14. The RL = 20 kΩ, CL = 100 pF load represents a typical IPM (Intelligent Power Module) load.
15. See Option 020 data sheet for more information.
16. Use of a 0.1 µF bypass capacitor connected between pins 5 and 8 can improve performance by ltering power supply line noise.
17. The dierence between tPLH and tPHL between any two devices under the same test condition. (See IPM Dead Time and Propagation Delay
Specications section.)
18. Common mode transient immunity in a Logic High level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that
the output will remain in a Logic High state (i.e., VO > 3.0 V).
19. Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that
the output will remain in a Logic Low state (i.e., V
O < 1.0 V).
20. Pulse Width Distortion (PWD) is dened as |tPHL - tPLH| for any given device.
15
Figure 4. HCPL-4506 and HCPL-0466 input cur-
rent vs. forward voltage.
Figure 5. HCPL-J456 and HCNW4506 input cur-
rent vs. forward voltage.
Figure 2. Normalized output current vs. tem-
perature.
Figure 1. Typical transfer characteristics. Figure 3. High level output current vs.
temperature.
Figure 6. Propagation delay test circuit.
I
F
– FORWARD CURRENT – mA
1.10
0.001
V
F
– FORWARD VOLTAGE – VOLTS
1.60
10
1.0
0.1
1.20
HCPL-4506 fig 8
1000
1.30 1.40 1.50
T
A
= 25°C
I
F
V
F
+
–
0.01
100
HCPL-4506/0466
I
F
– INPUT FORWARD CURRENT – mA
0.001
V
F
– INPUT FORWARD VOLTAGE – V
1
0.1
0.01
1.0
HCPL-4506 fig 9
100
1.4 1.8 2.0
T
A
= 25 °C
10
0.8 1.2 1.6
I
F
V
F
+
–
HCPL-J456/HCNW4506
HCPL-4506 fig 10
0.1 µF
V
CC
= 15 V
20 kΩ
I
F(ON)
=10 mA
V
OUT
C
L
*
+
–
*TOTAL LOAD CAPACITANCE
+
–
I
f
V
O
V
THHL
t
PHL
t
PLH
t
f
t
r
90%
10%
90%
10%
V
THLH
8
7
6
1
3
SHIELD 5
2
4
5 V
20 kΩ
IO – OUTPUT CURRENT – mA
0
IF – FORWARD LED CURRENT – mA
6
4
2
5
HCPL-4506 fig 5
10
10 15 20
VO = 0.6 V
8
0
100 °C
25 °C
-40 °C
NORMALIZED OUTPUT CURRENT
TA – TEMPERATURE – °C
0.95
0.90
0.85
0
HCPL-4506 fig 6
40 60 100
IF = 10 mA
VO = 0.6 V
1.00
-40 -20 20 80
1.05
0.80
IOH – HIGH LEVEL OUTPUT CURRENT – µA
TA – TEMPERATURE – °C
15.0
10.0
5.0
0
HCPL-4506 fig 7
40 60 100
20.0
-40 -20 20 80
0
4.5 V
30 V
VF = 0.8 V
VCC = VO = 4.5 V OR 30 V
16
tP – PROPAGATION DELAY – ns
RL – LOAD RESISTANCE – kΩ
600
400
200
HCPL-4506 fig 14
30 50
800
0 10 20 40
tPLH
tPHL
IF = 10 mA
VCC = 15 V
CL = 100 pF
TA = 25 °C
Figure 8. Propagation delay with external 20 kΩ
RL vs. temperature.
Figure 9. Propagation delay with internal 20 kΩ
RL vs. temperature.
Figure 10. Propagation delay vs. load resistance.
Figure 7. CMR test circuit. Typical CMR waveform.
Figure 13. Propagation delay vs. input current.Figure 11. Propagation delay vs. load capaci-
tance.
Figure 12. Propagation delay vs. supply voltage.
HCPL-4506 fig 11a
0.1 µF
V
CC = 15 V
20 kΩ
A
IF
VOUT
100 pF*
+
–
*100 pF TOTAL
CAPACITANCE
+
–
+
–
B
VFF
VCM = 1500 V
8
7
6
1
3
SHIELD 5
2
4
20 kΩ
HCPL-4506 fig 11b
V
CM
∆t
OV
V
O
V
O
SWITCH AT A: IF = 0 mA
SWITCH AT B: IF = 10 mA
V
CC
V
OL
V
CM
∆t
δV
δt=
t
P
– PROPAGATION DELAY – ns
T
A
– TEMPERATURE – °C
400
300
200
0
HCPL-4506 fig 12
40 60 100
500
-40 -20 20 80
t
PLH
t
PHL
I
F
= 10 mA
V
CC
= 15 V
CL = 100 pF
RL = 20 kΩ
(EXTERNAL)
100
tP – PROPAGATION DELAY – ns
0
CL – LOAD CAPACITANCE – pF
800
600
400
100
HCPL-4506 fig 15
1400
200 300 400
IF = 10 mA
VCC = 15 V
RL = 20 kΩ
TA = 25°C
200
1000 tPLH
tPHL
1200
0 500
tP – PROPAGATION DELAY – ns
0
VCC – SUPPLY VOLTAGE – V
800
600
400
10
HCPL-4506 fig 16
1400
15 20 25
IF = 10 mA
CL = 100 pF
RL = 20 kΩ
TA = 25°C
200
1000 tPLH
tPHL
5 30
1200
tP – PROPAGATION DELAY – ns
100
IF – FORWARD LED CURRENT – mA
300
10
HCPL-4506 fig 17
500
15
VCC = 15 V
CL = 100 pF
RL = 20 kΩ
TA = 25°C
200
400
tPLH
tPHL
50 20
tP – PROPAGATION DELAY – ns
TA – TEMPERATURE – °C
400
300
200
0
HCPL-4506 fig 13
40 60 100
600
-40 -20 20 80
tPLH
tPHL
100
IF = 10 mA
VCC = 15 V
CL = 100 pF
RL = 20 kΩ
(INTERNAL)
500
17
Figure 16. Optocoupler input to output capacitance
model for unshielded optocouplers.
Figure 15. Recommended LED drive circuit.
Figure 14. Thermal derating curve, dependence of safety limiting value with case temperature per
IEC/EN/DIN EN 60747-5-2.
Figure 18. LED drive circuit with resistor connected to LED anode (not recommended).Figure 17. Optocoupler input to output capaci-
tance model for shielded optocouplers.
HCPL-4506 fig 18a
OUTPUT POWER – P
S
, INPUT CURRENT – I
S
0
0
T
S
– CASE TEMPERATURE – °C
20050
400
12525 75 100 150
600
800
200
100
300
500
700
P
S
(mW)
HCPL-4506 OPTION 060/HCPL-J456
175
(230)
I
S
(mA) FOR HCPL-4506
OPTION 060
I
S
(mA) FOR HCPL-J456
OUTPUT POWER – PS, INPUT CURRENT – IS
0
0
TS – CASE TEMPERATURE – °C
175
HCPL-4504 fig 18b
1000
50
400
12525 75 100 150
600
800
200
100
300
500
700
900
PS (mW) FOR HCNW4506
IS (mA) FOR HCNW4506
HCPL-0466 OPTION 060/HCNW4506
PS (mW) FOR HCPL-0466
OPTION 060
IS (mA) FOR HCPL-0466
OPTION 060
(150)
0.1 µF
VCC = 15 V
20 kΩ
HCPL-4506 fig 19-new
CMOS
310 Ω
+5 V
VOUT
100 pF
+
–
*100 pF TOTAL
CAPACITANCE
8
7
6
1
3
SHIELD 5
2
4
20 kΩ
HCPL-4506 fig 20-new
8
7
6
1
3
SHIELD 5
2
4
CLEDP
CLEDN
20 kΩ
HCPL-4506 fig 21-new
8
7
6
1
3
SHIELD 5
2
4
CLEDP
CLEDN
CLED01
CLED02
20 kΩ
0.1 µF
VCC = 15 V
20 kΩ
HCPL-4506 fig 22-new
CMOS
310 Ω
+5 V
VOUT
100 pF
+
–
*100 pF TOTAL
CAPACITANCE
8
7
6
1
3
SHIELD 5
2
4
20 kΩ
18
Figure 23. Recommended LED drive circuit for
ultra high CMR.
Figure 20. AC equivalent circuit for Figure 15 during common mode
transients.
Figure 19. AC equivalent circuit for Figure 18 during common mode
transients.
Figure 21. Not recommended open collector LED
drive circuit.
Figure 22. AC Equivalent circuit for Figure 21 during common mode
transients.
20 kΩ
HCPL-4506 fig 23-new
* THE ARROWS INDICATE THE DIRECTION OF CURRENT
FLOW FOR +dVCM/dt TRANSIENTS.
310 Ω
VOUT
100 pF
+
–
ITOTAL*
VCM
8
7
6
1
3
SHIELD 5
2
4
20
kΩ
CLEDN
CLED01
CLED02
ICLEDP
IFCLEDP
ICLED01
20 kΩ
HCPL-4506 fig 24-new
* THE ARROWS INDICATE THE DIRECTION OF CURRENT
FLOW FOR +dVCM/dt TRANSIENTS.
** OPTIONAL CLAMPING DIODE FOR IMPROVED CMH
PERFORMANCE. VR < VF (OFF) DURING +dVCM/dt.
VOUT
100 pF
+
–
VCM
8
7
6
1
3
SHIELD 5
2
4
20
kΩ
CLEDP
CLEDN
CLED01
CLED02
ICLEDN*
310 Ω
+ VR** –
HCPL-4506 fig 25-new
Q1
+5 V
8
7
6
1
3
SHIELD 5
2
4
20 kΩ
20 kΩ
HCPL-4506 fig 26-new
* THE ARROWS INDICATE THE DIRECTION OF CURRENT
FLOW FOR +dVCM/dt TRANSIENTS.
VOUT
100 pF
+
–
VCM
8
7
6
1
3
SHIELD 5
2
4
20
kΩ
CLEDP
CLEDN
CLED01
CLED02
ICLEDN*
Q1
HCPL-4506 fig 27
+5 V
8
7
6
1
3
SHIELD 5
2
4
20 kΩ
19
Figure 24. Typical application circuit.
Figure 26. Waveforms for dead time calculation.Figure 25. Minimum LED skew for zero dead time.
0.1 µF
20 kΩ
HCPL-4506 fig 28
CMOS
310 Ω
+5 V
V
OUT1
I
LED1
V
CC1
M
HCPL-4506
HCPL-4506
HCPL-4506
HCPL-4506
HCPL-4506
Q2
Q1
-HV
+HV
IPM
8
7
6
1
3
SHIELD 5
2
4
20 k
Ω
HCPL-4506
0.1 µF
20 kΩ
CMOS
310 Ω
+5 V
V
OUT2
I
LED2
V
CC2
8
7
6
1
3
SHIELD 5
2
4
20 k
Ω
HCPL-4506
HCPL-4506 fig 29
V
OUT1
V
OUT2
I
LED2
t
PLH MAX.
PDD* MAX. =
(t
PLH-
t
PHL
)
MAX. =
t
PLH MAX. -
t
PHL MIN.
t
PHL
MIN.
I
LED1
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: THE PROPAGATION DELAYS USED TO CALCULATE
PDD ARE TAKEN AT EQUAL TEMPERATURES.
HCPL-4506 fig 30
VOUT1
VOUT2
ILED2
tPLH
MIN.
MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER)
= (tPLH MAX. - tPLH MIN.) + (tPHL MAX. - tPHL MIN.)
= (tPLH MAX. - tPHL MIN.) - (tPLH MIN. - tPHL MAX.)
= PDD* MAX. - PDD* MIN.
tPHL
MIN.
ILED1
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
*PDD = PROPAGATION DELAY DIFFERENCE
tPLH
MAX.
tPHL
MAX.
PDD*
MAX.
MAX.
DEAD TIME
NOTE: THE PROPAGATION DELAYS USED TO CALCULATE THE MAXIMUM
DEAD TIME ARE TAKEN AT EQUAL TEMPERATURES.
20
LED Drive Circuit Considerations for Ultra High CMR Performance
Without a detector shield, the dominant cause of op-
tocoupler CMR failure is capacitive coupl-ing from the
input side of the optocoupler, through the package, to
the detector IC as shown in Figure 16. The HCPL-4506
series improve CMR performance by using a detector
IC with an optically transparent Faraday shield, which
diverts the capacitively coupled current away from the
sensitive IC circuitry. However, this shield does not elimi-
nate the capacitive coupling between the LED and the
optocoupler output pins and output ground as shown in
Figure 17. This capacitive coupling causes perturbations
in the LED current during common mode transients and
becomes the major source of CMR failures for a shielded
optocoupler. The main design objective of a high CMR
LED drive circuit becomes keeping the LED in the proper
state (on or o) during common mode transients. For ex-
ample, the recommended application circuit (Figure 15),
can achieve 15 kV/µs CMR while minimizing component
complexity. Note that a CMOS gate is recommended in
Figure 15 to keep the LED o when the gate is in the high
state.
Another cause of CMR failure for a shielded optocoupler
is direct coupling to the optocoupler output pins through
CLEDO1 and CLEDO2 in Figure 17. Many factors inuence
the eect and magnitude of the direct coupling includ-
ing: the use of an internal or external output pull-up re-
sistor, the position of the LED current setting resistor, the
connection of the unused input package pins, and the
value of the capacitor at the optocoupler output (CL).
Techniques to keep the LED in the proper state and mini-
mize the eect of the direct coupling are discussed in the
next two sections.
CMR with the LED On (CMRL)
A high CMR LED drive circuit must keep the LED on dur-
ing common mode transients. This is achieved by over-
driving the LED current beyond the input threshold so
that it is not pulled below the threshold during a tran-
sient. The recommended minimum LED current of 10 mA
provides adequate margin over the maximum ITH of
5.0 mA (see Figure 1) to achieve 15 kV/µs CMR. Capacitive
coupling is higher when the internal load resistor is used
(due to CLEDO2) and an IF = 16 mA is required to obtain
10 kV/µs CMR.
The placement of the LED current setting resistor eects
the ability of the drive circuit to keep the LED on dur-
ing transients and interacts with the direct coupling to
the optocoupler output. For example, the LED resistor in
Figure 18 is connected to the anode. Figure 19 shows the
AC equivalent circuit for Figure 18 during common mode
transients. During a +dVcm/dt in Figure 19, the current
available at the LED anode (Itotal) is limited by the series
resistor. The LED current (IF) is reduced from its DC value
by an amount equal to the current that ows through
CLEDP and CLEDO1. The situation is made worse because
the current through CLEDO1 has the eect of trying to pull
the output high (toward a CMR failure) at the same time
the LED current is being reduced. For this reason, the
recommended LED drive circuit (Figure 15) places the
current setting resistor in series with the LED cathode.
Figure 20 is the AC equivalent circuit for Figure 15 during
common mode transients. In this case, the LED current
is not reduced during a +dVcm/dt transient because the
current owing through the package capacitance is sup-
plied by the power supply. During a -dVcm/dt transient,
however, the LED current is reduced by the amount of
current owing through CLEDN. But, better CMR perfor-
mance is achieved since the current owing in CLEDO1
during a negative transient acts to keep the output low.
Coupling to the LED and output pins is also aected by
the connection of pins 1 and 4. If CMR is limited by per-
turbations in the LED on current, as it is for the recom-
mended drive circuit (Figure 15), pins 1 and 4 should be
connected to the input circuit common. However, if CMR
performance is limited by direct coupling to the output
when the LED is o, pins 1 and 4 should be left uncon-
nected.
CMR with the LED O (CMRH)
A high CMR LED drive circuit must keep the LED o
(VF ≤ VF(OFF)) during common mode transients. For ex-
ample, during a +dVcm/dt transient in Figure 20, the
current owing through CLEDN is supplied by the parallel
combination of the LED and series resistor. As long as the
voltage developed across the resistor is less than VF(OFF)
the LED will remain o and no common mode failure will
occur. Even if the LED momentarily turns on, the 100 pF
capacitor from pins 6-5 will keep the output from dip-
ping below the threshold. The recommended LED drive
circuit (Figure 15) provides about 10 V of margin between
the lowest optocoupler output voltage and a 3 V IPM
threshold during a 15 kV/µs transient with VCM = 1500 V.
Additional margin can be obtained by adding a diode
in parallel with the resistor, as shown by the dashed line
connection in Figure 20, to clamp the voltage across the
LED below VF(OFF).
Since the open collector drive circuit, shown
in Figure 21, cannot keep the LED o during
a +dVcm/dt transient, it is not desirable for applications
requiring ultra high CMRH performance. Figure 22 is the
AC equivalent circuit for Figure 21 during common mode
transients. Essentially all the current owing through
CLEDN during a +dVcm/dt transient must be supplied by
the LED. CMRH failures can occur at dV/dt rates where
the current through the LED and CLEDN exceeds the input
threshold. Figure 23 is an alternative drive circuit which
does achieve ultra high CMR performance by shunting
the LED in the o state.
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2005-2008 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0551EN
AV02-1360EN - June 20, 2008
IPM Dead Time and Propagation Delay Specications
The HCPL-4506 series include a Propagation Delay Dier-
ence specication intended to help designers minimize
“dead time” in their power inverter designs. Dead time is
the time period during which both the high and low side
power transistors (Q1 and Q2 in Figure 24) are o. Any
overlap in Q1 and Q2 conduction will result in large cur-
rents owing through the power devices between the
high and low voltage motor rails.
To minimize dead time the designer must consider the
propagation delay characteristics of the optocoupler
as well as the characteristics of the IPM IGBT gate drive
circuit. Considering only the delay characteristics of the
optocoupler (the characteristics of the IPM IGBT gate
drive circuit can be analyzed in the same way) it is impor-
tant to know the minimum and maximum turn-on (tPHL)
and turn-o (tPLH) propagation delay specications, pref-
erably over the desired operating temperature range.
The limiting case of zero dead time occurs when the in-
put to Q1 turns o at the same time that the input to
Q2 turns on. This case determines the minimum de-
lay between LED1 turn-o and LED2 turn-on, which
is related to the worst case optocoupler propagation
delay waveforms, as shown in Figure 25. A minimum
dead time of zero is achieved in Figure 25 when the
signal to turn on LED2 is delayed by (tPLH max - tPHL
min) from the LED1 turn o. Note that the propagation
delays used to calculate PDD are taken at equal tem-
peratures since the optocouplers under consideration
are typically mounted in close proximity to each other.
(Specically, tPLH max and tPHL min in the previous equa-
tion are not the same as the tPLH max and tPHL min, over the
full operating temperature range, specied in the data
sheet.) This delay is the maximum value for the propaga-
tion delay dierence specication which is specied at
450 ns for the HCPL-4506 series over an operating tem-
perature range of
-40°C to 100°C.
Delaying the LED signal by the maximum propagation
delay dierence ensures that the minimum dead time
is zero, but it does not tell a designer what the maxi-
mum dead time will be. The maximum dead time oc-
curs in the highly unlikely case where one optocoupler
with the fastest tPLH and another with the slowest tPHL
are in the same inverter leg. The maximum dead
time in this case becomes the sum of the spread
in the tPLH and tPHL propagation delays as shown in Figure 26.
The maximum dead time is also equivalent to the dier-
ence between the maximum and minimum propagation
delay dierence specications. The maximum dead time
(due to the optocouplers) for the HCPL-4506 series is
600 ns (= 450 ns - (-150 ns) ) over an operating tempera-
ture range of -40°C to 100°C.