PIC17C4X 19.0 PIC17C43 AND PIC17C44 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings t Ambient temperature under DIAS... eee ccecsesscecsssnsceaeseneescesnceseussssneuscsueesesereeseseeseatecareneesuespersuanenesteaens -55 to +125C Storage tormperature ooo... ec ceeeseseseesecceseeseaeeenceseecessasseeesteecerseceeersessaeasesueseeasecssseseaseseeesaeacsenssausenensees -65C to +150C Voltage On VOD With respect to VSS oun... cecssesesssssesseseesecseesenscsesecessssnseasesesssccestsseseessessuscssesaeaccuenscaseaseneess 0 to +7.5V Voltage on MCLR with respect to Vss (Note 2) .. 1 0.6V to +14V Voltage on RA2 and RAS with respect to VSS... ecccseceeccscesseeceescesessesssasssesecerteesssseesesseaaeerssaeseeseeeeoneas (0.6V to +14V Voltage on all other pins with respect to VSS ooo. esccsecrecceeececceesceaceaeecesesanceesusesettasiestteacaarsnessses -0.6V to VDD +0.6V Total power dissipation (Note 1)... eee eceeeerreceeeeesecsvasessescesserseeseenstaceespenisedesecensseseseesasaneasseacoevageeentensattaes 1.0W Maximum current out of Vss pin(s) - total. Maximum current into VoD pin(s) - total Input clamp current, liK (VI < 0 or Vi > VoD) 420 mA Output clamp current, lox (VO < 0 or VO > Vob) 420 mA Maximum output current sunk by any I/O pin (except RA2 and RAS) ......... cscs cecenetsescaenaeesecenceenceecseeeseseetsseas ene 35 mA Maximum output current sunk by RA2 or RAS pins ........... eee eccescesneeescescncecneseeseneoesrasenersasoaaesaeset suse cesensseetseerteed 60 mA Maximum output current sourced by any W/O Pit... ecccccecsecsecsessnesesseseneesneananseecessaseresensseessascaecenseeeenesseeteteeenee 20 mA Maximum current sunk by PORTA and PORTB (combined)... ccecesccessssessseecenssecsneretqeaneseseseticeeenscesstsees 150 mA Maximum current sourced by PORTA and PORTB (combined) o.oo. eee escecessesenscnscestse tee soeenessenenensersenines 100 mA Maximum current sunk by PORTC, PORTD and PORTE (combined) 000.000... ec cecsscesseceenenesesceeceeeseneeteneneseates 150 mA Maximum current sourced by PORTC, PORTD and PORTE (combined) ............ .. 100 mA Note 1: Power dissipation is calculated as follows: Pdis = VoD x {IDD - 5 lon} +> {(vDD-VoH) x lOH} + Z(VOL x lov) Note 2: Voltage spikes below Vss at the MCLRA pin, inducing currents greater than 80 mA, may cause latch-up. Thus, a series resistor of 50-1002 should be used when applying a low" level to the MCLR pin rather than pulling this pin directly to Vss. 1995 Microchip Technology Inc. Preliminary DS30412A-page 2-989PIC17C4X TABLE 19-1: CROSS REFERENCE OF DEVICE SPECS FOR OSCILLATOR CONFIGURATIONS AND FREQUENCIES OF OPERATION (COMMERCIAL DEVICES) osc 17043-16 17C43-25 17LC43-08 17C44-16 17C44-25 17LC44-08 RC | Voo: 4.5V to 6.0V Vop: 4.5V to 6.0V Vop: 2.5V to 6.0V lop: 6 mA Max. lop: 6 mA Max. IDD: 6 MA Max. IPD: 5 1A Max. at 6V Ipo: 5 pA Max. at 6V IPD: 5 uA Max. at 6V WDT disabled WDT disabled WDT disabled Freq: 4 MHz Max. Freq: 4 MHz Max. Freq: 4 MHz Max. XT | VoD: 4.5V to 6.0V Vop: 4.5V to 6.0V Voo: 2.5V to 6.0V LF \DD: 24 mA Max. lop: 38 mA Max. IDO: 12 mA Max. Ipb: 5 LA Max. at 6V lpp: 5 pA Max. at 4V IPD: 5 pA Max. at 6V WDT disabled WDT disabled WDT disabled Freq: 16 MHz Max. Freq: 25 MHz Max. Freq: 8 MHz Max. EC | Vpo: 4.5V to 6.0V Vobp: 4.5V to 6.0V Voo: 2.5V to 6.0V lp: 24 mA Max. lpp: 38 mA Max. Ipo: 12 mA Max. Ipo: 5 wA Max. at 6V IPD: 5 pA Max. at 6V Ipp: 5 1A Max. at 6V WDT disabled WOT disabled WOT disabled Freq: 16 MHz Max Freq: 25 MHz Max. Freq: 8 MHz Max. Vop: 2.5V to 6.0V IDD: 150 pA Max. at 32 kHz IPD: 5 WA Max. at 6.0V WDT disabled Freq: 2 MHz Max. The shaded sections indicate oscillator selections which are tested for functionality, but not for MIN/MAX specifica- tions. It is recommended that the user select the device type that guarantees the specifications required. DS30412A-page 2-990 Preliminary 1995 Microchip Technology Inc.PIC17C4X 19.1 DC CHARACTERISTICS: PIC17C43/C44-16 (Commercial, Industrial) PIC17C43/C44-25 (Commercial, Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40C =< Ta < +85'C for industrial and DC CHARACTERISTICS oc < TA < +70C for commercial Operating voltage Vob = 4.5V to 6.0V Parameter No. Sym Characteristic Min_ | Typt| Max | Units Conditions D001 Vop__| Supply Voltage 45 - 6.0 Vv Do02 VoR | RAM Data Retention | 1.5* - - Vv Device in SLEEP mode Voltage (Note 1) Doo3 Vpor | VooD start voltage to - Vss | - V__ | See section on Power-On Reset for guarantee details Power-On Reset D004 Svpp | Vb0 rise rate to 0.060*| - - |mV/ms | See section on Power-On Reset for guarantee details Power-On Reset D010 IDb Supply Current - 3 6 mA _ | Fosc = 4 MHz (Note 4) DO11 (Note 2) - 6 | 12* | mA_ |Fosc =8 MHz Bo12 - 11. | 24* | mA_ | Fosc = 16 MHz Bo13 - 19 | 38 mA | Fosce = 25 MHz DOo14 - 95 | 150 pA | Fosc = 32 kHz, WOT enabled (EC osc configuration) DOo20 IPD Power Down - 10 | 40 HA | VoD = 6.0V, WOT enabled D021 Current (Note 3) - <1 5 wA_ | VDD = 6.0V, WDT disabled These parameters are characterized but not tested. t Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: This is the limit to which VoD can be towered in SLEEP mode without losing RAM data. 2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and switching rate, oscillator type, intemal code execution pattem, and temperature also have an impact on the current consumption. The test conditions for all IDD measurements in active operation mode are: OSC1 = extemal square wave, from rail to rail; all I/O pins tristated, pulled to VoD or Vss, TOCKI = Vpp, MCLR = Voo; WDT enabled/disabled as specified. Current consumed from the oscillator and I/O's driving external capacitive or resistive loads needs to ba con- sidered. For the RC oscillator, the current through the extemal puill-up resistor (R) can be estimated as: Vo0 / (2 R). For capacitive loads, The current can be estimated (for an individual I/O pin) as (CQ. * VpD) f CL = Total capacitive load on the I/O pin; f = average frequency the 1/O pin switches. The capacitive currents are most significant when the device is configured for external execution (includes extended microcontroller mode). 3: The power down current in SLEEP mode does not depend on the oscillator type. Power down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to oD and Vss. 4: For RC osc configuration, current through Rext is not included. The current through the resistor can be asti- mated by the formula IR = VpD/2Rext (mA) with Rext in kOhm. 1995 Microchip Technology inc. Preliminary DS30412A-page 2-991PIC17C4X 19.2 DC CHARACTERISTICS: PIC17LC43/L.C44 (Commercial, Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature OC CHARACTERISTICS -40C =< Ta <+85C for industrial and c < Tas +70C for commercial Operating voltage Vob = 2.5V to 6.0V No. Parameter Sym Characteristic Min | Typt| Max | Units Conditions 0001 Vpp | Supply Voltage 2.5 ~ 6.0 v Do02 VpR |RAM Data Retention| 1.5* ~ - v Device in SLEEP mode Voltage (Note 1) D003 VPoR | VOD start voltage to - Vss | - V___| See section on Power-On Reset for guarantee details Power-On Reset D004 SvDD | Vo0 rise rate to 0.060*} ~ - | mV/ms | See section on Power-On Reset for guarantee details Power-On Reset D010 IDbD Supply Current - 3 6 mA_ | Fosc = 4 MHz (Note 4) D011 D014 (Note 2) ~ 6 12* | mA |Fosc =8 MHz - 95 | 150 | pA | Fosc =32 kHz, WOT disabled (EC osc configuration) D020 bo21 IPD Power Down - 10 | 40 pA | VDD = 6.0V, WDT enabled Current (Note 3) - <1 5 pA | VDD = 6.0V, WOT disabled Note 1: These parameters are characterized but not tested. Data in Typ" column is at SV, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. This is the limit to which Voo can be lowered in SLEEP mode without losing RAM data. The supply current is mainty a function of the operating voltage and frequency. Other factors such as {/O pin loading and switching rate, oscillator type, intemal code execution pattem, and temperature also have an impact on the current consumption. The test conditions for all 00 measurements in active operation mode are: OSCi=extemal square wave, from rail to rail; all /O pins tristated, pulled to Vop or Vss, TOCKI = Vop, MCLR = Vpp; WOT enabled/disabled as specified. Current consumed from the oscillator and I/Os driving extemal capacitive or resistive loads needs to be con- sidered. For the RC oscillator, the current through the external pull-up resistor (R) can be estimated as: VoD / (2 R). For capacitive loads, The current can be estimated (for an individual I/O pin) as (Q. VoD) f Ct = Total capacitive load on the I/O pin; f = average frequency the 1/O pin switches. The capacitive currents are most significant when the device is configured for extemal execution (includes extended microcontroller moda) : The power down current in SLEEP mode does not depend on the oscillator type. Power down current is measured with the part in SLEEP mods, with all /O pins in hi-impedance state and tied to VDD or Vss. : For RC osc configuration, current through Rext is not included. The current through the resistor can be esti- mated by the formula IR = Vob/2Rext (mA) with Rext in kOhm. a DS30412A-page 2-992 Preliminary 1995 Microchip Technology Inc.PIC17C4X 19.3 DC CHARACTERISTICS: PIC17C43/C44-16 (Commercial, Industrial) PIC17C43/C44-25 (Commercial, Industrial) PIC17LC43/LC44-08 (Commercial, industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature DC CHARACTERISTICS -40C < TAs +85C for industrial and O'S = $TAS+70C for commercial Operating voltage Vop range as described in Section 19.1 Parameter aa No. Sym Characteristic Min Typt Max |Un Conditions input Low Voltage Vic |1/0 ports D030 with TTL buffer Vss - 0.8 V_ |PIC17C43/C44 Vss - 0.2Vop| V_ |PIC17LC43/_C44 D031 with Schmitt Trigger buffer Vss - 0.2Vb0; V Do32 MCLR, OSCt1 (in EC and RC Vss - 0.2Vo0| V_ |Note1 mode) Do33 OSC1 (in XT, and LF mode) - 0.5 Voor ~ Vv input High Voltage VIH_ {I/O ports - D040 with TTL buffer 2.0 - Vpp V | PIC17C43/C44 1+0.2VbbD)- Vpp Vi |PIC17LC43/LC44 Do41 with Schmitt Trigger buffer | 0.8 Vop - Vop Vv D042 MCLA 0.8 Vop - Vop V_ |Note1 D043 OSC1 (XT, and LF mode) - 0.5 Vop ~ Vv DOo50 VHys {Hysteresis of 0.15VoD4 - - V Schmitt Trigger inputs Input Leakage Current (Notes 2, 3) Doso lit VO ports (except RA2, RA3) - - +1 HA |Vss S VPIN s VDD, VO Pin at hi-impedance PORTB weak pull-ups disabled D061 MCLR - - +2 pA |VPIN = Vss or VPIN = VoD D062 RA2, RAS +2 BA |Vss < VRA2, VRAS s 12V D063 OSC1, TEST - - +t HA |Vss < VPIN < VoD Do64 MCLR = - 10 HA |VMCLR = VPP = 12V (when not programming) D070 IpuRB | PORTB weak pull-up current 60 200 400 | yA | VPin = Vss, RBPU =0 4.5V < VoD <6.0V . These parameters are characterized but not tested. t Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. t These parameters are for design guidance only and are not tested, nor characterized. tt Design guidance to attain the AC timing specifications. These loads are not tested. Note 1: In RC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC17CXX devices be driven with extemal clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as coming out of the pin. 4: These specifications are for the programming of the on-chip program memory EPROM through the use of the table write instructions. The complete programming specifications can be found in: PIC17CXX Programming Specifications (Literature number DS30139). 5: The MCLRVpp pin may be kept in this range at times other than programming, but is not recommended. 6: For TTL buffers, the better of the two specifications may be used. 1995 Microchip Technology inc. Preliminary DS30412A-page 2-993PIC17C4X Standard Operating Conditions (unless otherwise stated) Operating temperature DC CHARACTERISTICS -40C < TA <+85C for industrial and OC =< TAs +70C for commercial Operating voltage Vop range as described in Section 19.1 Parameter rd No. Sym Characteristic Min Typt Max | Uni Conditions Output Low Voltage Do8so Vo. |1/O ports (except RA2 and RA3) lo = Vp0/1.250 mA - - 0.1VoD}) V /45VsVp0<6.0V - - |0.1VoD*) V |Vop=2.5V D0s1 with TTL buffer - - 0.4 V_ jlo. = 6 mA, Voo = 4.5V Note 6 D082 RA2 and RA3 ~ - 3.0 V_|lot = 60.0 mA, Vop = 6.0V Dos3 OSC2/CLKOUT - - 0.4 V |loL=2mA, Vop = 4.5V D084 (RC and EC osc modes) -~ - |0.1VoD*) V_ jlot= Vo0/2.500 mA (PIC17LC43/LC44 only) Output High Voltage (Note 3) Dogo VoH_ |I/O ports (except RA2 and RA3)} IOH = -V0D/2.500 mA 0.9 VoD - - V |45VsVops6.0V 0.9VoD*; - - V |Vpp=2.5V Do91 with TTL buffer 2.4 - - V |loH = -6.0 mA, VoD=4.5V Note 6 D092 RA2 and RA3 - - 12 V_ |Pulled-up to externally applied voltage Dog3 OSC2/CLKOUT 2.4 - - V |!oH = -5 mA, VoD = 4.5V D094 (RC and EC osc modes) 0.9VoD*; - - V_ |I0H = -Vb0/2.500 mA (PIC17LC43/LC44 only) Capacitive Loading Specs on Output Pins D100 Cosc2| OSC2/CLKOUT pin - - 25 tt pF |In EC or RC osc modes when OSC2 pin Is outputting CLKOUT. external clock is used to drive osc. D101 Cio (| All/O pins and OSC2 - - SO tt | pF (in RC mode) D102 Cap |System Interface Bus - - 100 tt | pF |In Microprocessor or (PORTC, PORTD and PORTE) Extended Microcontroller mode These parameters are characterized but not tested. Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. These parameters are for design guidance only and are not tested, nor characterized. Design guidance to attain the AC timing specifications. These loads are not tested. In RC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC17CXX devices be driven with extemal clock in RC mode. : The leakage current on the MCLR pin is strongly dependent on the applied vottage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. Negative current is defined as coming out of the pin. These specifications are for the programming of the on-chip program memory EPROM through the use of the table write instructions. The complete programming specifications can be found in: PIC17CXX Programming Specifications (Literature number DS30139). The MCLRVpp pin may be kept in this range at times other than programming, but is not recommended. For TTL buffers, the better of the two specifications may be used. DS30412A-page 2-994 Preliminary 1995 Microchip Technology Inc.PIC17C4X Standard Operating Conditions (unless otherwise stated) Operating temperature DC CHARACTERISTICS -40C < TA < +85C for industrial and OC <TA<+70C for commercial Operating voltage VoD range as described in Section 19.1 Parameter J No. Sym Characteristic Min Typt Max | Unit: Conditions Internal Program Memory Programming Specs (Note 4) D110 Vpp_ |Voltage on MCLF/Vpr pin 12.5 - 13.5 V_ |Note 5 D111 Vddp {Supply voltage during program; 4.75 5.0 5.25 v ming D112 Ipp |Current into MCLR/VeP pin - 25+ 50+ mA D113 Iddp |Supply current during program- - - 30 + mA ming D114 Tprog | Programming pulse width 10 100 4000 us | Terminated via intemalVexternal interrupt or a reset These parameters are characterized but not tested. t Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. t These parameters are for design guidance only and are not tested, nor characterized. tt Design guidance to attain the AC timing specifications. These loads are not tested. Note 1: In RC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC17CXX devices be driven with extemal clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as coming out of the pin. 4: These specifications are for the programming of the on-chip program memory EPROM through the use of the table write instructions. The complete programming specifications can be found in: PIC17CXX Programming Specifications (Literature number DS30139). 5: The MCLAYVpp pin may be kept in this range at times other than programming, but is not recommended. 6: For TTL buffers, the better of the two spacifications may be used. 1995 Microchip Technology inc. Preliminary DS30412A-page 2-995PIC17C 4X 19.4 Timing Parameter Symbology The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 3.Tcc:st (I?C specifications only) 2. TppS 4.1s (IC specifications only) T F Frequency T Time Lowercase symbols (pp) and their meanings: Pp ad Address/Data ost Oscillator Start-Up Timer al ALE pwrt Power-Up Timer cc Capture1 and Capture2 tb PORTB ck CLKOUT or clock rd RD dt Data in w RB or WR in INT pin 0 TOCKI io V/O port t123 TCLK12 and TCLK3 me MCLR wat Watchdog Timer oe OE we WR os OSC1 Uppercase symbols and their meanings: Ss D Driven L Low E Edge P Period F Fall R Rise H High Vv Valid | Invalid (Hi-impedance) zZ High Impedance DS30412A-page 2-996 Preliminary 1995 Microchip Technology Inc.PIC17C4X FIGURE 19-1: PARAMETER MEASUREMENT INFORMATION All timings are measure betwaen high and low measurement points as indicated in the figures below. INPUT LEVEL CONDITIONS PORTC, D and E pins \ \ eT Vit = 2.4V Vit = 0.4V A $______pe Data in valid ts : i< Data in invalid y y XC VIH = 0.9 VDD VIL = 0.1 Yop All other input pins $e | Data in valid : st Data in invalid OUTPUT LEVEL CONDITIONS Pi Output > Output - Data out invalid hiimpe o1vooX........... Lk 08 vee y Rise Time = - ~<t- Fail Time LOAD CONDITIONS Pin CL ' Vss 50 <Ct $100 pF 1995 Microchip Technology Inc. Preliminary DS30412A-page 2-997PIC17C4X 19.5 Timing Di i Specificati FIGURE 19-2: EXTERNAL CLOCK TIMING Q4 ai ' Q2 ' a3. aa, at : osc \ . 1 osce t Nf NN t In EC and RC modes only. TABLE 19-2: EXTERNAL CLOCK TIMING REQUIREMENTS Parameter No. Sym Characteristic Min| Typt | Max) Units Conditions Fose | External CLKIN Frequency DC _ 8 MHz | EC ose mode - PIC17LC43/44-08 (Note 1) Dc _ 16 MHz - PIC17C43/44-16 Dc 25 MHz - PIC17C43/44-25 Oscillator Frequency oc - 4 MHz | RC osc.mode (Note 1) 1 _- 8 MHz | XT ose mode - PIC17LC43/44-08 1 - 16 MHz - PIC17C43/44-16 1 _ 25 MHz - PIC17C43/44-25 Dc - 2 MHz | LF ose mode 1 Tose | External CLKIN Period 125 - _ ns | EC ose mode - PIC17LC43/44-08 (Note 1) 62.5 _ - ns - PIC17C-43/44-16 40 - _ ns - PIC17C43/44-25 Oscillator Perlod 250 - _ ns | RC osc mode (Note 1) 125 ~ 1,000 | ns |XTose mode - PIC17LC43/44-08 62.5 _ 1,000] ns - PIC17C43/44-16 40 - 4,000] ns - PIC17C43/44-25 500 _ - ns_ | LF osc mode 2 Tey | instruction Cycle Time (Note 1) 160 | 4/Fosc | DC ns 3 TasL, | Clock in (OSC1) high or low time 10 - _ ns_ | EC oscillator TosH 4 TosR, | Clock in (OSC 1) rise or fall time _ _ 5+ ns_ | EC oscillator TosF t Data in "Typ" column is at SV, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. t These parameters are for design guidance only and are not tested, nor characterized. Note 1: Instruction cycle period (Tcy) equals four times the Input oscillator time base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current con- sumption. Ail devices are tested to operate at "min." values with an external clock applied to the OSC 1/CLKIN pin. When an external clock input is used, the max. cycle time limit is "DC" (no clock) for all devices. DS30412A-page 2-998 Prelim inary 1995 Microchip Technology Inc.PIC17C4X FIGURE 19-3: CLKOUT AND /OTIMING Qa Qi Q2 Q3 : ane a: i + im, 10 ot _ ' ! ng 22! - ; osc2 t Diy a 23 : et 18 vr 12 an , : 4 9 es Bm a4 14 i ma 16 VO Pin teat LLL WHIM 17 es 4 151 | VO Pin ' Vi : ' (output) old value ' new value ae! = 20,21; : : t In EC and RC modes only. TABLE 19-3: CLKOUT AND /OTIMING REQUIREMENTS Parameter No. Sym Characteristic Min Typt Max Units | Conditions 10 TosH2ckL | OSC11 to CLKOUTL _ 15t 30 ns Note 1 11 TosH2ckH |OSC11 to CLKOUTT _ 15t 30+ ns Note 1 12 TckR CLKOUT rise time _ 5+ 154 ns Note 1 13 TekF CLKOUT fall time _ 5 154 ns Note 1 14 TekH2ioV | CLKOUT T to Port out valid | 05 Tev+20+|/ ns Note 1 15 TioV2ckH | Port in valid before CLKOUTT 17043/44 | 0.25 Tcy+254/ _ ns Note 1 17LC43/44 | 0.25 Tov+50 | - ns Note 1 16 TekH2io! | Port in hold after CLKOUTT ot =_ =_ ns Note 1 17 TosH2ioV | OSC1L (Q1 cycle) to Port out valid _ _ 100 ns 18 TosH2io! =| OSC1L (Q2 cycle) to Port input invalid Oty _ _ ns (W/O in hold time) 19 TloV2esH | Port input valid to OSC14 30+ = ns (/O in setup time) 20 TioR Port output rise time _ 10 35+ ns 21 TioF Port output fall time _ 10 354 ns 22 TinHL INT pin high or iow time 25 - _ ns 23 TrbHL RB<7:0> change INT high or tow time 25 - _ ns , These parameters are characterized but not tested. t Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. t These parameters are for design guidance only and are not tested, nor characterized. Note 1: Measurements are taken in EC Mode where CLKOUT output is 4 x Tosc. 1995 Microchip Technology Inc. Preliminary DS30412A-page 2-999PIC17C4X FIGURE 19-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER TIMING Voo m _| Internal POR : a 33 : PWRT , 7 Timeout , 32 ' a osc 1 7 Timeout : ' Intemal ' ' RESET x Watchdog + Timer ' . RESET ' : ! Address / \ f Data TABLE 19-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER REQUIREMENTS Parameter Ne. Sym _ | Characteristic Min Typt Max | Units Conditions 30 TmeL | MCTR Pulse Width (low) 100 * _ _ ns |Vop =5V 31 Twdt | Watchdog Timer Timeout Period 5 12 25* ms | VOD =5V (Prescale = 1) 32 Tost | Oscillation Start-Up Timer Period 1024 Tose ms | Tosc = OSC1 period 33 Tpwrt | Power-Up Timer Period 40 96 200* | ms | VDD =5V 35 TmcL2adI} MCLR to System Interface bus - _ 100* | ns (AD<15:0>) invalid . These parameters are characterized but not tested. t Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. ; These parameters are for design guidance only and are not tested, nor characterized. This specification guaranteed by design. 0S30412A-page 2-1000 Preliminary 1995 Microchip Technology Inc.PIC17C4X FIGURE 19-5: TIMERO CLOCK TIMINGS RAM/TOCKI fy Of ae ' ' ' ' ' 40 41 \ 42 nt TABLE 19-5: TIMERO CLOCK REQUIREMENTS No. Sym |Characteristic Min Max | Units/Conditions TtOH | TOCKI High Pulse Width 0.5 Tey + 20 With Prescaler 10 N (1, 2, 4, ..., 256) are t Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. This specification guaranteed by design. FIGURE 19-6: TIMER1, TIMER2, AND TIMER3 CLOCK TIMINGS TCLK12 f or : , TCLKS t 1 TMRx x TABLE 19-6: TIMER1, TIMER2, AND TIMER3 CLOCK REQUIREMENTS No. Sym |Characteristic Min t Max | Units/Conditions 45 Tti23H 12 and high time 0.5 Tey + 20 |) _~ ns cy + _ ns ns [N= N (1, 2, 4, 8) Timer increment are t Data in Typ* column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. This specification guaranteed by design. 1995 Microchip Technology Inc. Preliminary DS30412A-page 2-1001PIC17C4X FIGURE 19-7: CAPTURE TIMINGS CAP1 and CAP2 (Capture Mode) NFR TABLE 19-7: CAPTURE REQUIREMENTS Parameter No. Sym |Characteristic Min Typt| Max | Units| Conditions 50 TecL |Capture1 and Capture2 input low time 10* | | ns 51 TecH |Capture1 and Capture? input high time 10 | [ns 52 TeeP |Capture1 and Capture? input period aly }| | ns the Proseale value or * These parameters are characterized but not tested. t Data in "Typ" column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. This specification guaranteed by design. FIGURE 19-8: PWMTIMINGS PWM1 and PWM2 (PWM Mode) 53 ee ei 54 TABLE 19-8: PWM REQUIREMENTS No. Sym |Characteristic Typt| Max | Units/ Conditions 53 and PWM2 output 10* | 35 ns ns are t Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tasted. This specification guaranteed by design. es 0S30412A-page 2-1002 Preliminary 1995 Microchip Technology Inc.PIC17C4X FIGURE 19-9: SCI MODULE: SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING RASTXCK oN KN pin e121 e121 ty RAA/RX/DT Se xX 1 pin , ' ~ = 120 122 , << TABLE 19-9: SERIAL PORT SYNCHRONOUS TRANSMISSION REQUIREMENTS Parameter No. Sym Characterlstic Min | Typt Max Units | Conditions 120 TekHadtv | SYNC XMIT (MASTER & SLAVE) Clock high to data out valid 17C43/44 _ _ 50 ns 17LC43/44 - _ 75 ns 121 TekRF Clock out rise time and fall time 17043/44 - - 25 ns (Master Mode) i7ucaa44 | | 40 ns 122 TdtRF Data out rise time and fail time 17043/44 - _- 25 ns 17LC43/44 _ _- 40 ns t Data In Typ" column is at SV, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. FIGURE 19-10: SCI MODULE: SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING pin \ 125 ' RA4/RX/DT 4 : pin re x TABLE 19-10: SERIAL PORT SYNCHRONOUS RECEIVE REQUIREMENTS Parameter No. Sym Characteristic Min Typt Max Units | Conditions 125 TatV2ckL | SYNC RCV (MASTER & SLAVE) 15 _ _ ns Data hold before CK (DT hold time) 126 TekLadtt Data hold after CKL (DT hold time) 15 _ _ ns t Data in Typ column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. 1995 Microchip Technology Inc. Preliminary 1DS30412A-page 2-1003PIC17C4X FIGURE 19-11: MEMORY INTERFACE WRITETIMING (NOT SUPPORTED IN PIC17LC4X DEVICES) at a2 a3 : Qa Qi a2 ose Fe ~ ~ f a a : i OE me 18 mm : pT ; 1 oo 450 . Ve AD<15:0> _______ {3 ear out: x 1 + data out: ' X addr out ' 52 1 SS TABLE 19-11: MEMORY INTERFACE WRITE REQUIREMENTS (NOT SUPPORTED IN PIC17LC4X DEVICES) Parameter No. Sym Characteristic Min Typt Max Units | Conditions 150 TadV2alL | AD<15:0> (address) valid to ALE 0.25 Tey-30 - - ns (address setup time) 151 TalL2adi | ALEJ to address out invalid 0 - ns (address hold time) 152 TadV2wrL | Data out valid to WAL 0.25 Tey-40 - _ ns (data setup time) 153 TwrH2ad! | WRT to data out invalid - 0.25 Tey _ ns (data hold time) 154 Twrb WR pulse width _ 0.25 Tey ns tested. This specification guaranteed by design. These parameters are characterized but not tested. Data in "Typ" column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not DS530412A-page 2-1004 Preliminary ee 1995 Microchip Technology inc.PIC17C4X FIGURE 19-12: MEMORY INTERFACE READ TIMING (NOT SUPPORTED IN PIC17LC4X DEVICES) Qi Q2 Q3 : a4 : Qi Q2 AD<15:0> TABLE 19-12: MEMORY INTERFACE READ REQUIREMENTS (NOT SUPPORTED IN PIC17LC4X DEVICES) Parameter No. Sym Characteristic Min Typt Max Units | Conditions 150 TadV2all | AD<15:0> (address) valid to ALEL 0.25 Tcy-30 _ _- ns (address setup time) 151 TalL2adi ALEJ to address out invalid 0 _ _ ns (address hold time} 160 TadZ20eL | AD<15:0> hi-impedance to OEL 10 _ _ ns 161 ToeH2adD | DET to AD<15:0> driven 0.25 Tey-15 _ ~ ns 162 TadV20eH | Data in valid before OET 35 ns (data setup time) 163 ToeH2ad! | OETto data in invalid (data hold time) 0 - _ ns 164 TalH ALE pulse width _ 0.25 Tey _ ns 165 ToeL GE pulse width 0.5 Tey-35 _ _ ns 166 TalH2alH ALET to ALET (cycle time) - Tey _ ns 167 Tace Address access time _- _- 0.75 Tey-30 | ns 168 Toe Output enable access time _ _ O.5Tcy-45| ns (OE low to Data Valid) These parameters are characterized but not tested. t Data in "Typ" column is at SV, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. This specification guaranteed by design. 1995 Microchip Technology Inc. Preliminary DS30412A-page 2-1005