1
LT3012B
3012bf
■
Wide Input Voltage Range: 4V to 80V
■
Low Quiescent Current: 40µA
■
Low Dropout Voltage: 400mV
■
Output Current: 250mA
■
No Protection Diodes Needed
■
Adjustable Output from 1.24V to 60V
■
Stable with 3.3µF Output Capacitor
■
Stable with Aluminum, Tantalum or Ceramic
Capacitors
■
Reverse-Battery Protection
■
No Reverse Current Flow from Output to Input
■
Thermal Limiting
■
Thermally Enhanced 16-Lead TSSOP and 12-Pin
(4mm × 3mm) DFN Packages
250mA, 4V to 80V
Low Dropout
Micropower Linear Regulator
5V Supply
Dropout Voltage
The LT
®
3012B is a high voltage, micropower low dropout
linear regulator. The device is capable of supplying 250mA
of output current with a dropout voltage of 400mV. De-
signed for use in battery-powered or high voltage sys-
tems, the low quiescent current (40µA operating) makes
the LT3012B an ideal choice. Quiescent current is also well
controlled in dropout.
Other features of the LT3012B include the ability to oper-
ate with very small output capacitors. The regulators are
stable with only 3.3µF on the output while most older
devices require between 10µF and 100µF for stability.
Small ceramic capacitors can be used without any need for
series resistance (ESR) as is common with other regula-
tors. Internal protection circuitry includes reverse-battery
protection, current limiting, thermal limiting and reverse
current protection.
The device is available with an adjustable output with a
1.24V reference voltage. The LT3012B regulator is avail-
able in the 16-lead TSSOP and 12 pin low profile (0.75mm)
(4mm × 3mm) DFN packages with an exposed pad for
enhanced thermal handling capability.
■
Low Current High Voltage Regulators
■
Regulator for Battery-Powered Systems
■
Telecom Applications
■
Automotive Applications
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
1µF
VIN
5.4V TO
80V
3012B TA01
VOUT
5V
250mA
3.3µF
750k
249k
IN
LT3012B
OUT
ADJ
GND
OUTPUT CURRENT (mA)
0
250
300
400
350
200
3012B TA02
200
150
50 100 150 250
100
50
0
DROPOUT VOLTAGE (mV)
2
LT3012B
3012bf
PACKAGE/ORDER I FOR ATIO
UU
W
IN Pin Voltage ................................................... ±80V
OUT Pin Voltage ............................................... ±60V
IN to OUT Differential Voltage ........................... ±80V
ADJ Pin Voltage .................................................. ±7V
Output Short-Circuit Duration ..................... Indefinite
ABSOLUTE AXI U RATI GS
WWWU
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage I
LOAD
= 250mA ●4 4.5 V
ADJ Pin Voltage (Notes 2, 3) V
IN
= 4V, I
LOAD
= 1mA 1.225 1.24 1.255 V
4.5V < V
IN
< 80V, 1mA < I
LOAD
< 250mA ●1.2 1.24 1.28 V
Line Regulation ∆V
IN
= 4V to 80V, I
LOAD
= 1mA (Note 2) ●0.1 5 mV
Load Regulation (Note 2) V
IN
= 4.5V, ∆I
LOAD
= 1mA to 250mA 7 12 mV
V
IN
= 4.5V, ∆I
LOAD
= 1mA to 250mA ●25 mV
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
Storage Temperature Range
TSSOP Package ........................... –65°C to 150°C
DFN Package ............................... –65°C to 125°C
Operating Junction Temperature Range
(Notes 3, 9, 10) ........................... –40°C to 125°C
Lead Temperature (Soldering, 10 sec)............ 300°C
T
JMAX
= 125°C, θ
JA
= 40°C/ W, θ
JC
= 16°C/ W
EXPOSED PAD (PIN 13) IS GND
MUST BE SOLDERED TO PCB
DE PART MARKING
LT3012BEDE 3012B
T
JMAX
= 125°C, θ
JA
= 40°C/ W, θ
JC
= 16°C/ W
EXPOSED PAD (PIN 17) IS GND
MUST BE SOLDERED TO PCB
ORDER PART NUMBER FE PART MARKING
LT3012BEFE 3012BEFE
ORDER PART NUMBER
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
(Note 1)
12
11
10
9
8
7
13
1
2
3
4
5
6
NC
IN
IN
NC
NC
NC
NC
OUT
OUT
ADJ
GND
NC
TOP VIEW
DE PACKAGE
12-LEAD (4mm × 3mm) PLASTIC DFN
FE PACKAGE
16-LEAD PLASTIC TSSOP
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
17
GND
NC
OUT
OUT
ADJ
GND
NC
GND
GND
NC
IN
IN
NC
NC
NC
GND
3
LT3012B
3012bf
PARAMETER CONDITIONS MIN TYP MAX UNITS
Dropout Voltage I
LOAD
= 10mA 160 230 mV
V
IN
= V
OUT(NOMINAL)
I
LOAD
= 10mA ●300 mV
(Notes 4, 5) I
LOAD
= 50mA 250 340 mV
I
LOAD
= 50mA ●420 mV
I
LOAD
= 250mA 400 490 mV
I
LOAD
= 250mA ●620 mV
GND Pin Current I
LOAD
= 0mA ●40 100 µA
V
IN
= 4.5V I
LOAD
= 100mA 3 mA
(Notes 4, 6) I
LOAD
= 250mA ●10 18 mA
Output Voltage Noise C
OUT
= 10µF, I
LOAD
= 250mA, BW = 10Hz to 100kHz 100 µV
RMS
ADJ Pin Bias Current (Note 7) 30 100 nA
Ripple Rejection V
IN
= 7V(Avg), V
RIPPLE
= 0.5V
P-P
, f
RIPPLE
= 120Hz, I
LOAD
= 250mA 65 75 dB
Current Limit V
IN
= 7V, V
OUT
= 0V 400 mA
V
IN
= 4.5V, ∆V
OUT
= –0.1V (Note 2) ●270 mA
Reverse Output Current (Note 8) V
OUT
= 1.24V, V
IN
< 1.24V (Note 2) 12 25 µA
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3012B is tested and specified for these conditions with the
ADJ pin connected to the OUT pin.
Note 3: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 4: To satisfy requirements for minimum input voltage, the LT3012B
is tested and specified for these conditions with an external resistor divider
(249k bottom, 549k top) for an output voltage of 4V. The external resistor
divider will add a 5µA DC load on the output.
Note 5: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to (V
IN
– V
DROPOUT
).
Note 6: GND pin current is tested with V
IN
= 4.5V and a current source
load. This means the device is tested while operating close to its dropout
region. This is the worst-case GND pin current. The GND pin current will
decrease slightly at higher input voltages.
Note 7: ADJ pin bias current flows into the ADJ pin.
Note 8: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 9: The LT3012BE is guaranteed to meet performance specifications
from 0°C to 125°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
Note 10: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is
active. Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
4
LT3012B
3012bf
OUTPUT CURRENT (mA)
0
DROPOUT VOLTAGE (mV)
300
400
600
500
3012B G01
200
100
010050 200150 250
T
J
= 125°C
T
J
= 25°C
OUTPUT CURRENT (mA)
0
GUARANTEED DROPOUT VOLTAGE (mV)
200
400
600
100
300
500
100 200
301B2 G02
250500 150
= TEST POINTS T
J
≤ 125°C
T
J
≤ 25°C
TEMPERATURE (°C)
–50
0
DROPOUT VOLTAGE (mV)
200
600
500
050 75
3012B G03
100
400
300
–25 25 100 125
I
L
= 50mA
I
L
= 10mA
I
L
= 250mA I
L
= 100mA
I
L
= 1mA
TEMPERATURE (°C)
–50
ADJ PIN VOLTAGE (V)
1.255
25
3012B G05
1.240
1.230
–25 0 50
1.225
1.220
1.260
1.250
1.245
1.235
75 100 125
I
L
= 1mA
INPUT VOLTAGE (V)
0
QUIESCENT CURRENT (µA)
40
60
80
8
3012B G06
20
10
30
50
70
021 43 67 9
510
T
J
= 25°C
R
L
=
∞
V
OUT
= 1.24V
TEMPERATURE (°C)
–50
QUIESCENT CURRENT (µA)
25
3012B G04
20
10
–25 0 50
0
40
30
60
50
80
70
100
90
75 100 125
V
IN
= 6V
R
L
= ∞
I
L
= 0
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
1.2
8
3012B G07
0.8
0.4
1.0
0.6
0.2
021 43 67 9
510
T
J
= 25°C
*FOR V
OUT
= 1.24V
R
L
= 49.6Ω
I
L
= 25mA*
R
L
= 124Ω
I
L
= 10mA*
R
L
= 1.24k
I
L
= 1mA*
LOAD CURRENT (mA)
0
GND PIN CURRENT (mA)
6
8
10
3012B G09
4
2
5
7
9
3
1
010050 200150 250
V
IN
= 4.5V
T
J
= 25°C
V
OUT
= 1.24V
INPUT VOLTAGE (V)
0
GND PIN CURRENT (mA)
6
8
10
8
3012B G08
4
2
5
7
9
3
1
021 43 67 9
510
T
J
= 25°C, *FOR V
OUT
= 1.24V
R
L
= 4.96Ω
I
L
= 250mA*
R
L
= 12.4Ω
I
L
= 100mA*
R
L
= 24.8Ω, I
L
= 50mA*
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Quiescent Current ADJ Pin Voltage Quiescent Current
GND Pin Current
Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage
GND Pin Current GND Pin Current vs ILOAD
5
LT3012B
3012bf
TEMPERATURE (°C)
–50
ADJ PIN BIAS CURRENT (nA)
45
25
3012B G13
25
20
–25 0 50
5
10
15
0
50
40
35
30
75 100 125
INPUT VOLTAGE (V)
0
CURRENT LIMIT (mA)
600
800
1000
3012B G14
400
200
500
700
900
300
100
02010 4030 60 70
50 80
T
J
= 25°C
T
J
= 125°C
V
OUT
= 0V
TEMPERATURE (°C)
–50
0
CURRENT LIMIT (mA)
050 75
3012B G15
–25 25 100 125
V
IN
= 7V
V
OUT
= 0V
600
400
200
500
700
300
100
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (µA)
120
160
200
8
3012B G16
80
40
100
140
180
60
20
021 43 67 9
510
T
J
= 25°C
V
IN
= 0V
V
OUT
= V
ADJ
CURRENT FLOWS
INTO OUTPUT PIN
ADJ
PIN CLAMP
(SEE APPLICATIONS
INFORMATION)
TEMPERATURE (°C)
–50
REVERSE OUTPUT CURRENT (µA)
25
3012B G17
20
10
–25 0 50
5
0
35
30
25
15
75 100 125
V
IN
= 0V
V
OUT
= V
ADJ
= 1.24V
TEMPERATURE (°C)
–50
60
RIPPLE REJECTION (dB)
68
92
80
84
88
050 75
3012B G18
64
76
72
–25 25 100 125
VIN = 4.5V + 0.5VP-P RIPPLE AT f = 120Hz
IL = 250mA
VOUT = 1.24V
TYPICAL PERFOR A CE CHARACTERISTICS
UW
ADJ Pin Bias Current Current Limit
Reverse Output Current
Current Limit
Input Ripple RejectionReverse Output Current
TEMPERATURE (°C)
–50
MINIMUM INPUT VOLTAGE (V)
3.5
25
3012B G20
2.0
1.0
–25 0 50
0.5
0
4.0
3.0
2.5
1.5
75 100 125
I
LOAD
= 250mA
FREQUENCY (Hz)
10
40
RIPPLE REJECTION (dB)
50
60
70
80
100 1k 10k 100k 1M
3012B G19
30
20
10
0
90
100 V
IN
= 4.5V + 50mV
RMS
RIPPLE
I
LOAD
= 250mA
C
OUT
= 10µF
C
OUT
= 3.3µF
Minimum Input Voltage
Input Ripple Rejection
6
LT3012B
3012bf
FREQUENCY (Hz)
0.1
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
1
10 1k 10k 100k
3012B G22
0.01
100
10 C
OUT
= 3.3µF
I
LOAD
= 250mA
TIME (µs)
0
OUTPUT VOLTAGE
DEVIATION (V)LOAD CURRENT (mA)
–0.05
0.05
400
3012B G24
100
–0.10
–0.15
0
0.10
0.15
200
300
0100 200 300 500
V
IN
= 6V
V
OUT
= 5V
C
IN
= 3.3µF CERAMIC
C
OUT
= 3.3µF CERAMIC
∆I
LOAD
= 100mA TO 200mA
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Output Noise Spectral Density
10Hz to 100kHz Output Noise Transient Response
V
OUT
100µV/DIV
C
OUT
= 10µF 1ms/DIV 3012B G23
I
L
= 250mA
V
OUT
= 1.24V
TEMPERATURE (°C)
–50
LOAD REGULATION (mV)
–4
–2
25
3012B G21
–12
–16
–25 0 50
–18
–20
0
–8
–6
–10
–14
75 100 125
∆I
L
= 1mA TO 250mA
Load Regulation
7
LT3012B
3012bf
OUT (Pins 2, 3)/(Pins 3, 4): Output. The output supplies
power to the load. A minimum output capacitor of 3.3µF is
required to prevent oscillations. Larger output capacitors
will be required for applications with large transient loads
to limit peak voltage transients. See the Applications
Information section for more information on output ca-
pacitance and reverse output characteristics.
ADJ (Pin 4)/(Pin 5): Adjust. This is the input to the error
amplifier. This pin is internally clamped to ±7V. It has a
bias current of 30nA which flows into the pin (see curve of
ADJ Pin Bias Current vs Temperature in the Typical Perfor-
mance Characteristics). The ADJ pin voltage is 1.24V
referenced to ground, and the output voltage range is
1.24V to 60V.
GND (Pins 5, 13)/(Pins 1, 6, 8, 9, 16, 17): Ground. The
exposed backside of the package is an electrical connec-
tion for GND. As such, to ensure optimum device opera-
tion and thermal performance, the exposed pad must be
connected directly to pin 5/pin 6 on the PC board.
IN (Pins 10, 11)/(Pins 13,14): Input. Power is supplied to
the device through the IN pin. A bypass capacitor is
required on this pin if the device is more than six inches
away from the main input filter capacitor. In general, the
output impedance of a battery rises with frequency, so it
is advisable to include a bypass capacitor in battery-
powered circuits. A bypass capacitor in the range of 1µF to
10µF is sufficient. The LT3012B is designed to withstand
reverse voltages on the IN pin with respect to ground and
the OUT pin. In the case of a reversed input, which can
happen if a battery is plugged in backwards, the LT3012B
will act as if there is a diode in series with its input. There
will be no reverse current flow into the LT3012B and no
reverse voltage will appear at the load. The device will
protect both itself and the load.
NC (Pins 1, 6-9, 12)/(Pins 2, 7, 10-12, 15): No Connect.
No Connect pins may be floated, tied to IN or tied to GND.
UU
U
PI FU CTIO S
(DFN Package)/(TSSOP Package)
8
LT3012B
3012bf
The LT3012B is a 250mA high voltage low dropout regu-
lator with micropower quiescent current. The device is
capable of supplying 250mA at a dropout voltage of
400mV. Operating quiescent current is only 40µA. In
addition to the low quiescent current, the LT3012B incor-
porates several protection features which make it ideal for
use in battery-powered systems. The device is protected
against both reverse input and reverse output voltages. In
battery backup applications where the output can be held
up by a backup battery when the input is pulled to ground,
the LT3012B acts like it has a diode in series with its output
and prevents reverse current flow.
Adjustable Operation
The LT3012B has an output voltage range of 1.24V to
60V. The output voltage is set by the ratio of two external
resistors as shown in Figure 1. The device servos the
output to maintain the voltage at the adjust pin at 1.24V
referenced to ground. The current in R1 is then equal to
1.24V/R1 and the current in R2 is the current in R1 plus
the ADJ pin bias current. The ADJ pin bias current, 30nA
at 25°C, flows through R2 into the ADJ pin. The output
voltage can be calculated using the formula in Figure 1.
The value of R1 should be less than 250k to minimize
errors in the output voltage caused by the ADJ pin bias
current.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin and a 5µA DC load (unless otherwise
specified) for an output voltage of 1.24V. Specifications
for output voltages greater than 1.24V will be proportional
APPLICATIO S I FOR ATIO
WUUU
Figure 1. Adjustable Operation
to the ratio of the desired output voltage to 1.24V; (V
OUT
/
1.24V). For example, load regulation for an output current
change of 1mA to 250mA is –7mV typical at V
OUT
= 1.24V.
At V
OUT
= 12V, load regulation is:
(12V/1.24V) • (–7mV) = –68mV
Output Capacitance and Transient Response
The LT3012B is designed to be stable with a wide range of
output capacitors. The ESR of the output capacitor affects
stability, most notably with small capacitors. A minimum
output capacitor of 3.3µF with an ESR of 3Ω or less is
recommended to prevent oscillations. The LT3012B is a
micropower device and output transient response will be
a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide
improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT3012B, will increase the
effective output capacitor value.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common di-
electrics used are specified with EIA temperature charac-
teristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V
dielectrics are good for providing high capacitances in a
small package, but they tend to have strong voltage and
temperature coefficients as shown in Figures 2 and 3.
When used with a 5V regulator, a 16V 10µF Y5V capacitor
VIN
3012B F01
VOUT
R2 C1
R1
+
R2
R1
VOUT = 1.24V
VADJ = 1.24V
IADJ = 30nA AT 25°C
OUTPUT RANGE = 1.24V TO 60V
+ (IADJ)(R2)1 +
()
IN
LT3012B
OUT
ADJ
GND
9
LT3012B
3012bf
can exhibit an effective value as low as 1µF to 2µF for the
DC bias voltage applied and over the operating tempera-
ture range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is
available in higher values. Care still must be exercised
when using X5R and X7R capacitors; the X5R and X7R
codes only specify operating temperature range and maxi-
mum capacitance change over temperature. Capacitance
change due to DC bias with X5R and X7R capacitors is
better than Y5V and Z5U capacitors, but can still be
significant enough to drop capacitor values below appro-
priate levels. Capacitor DC bias characteristics tend to
improve as component case size increases, but expected
capacitance at operating voltage should be verified.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
Current Limit and Safe Operating Area Protection
Like many IC power regulators, the LT3012B has safe
operating area protection. The safe operating area protec-
tion decreases the current limit as the input voltage
increases and keeps the power transistor in a safe operat-
ing region. The protection is designed to provide some
output current at all values of input voltage up to the device
breakdown (see curve of Current Limit vs Input Voltage in
the Typical Performance Characteristics).
The LT3012B is limited for operating conditions by maxi-
mum junction temperature. While operating at maximum
input voltage, the output current range must be limited;
when operating at maximum output current, the input
voltage range must be limited. Device specifications will
not apply for all possible combinations of input voltage
and output current. Operating the LT3012B beyond the
maximum junction temperature rating may impair the life
of the device.
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be made up of two
components:
1. Output current multiplied by the input/output voltage
differential: I
OUT
• (V
IN
– V
OUT
) and,
2. GND pin current multiplied by the input voltage:
I
GND
• V
IN
.
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Character-
istics. Power dissipation will be equal to the sum of the two
components listed above.
APPLICATIO S I FOR ATIO
WUUU
Figure 2. Ceramic Capacitor DC Bias Characterics Figure 3. Ceramic Capacitor Temperature Characterics
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
3012B F02
20
0
–20
–40
–60
–80
–100 04810
26 12 14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100
25 75
3012B F03
–25 0 50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
10
LT3012B
3012bf
The LT3012B has internal thermal limiting designed to
protect the device during overload conditions. For con-
tinuous normal conditions the maximum junction tem-
perature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. DFN Measured Thermal Resistance
COPPER AREA THERMAL RESISTANCE
TOPSIDE BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 2500 sq mm 62°C/W
Table 2. TSSOP Measured Thermal Resistance
COPPER AREA THERMAL RESISTANCE
TOPSIDE BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 2500 sq mm 62°C/W
The thermal resistance junction-to-case (θ
JC
), measured
at the exposed pad on the back of the die, is 16°C/W.
Continuous operation at large input/output voltage differ-
entials and maximum load current is not practical due to
thermal limitations. Transient operation at high input/
output differentials is possible. The approximate thermal
time constant for a 2500sq mm 3/32" FR-4 board with
maximum topside and backside area for one ounce copper
is 3 seconds. This time constant will increase as more
thermal mass is added (i.e. vias, larger board, and other
components).
For an application with transient high power peaks, aver-
age power dissipation can be used for junction tempera-
ture calculations as long as the pulse period is significantly
less than the thermal time constant of the device and
board.
Calculating Junction Temperature
Example 1: Given an output voltage of 5V, an input voltage
range of 24V to 30V, an output current range of 0mA to
50mA, and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX)
• (V
IN(MAX)
– V
OUT
) + (I
GND
• V
IN(MAX)
)
where:
I
OUT(MAX)
= 50mA
V
IN(MAX)
= 30V
I
GND
at (I
OUT
= 50mA, V
IN
= 30V) = 1mA
So:
P = 50mA
• (30V – 5V) + (1mA
• 30V) = 1.28W
The thermal resistance will be in the range of 40°C/W to
62°C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
1.31W
• 50°C/W = 65.5°C
APPLICATIO S I FOR ATIO
WUUU
11
LT3012B
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APPLICATIO S I FOR ATIO
WUUU
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX
= 50°C + 65.5°C = 115.5°C
Example 2: Given an output voltage of 5V, an input voltage
of 48V that rises to 72V for 5ms(max) out of every 100ms,
and a 5mA load that steps to 50mA for 50ms out of every
250ms, what is the junction temperature rise above ambi-
ent? Using a 500ms period (well under the time constant
of the board), power dissipation is as follows:
P1(48V in, 5mA load) = 5mA • (48V – 5V)
+ (200µA • 48V) = 0.23W
P2(48V in, 50mA load) = 50mA • (48V – 5V)
+ (1mA • 48V) = 2.20W
P3(72V in, 5mA load) = 5mA • (72V – 5V)
+ (200µA • 72V) = 0.35W
P4(72V in, 50mA load) = 50mA • (72V – 5V)
+ (1mA • 72V) = 3.42W
Operation at the different power levels is as follows:
76% operation at P1, 19% for P2, 4% for P3, and
1% for P4.
P
EFF
= 76%(0.23W) + 19%(2.20W) + 4%(0.35W)
+ 1%(3.42W) = 0.64W
With a thermal resistance in the range of 40°C/W to
62°C/W, this translates to a junction temperature rise
above ambient of 26°C to 38°C.
Protection Features
The LT3012B incorporates several protection features
which make it ideal for use in battery-powered circuits. In
addition to the normal protection features associated with
monolithic regulators, such as current limiting and ther-
mal limiting, the device is protected against reverse-input
voltages, and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages of
80V. No negative voltage will appear at the output. The
device will protect both itself and the load. This provides
protection against batteries which can be plugged in
backward.
The ADJ pin of the device can be pulled above or below
ground by as much as 7V without damaging the device. If
the input is left open circuit or grounded, the ADJ pin will
act like an open circuit when pulled below ground, and like
a large resistor (typically 100k) in series with a diode when
pulled above ground. If the input is powered by a voltage
source, pulling the ADJ pin below the reference voltage
will cause the device to current limit. This will cause the
output to go to a unregulated high voltage. Pulling the ADJ
pin above the reference voltage will turn off all output
current.
12
LT3012B
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APPLICATIO S I FOR ATIO
WUUU
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
from the 1.24V reference when the output is forced to 60V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 53V difference between the OUT and
ADJ pins divided by the 5mA maximum current into the
ADJ pin yields a minimum top resistor value of 10.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
Figure 4. Reverse Output Current
OUTPUT VOLTAGE (V)
0
REVERSE OUTPUT CURRENT (µA)
120
160
200
8
3012B F04
80
40
100
140
180
60
20
021 43 67 9
510
ADJ
PIN CLAMP
(SEE ABOVE)
T
J
= 25°C
V
IN
= 0V
V
OUT
= V
ADJ
CURRENT FLOWS
INTO OUTPUT PIN
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 4. The rise in reverse output
current above 7V occurs from the breakdown of the 7V
clamp on the ADJ pin. With a resistor divider on the
regulator output, this current will be reduced depending
on the size of the resistor divider.
When the IN pin of the LT3012B is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input current
will typically drop to less than 2µA. This can happen if the
input of the LT3012B is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit.
13
LT3012B
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+
ADJ
OUTIN
LT3012B
GND
1µF3.3µF
750k
VIN
12V
(LATER 42V) LOAD: CLOCK,
SECURITY SYSTEM
ETC
+
–
ADJ
OUTIN
LT3012B
GND
1µF3.3µF
VIN
48V
(72V TRANSIENT)
LOAD:
SYSTEM MONITOR
ETC
NO PROTECTION
DIODE NEEDED!
NO PROTECTION
DIODE NEEDED!
3012B TA05
BACKUP
BATTERY
249k
750k
249k
LT3012B Automotive Application
LT3012B Telecom Application
Constant Brightness for Indicator LED over Wide Input Voltage Range
IN
LT3012B
1µF
RETURN
–48V
OUT
ADJ
GND
3012B TA06
3.3µF
RSET
ILED = 1.24V/RSET
–48V CAN VARY FROM –4V TO –80V
TYPICAL APPLICATIO S
U
14
LT3012B
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U
PACKAGE DESCRIPTIO
DE/UE Package
12-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1695 Rev C)
4.00 ±0.10
(2 SIDES)
3.00 ±0.10
(2 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION
(WGED) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.70 ± 0.05
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
R = 0.05
TYP
0.25 ± 0.05
3.30 ±0.05
(2 SIDES)
16
127
0.50
BSC
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(UE12/DE12) DFN 0905 REV C
0.25 ± 0.05
3.30 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.70 ±0.05
(2 SIDES)2.20 ±0.05
0.50
BSC
0.70 ±0.05
3.60 ±0.05
PACKAGE OUTLINE
15
LT3012B
3012bf
U
PACKAGE DESCRIPTIO
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
FE16 (BB) TSSOP 0204
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
134
5678
10 9
4.90 – 5.10*
(.193 – .201)
16 1514 13 12 11
1.10
(.0433)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC
2.94
(.116)
0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
2.94
(.116)
3.58
(.141)
3.58
(.141)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
16
LT3012B
3012bf
PART NUMBER DESCRIPTION COMMENTS
LT1020 125mA, Micropower Regulator and Comparator V
IN
: 4.5V to 36V, V
OUT(MIN)
= 2.5V, V
DO
= 0.4V, I
Q
= 40µA, I
SD
= 40µA,
Comparator and Reference, Class B Outputs, S16, PDIP14 Packages
LT1120/LT1120A 125mA, Micropower Regulator and Comparator V
IN
: 4.5V to 36V, V
OUT(MIN)
= 2.5V, V
DO
= 0.4V, I
Q
= 40µA, I
SD
= 10µA,
Comparator and Reference, Logic Shutdown, Ref Sources and Sinks 2/4mA,
S8, N8 Packages
LT1121/ 150mA, Micropower, LDO V
IN
: 4.2V to 30/36V, V
OUT(MIN)
= 3.75V, V
DO
= 0.42V, I
Q
= 30µA, I
SD
= 16µA,
LT1121HV Reverse Battery Protection, SOT-223, S8, Z Packages
LT1129 700mA, Micropower, LDO V
IN
: 4.2V to 30V, V
OUT(MIN)
= 3.75V, V
DO
= 0.4V, I
Q
= 50µA, I
SD
= 16µA,
DD, S0T-223, S8,TO220-5, TSSOP20 Packages
LT1676 60V, 440mA (I
OUT
), 100kHz, High Efficiency V
IN
: 7.4V to 60V, V
OUT(MIN)
= 1.24V, I
Q
= 3.2mA, I
SD
= 2.5µA, S8 Package
Step-Down DC/DC Converter
LT1761 100mA, Low Noise Micropower, LDO V
IN
: 1.8V to 20V, V
OUT(MIN)
= 1.22V, V
DO
= 0.3V, I
Q
= 20µA, I
SD
= <1µA,
Low Noise < 20µV
RMS
, Stable with 1µF Ceramic Capacitors, ThinSOT Package
LT1762 150mA, Low Noise Micropower, LDO V
IN
: 1.8V to 20V, V
OUT(MIN)
= 1.22V, V
DO
= 0.3V, I
Q
= 25µA, I
SD
= <1µA,
Low Noise < 20µV
RMS
, MS8 Package
LT1763 500mA, Low Noise Micropower, LDO V
IN
: 1.8V to 20V, V
OUT(MIN)
= 1.22V, V
DO
= 0.3V, I
Q
= 30µA, I
SD
= <1µA,
Low Noise < 20µV
RMS
, S8 Package
LT1764/LT1764A 3A, Low Noise, Fast Transient Response, LDO V
IN
: 2.7V to 20V, V
OUT(MIN)
= 1.21V, V
DO
= 0.34V, I
Q
= 1mA, I
SD
= <1µA,
Low Noise < 40µV
RMS
, “A” Version Stable with Ceramic Capacitors,
DD, TO220-5 Packages
LT1766 60V, 1.2A (I
OUT
), 200kHz, High Efficiency V
IN
: 5.5V to 60V, V
OUT(MIN)
= 1.2V, I
Q
= 2.5mA, I
SD
= 25µA, TSSOP16/E Package
Step-Down DC/DC Converter
LT1776 40V, 550mA (I
OUT
), 200kHz, High Efficiency V
IN
: 7.4V to 40V, V
OUT(MIN)
= 1.24V, I
Q
= 3.2mA, I
SD
= 30µA, N8, S8 Packages
Step-Down DC/DC Converter
LT1934/ 300mA/60mA, (I
OUT
), Constant Off-Time, High 90% Efficiency, V
IN
: 3.2V to 34V, V
OUT(MIN)
= 1.25V, I
Q
= 14µA, I
SD
= <1µA,
LT1934-1 Efficiency Step-Down DC/DC Converter ThinSOT Package
LT1956 60V, 1.2A (I
OUT
), 500kHz, High Efficiency V
IN
: 5.5V to 60V, V
OUT(MIN)
= 1.2V, I
Q
= 2.5mA, I
SD
= 25µA, TSSOP16/E Package
Step-Down DC/DC Converter
LT1962 300mA, Low Noise Micropower, LDO V
IN
: 1.8V to 20V, V
OUT(MIN)
= 1.22V, V
DO
= 0.27V, I
Q
= 30µA, I
SD
= <1µA,
Low Noise < 20µV
RMS
, MS8 Package
LT1963/LT1963A 1.5A, Low Noise, Fast Transient Response, LDO V
IN
: 2.1V to 20V, V
OUT(MIN)
= 1.21V, V
DO
= 0.34V, I
Q
= 1mA, I
SD
= <1µA,
Low Noise < 40µV
RMS
, “A” Version Stable with Ceramic Capacitors,
DD, TO220-5, S0T-223, S8 Packages
LT1964 200mA, Low Noise Micropower, Negative LDO V
IN
: –1.9V to –20V, V
OUT(MIN)
= –1.21V, V
DO
= 0.34V, I
Q
= 30µA, I
SD
= 3µA,
Low Noise < 30µV
RMS
, Stable with Ceramic Capacitors, ThinSOT Package
LT3010 100mA, 3V to 80V, Low Noise Micropower LDO V
IN
: 3V to 8V, V
OUT(MIN)
= 1.275V, V
DO
= 0.3V, I
Q
= 30µA, I
SD
= 1µA,
Low Noise < 100µV
RMS
, MS8E Package
RELATED PARTS
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
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LT 0206 • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORATION 2006
