74LVC138A
3-to-8 line decoder/demultiplexer;
inverting
Product specification 1998 Apr 28
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
2
1998 Apr 28 853–1943 19308
FEATURES
•Wide supply voltage range of 1.2 to 3.6 V
•In accordance with JEDEC standard no. 8-1A
•Inputs accept voltages up to 5.5 V
•CMOS lower power consumption
•Direct interface with TTL levels
•Demultiplexing capability
•Multiple input enable for easy expansion
•Ideal for memory chip select decoding
•Active LOW mutually exclusive outputs
•Output drive capability 50 transmission lines at 85°C
DESCRIPTION
The 74LVC138A is a low-voltage, low-power , high-performance
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families.
The 74LVC138A accepts three binary weighted address inputs (A0,
A1, A2) and when enabled, provides 8 mutually exclusive active
LOW outputs (Y0 to Y7).
The 74LVC138A features three enable inputs: two active LOW (E1
and E2) and one active HIGH (E3). Every output will be HIGH unless
E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the
74LV138A to a 1-of-32 (5 lines to 32 lines) decoder with just four
74LV138A ICs and one inverter. The 74LV138A can be used as an
eight output demultiplexer by using one of the active LOW enable
inputs as the data input and the remaining enable inputs as strobes.
Unused enable inputs must be permanently tied to their appropriate
active HIGH or LOW state.
QUICK REFERENCE DATA
GND = 0 V ; Tamb = 25°C; tr = tf ≤2.5 ns
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
tPHL/tPLH Propagation delay
An to Yn,
E3 to Yn, En to Yn
CL = 50 pF;
VCC = 3.3 V 3.5
3.5 ns
CIInput capacitance 5.0 pF
CPD Power dissipation capacitance per
package VCC = 3.3 V
Notes 1 and 2 44 pF
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V ;
(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
16-Pin Plastic SO –40°C to +85°C74LVC138A D 74LVC138A D SOT109-1
16-Pin Plastic SSOP Type II –40°C to +85°C74LVC138A DB 74LVC138A DB SOT338-1
16-Pin Plastic TSSOP Type I –40°C to +85°C74LVC138A PW 74LVC138APW DH SOT403-1
PIN CONFIGURATION
SV00553
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
GND
Y7
Y0
A0
A1
A2
E1
E2
E3
VCC
Y0
Y0
Y0
Y0
Y0
Y0
LOGIC DIAGRAM
SV00554
Y0
A0
Y1
A1
Y2
A2
Y3
Y4
Y5
Y6
Y7
15
14
13
12
11
10
E1
E2
E39
7
4
1
5
2
6
3
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28 3
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
1, 2, 3 A0 to A2Address inputs
4, 5 E1, E2Enable inputs (active LOW)
6 E3Enable inputs (active HIGH)
15, 14, 13, 12,
11, 10, 9, 7 Y0 to Y7Outputs
8 GND Ground (0 V)
16 VCC Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
SV00555
1
2
3
4
5
67
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
(a) (b)
&
EN
X/YDX
0
2
1
2
3
4
5
67
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
&
1
2
4
FUNCTIONAL DIAGRAM
SV00556
1
2
3
4
5
6
7
9
10
11
12
13
14
15
A1
E1
A2
A3
E2
E3
3-to-8
DECODER ENABLE
EXITING
Y0
Y1
Y2
Y3
Y4
Y5
Y7
Y6
FUNCTION TABLE
INPUTS OUTPUTS
E1E2E3A0A1A2Y0Y1Y2Y3Y4Y5Y6Y7
H X X X X X H H H H H H H H
X H X X X X H H H H H H H H
X X L X X X H H H H H H H H
L L H L L L L H H H H H H H
L L H H L L H L H H H H H H
L L H L H L H H L H H H H H
L L H H H L H H H L H H H H
L L H L L H H H H H L H H H
L L H H L H H H H H H L H H
L L H L H H H H H H H H L H
L L H H H H H H H H H H H L
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28 4
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
CONDITIONS
MIN MAX
UNIT
VCC
DC supply voltage (for max. speed performance) 2.7 3.6
V
V
CC DC supply voltage (for low-voltage applications) 1.2 3.6
V
VIDC input voltage range 0 5.5 V
VI/O
DC output voltage range; output HIGH or LOW state 0 VCC
V
V
I/O DC input voltage range; output 3-State 0 5.5
V
Tamb Operating free-air temperature range –40 +85 °C
tr, tfInput rise and fall times VCC = 1.2 to 2.7V
VCC = 2.7 to 3.6V 0
020
10 ns/V
ABSOLUTE MAXIMUM RATINGS1
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage –0.5 to +6.5 V
IIK DC input diode current VIt0 –50 mA
VIDC input voltage Note 2 –0.5 to +6.5 V
IOK DC output diode current VO uVCC or VO t 0 "50 mA
VI/O
DC output voltage; output HIGH or LOW Note 2 –0.5 to VCC +0.5
V
V
I/O DC input voltage; output 3-State Note 2 –0.5 to 6.5
V
IODC output source or sink current VO = 0 to VCC "50 mA
IGND, ICC DC VCC or GND current "100 mA
Tstg Storage temperature range –65 to +150 °C
Power dissipation per package
PTOT – plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500
mW
– plastic shrink mini-pack (SSOP and TSSOP) above +60°C derate linearly with 5.5 mW/K 500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28 5
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP1MAX
V
HIGH level in
p
ut voltage
VCC = 1.2V VCC
V
V
IH
HIGH
le
v
el
inp
u
t
v
oltage
VCC = 2.7 to 3.6V 2.0
V
V
LOW level in
p
ut voltage
VCC = 1.2V GND
V
V
IL
LOW
le
v
el
inp
u
t
v
oltage
VCC = 2.7 to 3.6V 0.8
V
VCC = 2.7V ; V I = VIH or VIL; IO = –12mA VCC*0.5
VO
HIGH level out
p
ut voltage
VCC = 3.0V ; V I = VIH or VIL; IO = –100µA VCC*0.2 VCC
V
V
OH
HIGH
le
v
el
o
u
tp
u
t
v
oltage
VCC = 3.0V ; V I = VIH or VIL; IO = –12mA VCC*0.6
V
VCC = 3.0V ; V I = VIH or VIL; IO = –24mA VCC*1.0
VCC = 2.7V ; V I = VIH or VIL; IO = 12mA 0.40
VOL LOW level output voltage VCC = 3.0V ; V I = VIH or VIL; IO = 100µA GND 0.20 V
VCC = 3.0V ; V I = VIH or VIL; IO = 24mA 0.55
I
In
p
ut leakage current
VCC =36V
;
V = 5 5V or GND
"01
"5
µA
I
I
Inp
u
t
leakage
c
u
rrent
V
CC =
3
.
6V
;
V
I =
5
.
5V
or
GND
"0
.
1
"5
µ
A
ICC Quiescent supply current VCC = 3.6V ; V I = VCC or GND; IO = 0 0.1 10 µA
∆ICC Additional quiescent supply current per
input pin VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC CHARACTERISTICS
GND = 0 V ; tr = tf v 2.5 ns; CL = 50 pF; RL = 500; Tamb = –40C to +85CLIMITS
SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V UNIT
MIN TYP1MAX MIN MAX
tPHL/tPLH Propagation delay
An to YnFigure 1, 3 1.5 3.5 5.8 1.5 6.8 ns
tPHL/tPLH Propagation delay
E3 to YnFigure 1, 3 1.5 3.6 5.8 1.5 6.8 ns
tPHL/tPLH Propagation delay
En to YnFigure 2, 3 1.5 3.5 5.8 1.5 6.8 ns
NOTE:
1. These typical values are at VCC = 3.3V and Tamb = 25°C.
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28 6
AC WAVEFORMS
VM = 1.5 V at VCC 2.7 V
VM = 0.5 S VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
SV00557
VM
An, E3
INPUT
VCC
GND
VOL
VOH
Yn OUTPUT VM
tPLH
tPHL
Figure 1. Input (nA) to output (nY) propagation delays.
SV00558
VM
E1, E 2
INPUT
Yn OUTPUT VM
tPLH
tPHL
VCC
GND
VOL
VOH
Figure 2. 3-State enable and disable times.
TEST CIRCUIT
SWITCH POSITION
PULSE
GENERATOR
RT
VID.U.T.
VO
CL
VCC
500Ω
Open
GND
S1
VCC VI
< 2.7V VCC
TEST S1
tPLH/tPHL Open
2.7V2.7–3.6V
50pF 500Ω
2 * VCC
SV00903
Figure 3. Load circuitry for switching times.
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28 7
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28 8
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28 9
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
Philips Semiconductors Product specification
74LVC138A3-to-8 line decoder/demultiplexer; inverting
yyyy mmm dd 10
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may af fect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 07-98
Document order number: 9397-750-04493
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition [1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.