Vishay Siliconix
Si4532CDY
Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
N- and P-Channel 30 V (D-S) MOSFET
FEATURES
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• 100 % Rg Tested
• 100 % UIS Tested
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
• DC/DC Converter
• Load Switch
PRODUCT SUMMARY
VDS (V) RDS(on) ()I
D (A)aQg (Typ.)
N-Channel 30 0.047 at VGS = 10 V 6.0 2.75
0.065 at VGS = 4.5 V 5.2
P-Channel - 30 0.089 at VGS = - 10 V - 4.3 4.1
0.140 at VGS = - 4.5 V - 3.4
S1D1
G1D1
S2D2
G2D2
SO-8
5
6
7
8
Top View
2
3
4
1
Ordering Information: Si4532CDY-T1-GE3 (Lead (Pb)-free and Halogen-free)
N-Channel MOSFET
D
1
G
1
S
1
S2
G2
D2
P-Channel MOSFET
Notes:
a. Based on TC = 25 °C.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. Maximum under steady state conditions is 120 °C/W (N-Channel) and 110 °C/W (P-Channel).
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter Symbol N-Channel P-Channel Unit
Drain-Source Voltage VDS 30 - 30 V
Gate-Source Voltage VGS ± 20
Continuous Drain Current (TJ = 150 °C)
TC = 25 °C
ID
6.0 - 4.3
A
TC = 70 °C 4.9 - 3.4
TA = 25 °C 4.9b, c - 3.4b, c
TA = 70 °C 3.9b, c - 2.7b, c
Pulsed Drain Current (10 µs Pulse Width) IDM 24 - 15
Source-Drain Current Diode Current
TC = 25 °C IS
2.3 - 2.3
TA = 25 °C 1.5b, c - 1.5b, c
Pulsed Source-Drain Current ISM 24 - 12
Single Pulse Avalanche Current L = 0.1 mH IAS 78
Single Pulse Avalanche Energy EAS 2.5 3.2 mJ
Maximum Power Dissipation
TC = 25 °C
PD
2.78 2.78
W
TC = 70 °C 1.78 1.78
TA = 25 °C 1.78b, c 1.78b, c
TA = 70 °C 1.14b, c 1.14b, c
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to 150 °C
THERMAL RESISTANCE RATINGS
Parameter Symbol
N-Channel P-Channel
Unit
Typ. Max. Typ. Max.
Maximum Junction-to-Ambientb, d t 10 s RthJA 57 70 57 70 °C/W
Maximum Junction-to-Foot (Drain) Steady State RthJF 37 45 37 45
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Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
Vishay Siliconix
Si4532CDY
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
Parameter Symbol Test Conditions Min. Typ.aMax. Unit
Static
Drain-Source Breakdown Voltage VDS
VGS = 0 V, ID = 250 µA N-Ch 30 V
VGS = 0 V, ID = - 250 µA P-Ch - 30
VDS Temperature Coefficient VDS/TJ
ID = 250 µA N-Ch 33
mV/°C
ID = - 250 µA P-Ch - 33
VGS(th) Temperature Coefficient VGS(th)/TJ
ID = 250 µA N-Ch - 5.8
IID = - 250 µA P-Ch 4.5
Gate-Source Threshold Voltage VGS(th)
VDS = VGS, ID = 250 µA N-Ch 1.0 3.0 V
VDS = VGS, ID = - 250 µA P-Ch - 1.0 - 3.0
Gate-Body Leakage IGSS VDS = 0 V, VGS = ± 20 V N-Ch 100 nA
P-Ch - 100
Zero Gate Voltage Drain Current IDSS
VDS = 30 V, VGS = 0 V N-Ch 1
µA
VDS = - 30 V, VGS = 0 V P-Ch - 1
VDS = 30 V, VGS = 0 V, TJ = 55 °C N-Ch 5
VDS = - 30 V, VGS = 0 V, TJ = 55 °C P-Ch - 5
On-State Drain CurrentbID(on) VDS =5 V, VGS = 10 V N-Ch 20 A
VDS = -5 V, VGS = - 10 V P-Ch - 12
Drain-Source On-State ResistancebRDS(on)
VGS = 10 V, ID = 3.5 A N-Ch 0.038 0.047
VGS = - 10 V, ID = - 3.5 A P-Ch 0.073 0.089
VGS = 4.5 V, ID = 2.8 A N-Ch 0.052 0.065
VGS = - 4.5 V, ID = - 2.5 A P-Ch 0.113 0.140
Forward Transconductancebgfs
VDS = 15 V, ID = 2.5 A N-Ch 7 S
VDS = - 15 V, ID = - 3.5 A P-Ch 7
Dynamica
Input Capacitance Ciss N-Channel
VDS = 15 V, VGS = 0 V, f = 1 MHz
P-Channel
VDS = - 15 V, VGS = 0 V, f = 1 MHz
N-Ch 305
pF
P-Ch 340
Output Capacitance Coss
N-Ch 65
P-Ch 67
Reverse Transfer Capacitance Crss N-Ch 29
P-Ch 51
Total Gate Charge Qg
VDS = 15 V, VGS = 10 V, ID = 2.5 A N-Ch 6 9
nC
VDS = - 15 V, VGS = - 10 V, ID = - 2.5 A P-Ch 7.8 12
N-Channel
VDS = 15 V, VGS = 4.5 V ID = 2.5 A
P-Channel
VDS = - 15 V, VGS = - 4.5 V, ID = - 2.5 A
N-Ch 2.75 4.5
P-Ch 4.1 6.2
Gate-Source Charge Qgs
N-Ch 1.3
P-Ch 1.3
Gate-Drain Charge Qgd N-Ch 0.9
P-Ch 1.8
Gate Resistance Rgf = 1 MHz N-Ch 0.6 3.1 6.2
P-Ch 2.0 10 20
Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
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Vishay Siliconix
Si4532CDY
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width 300 µs, duty cycle 2 %.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
Parameter Symbol Test Conditions Min. Typ.aMax. Unit
Dynamica
Tu r n - On D elay T ime td(on) N-Channel
VDD = 15 V, RL = 15
ID 1 A, VGEN = 10 V, Rg = 1
P-Channel
VDD = - 15 V, RL = 15
ID - 1 A, VGEN = - 10 V, Rg = 1
N-Ch 7 11
ns
P-Ch 5.5 10
Rise Time tr
N-Ch 12 18
P-Ch 13 25
Turn-Off Delay Time td(off) N-Ch 14 25
P-Ch 17 30
Fall Time tf
N-Ch 6 10
P-Ch 7.7 15
Tu r n - On De l ay Ti m e td(on) N-Channel
VDD = 15 V, RL = 15
ID 1 A, VGEN = 4.5 V, Rg = 1
P-Channel
VDD = - 15 V, RL = 15
ID - 1 A, VGEN = - 4.5 V, Rg = 1
N-Ch 16 30
P-Ch 40 60
Rise Time tr
N-Ch 16 30
P-Ch 40 60
Turn-Off Delay Time td(off) N-Ch 9 18
P-Ch 20 40
Fall Time tf
N-Ch 9 18
P-Ch 17 30
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode
Current ISTC = 25 °C N-Ch 2.3
A
P-Ch - 2.3
Pulse Diode Forward CurrentaISM
N-Ch 24
P-Ch - 12
Body Diode Voltage VSD
IS = 1.25 A N-Ch 0.8 1.2 V
IS = - 0.75 A P-Ch - 0.8 - 1.2
Body Diode Reverse Recovery Time trr
N-Channel
IF = 1.25 A, dI/dt = 100 A/µs, TJ = 25 °C
P-Channel
IF = - 2.5 A, dI/dt = - 100 A/µs, TJ = 25 °C
N-Ch 14 21 ns
P-Ch 17 30
Body Diode Reverse Recovery Charge Qrr
N-Ch 6 10 nC
P-Ch 11 20
Reverse Recovery Fall Time ta
N-Ch 9
ns
P-Ch 12
Reverse Recovery Rise Time tb
N-Ch 5
P-Ch 5
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Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
Vishay Siliconix
Si4532CDY
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
N-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Output Characteristics
On-Resistance vs. Drain Current and Gate Voltage
Gate Charge
0
6
12
18
24
0246810
VGS =10Vthru6V
VGS =4V
VGS =5V
VDS - Drain-to-Source Voltage (V)
- Drain Current (A)I D
- On-Resistance ()RDS(on)
0.00
0.02
0.04
0.06
0.08
0.10
0 2 4 6 8 10 12 14 16
ID - Drain Current (A)
VGS = 4.5
V
VGS = 10 V
0
2
4
6
8
10
0246
ID=2.5A
VDS =22.5V
VDS =7.5V
VDS =15V
- Gate-to-Source Voltage (V)
Qg- Total Gate Charge (nC)
VGS
Transfer Characteristics
Capacitance
On-Resistance vs. Junction Temperature
0.0
0.2
0.4
0.6
0.8
1.0
1.2
012345
TC= 25 °C
TC= 125 °C
TC= - 55 °C
VGS - Gate-to-Source Voltage (V)
- Drain Current (A)I D
0
50
100
150
200
250
300
350
400
0 5 10 15 20 25 30
VDS
- Drain-to-Source Voltage (V)
Crss
Coss
Ciss
C - Capacitance (pF)
0.7
0.9
1.1
1.3
1.5
1.7
- 50 - 25 0 25 50 75 100 125 150
ID=6A
VGS =4.5V
VGS =10V
TJ-Junction Temperature (°C)
(Normalized)
- On-ResistanceRDS(on)
Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
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Vishay Siliconix
Si4532CDY
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
N-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Source-Drain Diode Forward Voltage
Threshold Voltage
0.0 0.2 0.4 0.6 0.8 1.0 1.2
TJ = 150 °C TJ = 25 °C
10
0.1
VSD - Source-to-Drain Voltage (V)
- Source Current (A)I
S
1
- 0.8
- 0.6
- 0.4
- 0.2
0.0
0.2
0.4
- 50 - 25 0 25 50 75 100 125 150
I
D
= 250 µA
Variance (V)V
GS(th)
T
J
- Temperature (°C)
On-Resistance vs. Gate-to-Source Voltage
Single Pulse Power, Junction-to-Ambient
0.00
0.05
0.10
0.15
0.20
0.25
012345678910
TJ=25 °C
TJ= 125 °C
- On-Resistance (Ω)
RDS(on)
VGS - Gate-to-Source Voltage (V)
0
10
20
30
40
50
011100.00.01
Time (s)
Power (W)
0.1
Safe Operating Area, Junction-to-Ambient
100
1
0.1 1 10 100
0.01
10
0.1
TA= 25 °C
Single Pulse
100 µs
Limited byR
DS(on)*
BVDSS Limited
1ms
10 ms
100 ms
1s
10 s
10 µs
VDS - Drain-to-Source Voltage (V)
*VGS > minimumVGS at which RDS(on) is specified
- Drain Current (A)
ID
100 s, DC
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Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
Vishay Siliconix
Si4532CDY
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
N-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Current Derating*
0
2
4
6
8
0 25 50 75 100 125 150
Package Limited
TC- Case Temperature (°C)
ID- Drain Current (A)
Power Derating, Junction-to-Foot
0.0
0.7
1.4
2.1
2.8
3.5
0 25 50 75 100 125 150
TC- Case Temperature (°C)
Power (W)
Power Derating, Junction-to-Ambient
0.0
0.3
0.6
0.9
1.2
1.5
0 25 50 75 100 125 150
TA-Ambient Temperature (°C)
Power (W)
Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
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Vishay Siliconix
Si4532CDY
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
N-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Normalized Thermal Transient Impedance, Junction-to-Ambient
Normalized Thermal Transient Impedance, Junction-to-Foot
10-3 10-2 01110-1
10-4
0.2
0.1
Duty Cycle = 0.5
Square WavePulse Duration (s)
Normalized Effective Transient
Thermal Impedance
1
0.1
0.01
0.05
0.02
Single Pulse
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Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
Vishay Siliconix
Si4532CDY
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
P-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Output Characteristics
On-Resistance vs. Drain Current and Gate Voltage
Gate Charge
VDS - Drain-to-Source Voltage (V)
- Drain Current (A)I D
VGS =5V
0
3
6
9
12
15
0.0 0.5 1.0 1.5 2.0
VGS =10Vthru6V
VGS =4V
VGS =3V
- On-Resistance (Ω)RDS(on)
ID- Drain Current (A)
0.00
0.05
0.10
0.15
0.20
0 3 6 9 12 15
VGS =10V
VGS =4.5V
ID=2.5A
0
2
4
6
8
10
02468
- Gate-to-Source Voltage (V)
Qg- Total Gate Charge (nC)
VGS
VDS =22.5V
VDS =7.5V
VDS =15V
Transfer Characteristics
Capacitance
On-Resistance vs. Junction Temperature
0.0
0.5
1.0
1.5
2.0
1.0 1.5 2.0 2.5 3.0 3.5 4.0
VGS - Gate-to-Source Voltage (V)
- Drain Current (A)I D
TC= 25 °C
TC= 125 °C
TC= - 55 °C
0
150
300
450
600
0 6 12 1824 30
Ciss
VDS - Drain-to-Source Voltage (V)
C - Capacitance (pF)
Coss
Crss
0.6
0.8
1.0
1.2
1.4
1.6
1.8
- 50 - 25 0 25 50 75 100 125 150
TJ-Junction Temperature (°C)
(Normalized)
- On-Resistance
RDS(on)
VGS =10V
VGS =4.5V
ID=3.2A
Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
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Vishay Siliconix
Si4532CDY
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
P-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Source-Drain Diode Forward Voltage
Threshold Voltage
0.0 0.3 0.6 0.9 1.2 1.5
10
VSD -Source-to-Drain Voltage (V)
- Source Current (A)I S
0.1
1
0.01
TJ= 150 °C
0.001
TJ= - 50 °C
TJ= 25 °C
-0.4
-0.2
0.0
0.2
0.4
0.6
- 50 - 25 0 25 50 75 100 125 150
ID= 250 µA
Variance (V)VGS(th)
TJ- Temperature (°C)
ID=1mA
On-Resistance vs. Gate-to-Source Voltage
Single Pulse Power, Junction-to-Ambient
0.0
0.1
0.2
0.3
0.4
0246810
- On-Resistance (Ω)RDS(on)
VGS - Gate-to-Source Voltage (V)
TJ= 25 °C
TJ= 125 °C
ID= 3.5 A
0
10
20
30
40
50
011100.0 0.01
Time (s)
Power (W)
0.1
Safe Operating Area, Junction-to-Ambient
100
1
0.1 1 10 100
0.01
10
0.1
TA= 25 °C
Single Pulse
100 µs
Limited byR
DS(on)*
BVDSS Limited
1ms
10 ms
100 ms
100 s, DC
10 µs
VDS - Drain-to-Source Voltage (V)
*VGS > minimumVGS at which RDS(on) is specified
- Drain Current (A)
ID
1s
10 s
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Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
Vishay Siliconix
Si4532CDY
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
P-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Current Derating*
0
1
2
3
4
5
0 255075100125150
TC- Case Temperature (°C)
ID- Drain Current (A)
Power Derating, Junction-to-Foot
0.0
0.7
1.4
2.1
2.8
3.5
0 25 50 75 100 125 150
TC- Case Temperature (°C)
Power (W)
Power Derating, Junction-to-Ambient
0.0
0.3
0.6
0.9
1.2
1.5
0 25 50 75 100 125 150
TA-Ambient Temperature (°C)
Power (W)
Document Number: 64805
S11-0652-Rev. B, 11-Apr-11
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Vishay Siliconix
Si4532CDY
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
P-CHANNEL TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?64805.
Normalized Thermal Transient Impedance, Junction-to-Ambient
10-3 10-2 110 100010-1
10-4 100
0.2
0.1
Square WavePulse Duration (s)
Normalized Effective Transient
Thermal Impedance
1
0.1
0.01
t1
t2
Notes:
PDM
1. Duty Cycle, D =
2. Per Unit Base = RthJA = 110 °C/W
3. TJM -T
A=P
DMZthJA(t)
t1
t2
4. Surface Mounted
Duty Cycle = 0.5
Single Pulse
0.02
0.05
Normalized Thermal Transient Impedance, Junction-to-Foot
10-3 10-2 01110-1
10-4
0.2
0.1
Duty Cycle = 0.5
Square WavePulse Duration (s)
Normalized Effective Transient
Thermal Impedance
1
0.1
0.01
0.05
0.02
Single Pulse
Vishay Siliconix
Package Information
Document Number: 71192
11-Sep-06
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1
DIM
MILLIMETERS INCHES
Min Max Min Max
A 1.35 1.75 0.053 0.069
A10.10 0.20 0.004 0.008
B 0.35 0.51 0.014 0.020
C 0.19 0.25 0.0075 0.010
D 4.80 5.00 0.189 0.196
E 3.80 4.00 0.150 0.157
e 1.27 BSC 0.050 BSC
H 5.80 6.20 0.228 0.244
h 0.25 0.50 0.010 0.020
L 0.50 0.93 0.020 0.037
q0°8°0°8°
S 0.44 0.64 0.018 0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
4
3
12
5
6
87
HE
h x 45
C
All Leads
q0.101 mm
0.004"
L
BA
1
A
e
D
0.25 mm (Gage Plane)
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
S
VISHAY SILICONIX
TrenchFET® Power MOSFETs Application Note 808
Mounting LITTLE FOOT®, SO-8 Power MOSFETs
APPLICATION NOTE
Document Number: 70740 www.vishay.com
Revision: 18-Jun-07 1
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use
integrated circuit and small-signal packages which have
been been modified to provide the heat transfer capabilities
required by power devices. Leadframe materials and
design, molding compounds, and die attach materials have
been changed, while the footprint of the packages remains
the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/ppg?72286), for the
basis of the pad design for a LITTLE FOOT SO-8 power
MOSFET. In converting this recommended minimum pad
to the pad set for a power MOSFET, designers must make
two connections: an electrical connection and a thermal
connection, to draw heat away from the package.
In the case of the SO-8 package, the thermal connections
are very simple. Pins 5, 6, 7, and 8 are the drain of the
MOSFET for a s ingle MOSFET package and are connected
together. In a dual package, pins 5 and 6 are one drain, and
pins 7 and 8 are the other drain. For a small-signal device or
integrated circuit, typical connections would be made with
traces that are 0.020 inches wide. Since the drain pins serve
the additional function of providin g the thermal connect ion
to the package, this level of connection is inadequate. The
total cross section of the copper may be adequate to carry
the current required for the application, but it presents a
large thermal impedance. Also, heat spreads in a circular
fashion from the heat source. In this case the drain pins are
the heat sources when looking at heat spread on the PC
board.
Figure 1. Single M O SFET SO-8 Pad
Pattern With Copper Spreading
Figure 2. Dual MOSFET SO-8 Pad Pattern
With Copper Spreading
The minimum recommended pad patterns for the
single-MOSFET SO-8 with copper spreading (Figure 1) and
dual-MOSFET SO-8 with copper spreading (Figure 2) show
the starting point for utilizing the board area available for the
heat-spreading copper. To create this pattern, a plane of
copper overlies the drain pins. The copper plane connects
the drain pins electrically, but more importantly provides
planar copper to draw heat from the drain leads and start the
process of spreading the heat so it can be dissipated into the
ambient air. These patterns use all the available area
underneath the body for this purpose.
Since surface-mounted packages are small, and reflow
soldering is the most common way in which these are
affixed to the PC board, “thermal” connections from the
planar copper to the pads have not been used. Even if
additional planar copper area is used, there should be no
problems in the soldering process. The actual solder
connections are defined by the solder mask openings. By
combining the basic footpri nt with the copper plane on the
drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces.
The absolute minimum power trace width must be
determined by the amount of current it has to carry. For
thermal reasons, this minimum width should be at least
0.020 inches. The use of wide traces connected to the drain
plane provides a low impedance path for heat to move away
from the device.
0.027
0.69
0.078
1.98
0.2
5.07
0.196
5.0
0.288
7.3
0.050
1.27
0.027
0.69
0.078
1.98
0.2
5.07
0.088
2.25
0.288
7.3
0.050
1.27
0.088
2.25
Application Note 826
Vishay Siliconix
www.vishay.com Document Number: 72606
22 Revision: 21-Jan-08
APPLICATION NOTE
RECOMMENDED MINIMUM PADS FOR SO-8
0.246
(6.248)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.172
(4.369)
0.152
(3.861)
0.047
(1.194)
0.028
(0.711)
0.050
(1.270)
0.022
(0.559)
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Revision: 12-Mar-12 1Document Number: 91000
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