1M110ZS10 - Motorola / Freescale Semiconductor

lll141728thru1N4764

I(I M3.3ZSI0 thru IMIOOZSIO)

ILMI1lOZS1Othru

1R!2OOZS1O

-——-————.

*P0,R:43 ---.-A q; ~: :r~~i,;

.~~ ~~; q,p{~ ~j,,U,

4CU ti~:i- .~>~~r~:> m@)p--- “b?4 . . .. . . ,&=9~u:J. L..-.& .=. L!.,J LWti, &

. . . acomplete series of 1.0 Watt Zener Diodes with limits and

operating characteristics that ref Iect the superior capabi Iities of

silicon -oxide-passivated junctions. All this in an axial-lead, transfer-

molded plastic package offering protection in all common environ-

mental conditions.

~To 80 Watts Surge Ratingl @1.0 ms

~Maximum Limits Guaranted on Six Electrical Parameters

L> Package No Larger Than the Conventional 400 mW Package

Designer’s Data ‘for “Worst Case” Conditions

The DesignersA Data sheets permit the design of most circuits entirely from the in- ~

formation presented. Limit cuwes –representing boundaries on device characters:,,, ~{

tics –are given to facilitate “worst case” design. ,...

,)?$;:..,*$.

.,..,\

<,..’ J*.

Lead Length =3/8” –1,*T

Derate above 75°C ~’l,:k ~mW/°C !

———— —-— ———. ——:- —-—

:*Operating and Storage Junction ~__~A ;

TJ, TS9 .$’“-*%0 +200 \‘c -,

k=i}Ai~i-i: All external surfaces are c~rrosi~$,,r@istant and leads are readily solrJerable

and weldable .$ytl~l’+~:t’\, .,,,

.k,

——

TL, LEAD TEMPERATURE (°C)

1.10

{

e DIA

MIN

POURITYMARK

(CAIHOOE)

71,10

MIN

CASE 59

(DO-41)

—-——

*Indicates JE DEC Registered Oata

‘Trademark of Motorola Inc.

QMOTOROLA INC., 19

JEDEC

Type No.

(Note 1)

1N4728

1N4729

1N4730

1N4731

1N4732

1N4733

1N4734

1N4735

1N4736

1N4737

IN4738

IN4739

1N4740

1N4741

1N4742

IN4743

1N4744

1N4745

1N4746

1N4747

1N4748

1N4749

1N4750

IN4751

1N4752

1N4753

1N4754

IN4755

IN4756

1N4757

1N4758

1N4759

1N4760

1N4761

1N4762

1N4763

1N4764

—

Motorola

Type No.

(Note 2)

IM3.3ZSI0

IM3.6ZSI0

1M3.9ZS1O

IM4.3ZSI0

IM4.7ZSI0

IM5.1ZS1O

IM5.6ZS1O

IM6.2ZS1O

1M6.8ZS1O

IM7.5ZS1O

IM8.2ZS1O

1M9. IZS1O

IMIOZS1O

1MIIZS1O

IM12zS1O

1M13ZSI0

1M15ZS1O

IM16ZSI0

1MI8ZS1O

IM20ZSI0

1M22ZS1O

1M24ZSI0

IM27ZS1O

IM3OZS1O

1M33ZS1O

IM36zSI0

IM39ZSI0

1M43ZS1O

IM47ZS1O

1M51ZSI0

1M56ZSI0

IM62ZSI0

1M68ZSI0

1M75ZSI0

1M82ZSI0

1M9IZS1O

1MIOOZS1O

1MI1OZS1O

IM120ZSI0

IMI3OZS1O

IMI5OZS1O

IM160ZSI0

IM180ZSI’O

lM200ZS~0

*Nominal ~t

*Max Zener Impedance *Leakage

Zener Voltage *Test 1

vz@lzT Current (Note 4) Current

volts iZT ZZT @IZT IzzK@ IZK IZK

(Note 2& 3)

: i R1% ;~ ‘“i@i

5.1 ‘49 ~7.0 ~550 1.0 10 1.0

5.6 45 5.0 600 1.0 10

6.2 2.0

41 ::: ~;::

I11.0 10

6.8 3.0

37 1.0 10

7.5 4.0

34 4.0 700 0.5 1 10 5.0

I10.5

!9.5

I8.5

7.5

.,,

“~*% ,Jy

The JEDEC type numbers li~&~;~- astandard tolerance on

the nominal zener voltage of +?@%. ?A standard tolerance of +57.

4~,.,$..

on individual units is also,f,#ai[abh and is indicated by suffixing

“A” to the standard typeE,~,@b,~.

$$\..~,:>...>>.,

*-.< ~.

..~:::.:\

NOTE 2—sPEci,*A~s@~.w&dLA.BLE IPQCLUDE:

(A) NOMIN~L\~@R VOLTAGES BETWEEN THE VOLT-

AGE$.6~~ti AND TIGHTER VOLTAGE TO LER-

AN~S: $fio designate units with zener voltages other

$~w ~~~ assigned JEDEC numbers and/or tight voltage

t~~-es (~5Y0, *3%, ~2%, +1%), the Motorola type

~<~~’p should be used.

,.,.y

-i,..

.*. 90

D~s~on d~ ~ ~

~-!Tole~nce

Motorola Nominal ~Surrnetic

Voltage

Zener

Diode

Example: IM90ZS3

(B)

*Surge [

Current I

@TA =25°C

Ir —mA

(Note 5) I

1380

1260

1190

1070

454

414

380 ;

344

304

285

250

225

205

190

170

150

135

125

115

110

45 (

—

—I

—

—I

—

*Indicates JE DEC Registered Data

MATCHED SETS: (Standard Tolerances are t5.0%, +3.0%,

*2.0%, *1 .0%).

Zener diodes can be obtained in sets consisting of two

or more matched devices. The method for specifying such

matched sats is similar to the one dascribed in (A), except

that two extra suffixes are added to the code number

described.

These units are marked with code letters to identifv the

matched sets and, in addition, each unit in aset is marked

with the same serial number, which is different for each set

being ordered.

Dev;ce 1I~\!~Ov:rall

Motorola 51 volts ]Surrnetic

Description (each device) ~~1 Tolerance

of set

*Code: Zener J

~ ~ (*I%)

B–Two devices in series Diodes !;

C–Three devices in series ~Code*

Tolerance —!

D–Four devices in series (A-Not used)

per devica (+5%)

(omit for +20% units)

Exam~le: 1M51 ZS5B1

.3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 11 12

VZ, ZENER VOLTAGE @IZT (VOLTS)

—

100

5.0

2.0

1.0

0.5

n7 I

... , , , ,, , I , , I , 1 1 1

0.1 :!~w-

0.05 I1I

I(Irl~a

0.02 I I I IIll I I I I I I(

0.01 I I IIIll I1I I I I I1lt&BH

3.0 5.0 7.0 10 20 50 100 200 300

NOMINAL VZ (VOLTS)

VOLTAGE @IZT (VOLTS)

/NOTE: Below 0,1 Second, Thermal !II

0.5 Response Cume is Applicable II)I1 1

to any Leed Length (L). 1!

0.3 II I 11111 I I 4.

0,0001 0.0002 0.0005 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 .~$$$”$” 1.0 2.0 5.0 10

.,,

t, TIME (SECONDS)

VZ, ZENER VOLTAGE (VOLTS)

Fa’J\!E ?s FACTOP*

❑OX 20912 .

4876 PRINTED IN USA +71 IMPERIAL LITHO B22160

PHOENIX, ARIZONA 85036 e ASUBSIDIARY (3F MOTOROLA INC.

13M ,s 7039

Special clipper diodes with opposing Zener junctions built

into the device are available by using the following nomen-

clature:

Device INominal

Description ~“oltage 1

Motorola

Example: IM20ZZSI0

Zener

Diode

zs10

~SurLtic

Clipper

Tolerance for each of

the two Zener voltages

(not amatching require- J

Motorola guarantees the zener voltage when measured at 90

seconds while maintaining the lead temperature (TL) at 30°C +l°C,

3/8” from the diode body.

The zener impedance is derived from the60cycle acvo~$age,,:$

which results when anac current having anrmsvalue equal$~LIOYO

of the dc zener current (1ZT or IZK) is superimposed on lz~;~r ‘F*K.

*l\:t\.i.$l}y,

.<.,,>,:’,*,,.,,

,,,!;, ‘1,.;,$

NoTE5–su R’G=cuRRENT{ir)NON-REPET:W$%F4$?:::

?li\t,,+~ii-’

The rating listed in the electrical characteQ&t~+~~*~e is maxi-

mum peak, non-repetitive, reverwsurge curr~F~,~$~2 square wave

or equivalent sine wave pulse of l/12QfgePQ~~&duration super-

imposed on the test current, IZT, per J~@~~&.~lstration, however,

actual device capability isasdescribed~p F$$ures4 and 5.

,*.Xy*,,,..~~})~:?

,,.!,: ‘S:i

‘.\;,,,

t#$$&<$,;$.>,

Since the actual voltage available from agiven :W,$.$!,O@e is

temperature dependent, it is nacessary to detarmin~~u@$!~ tem-

perature under any set of operating conditions in @.d’@~@*~alculate

.~~“1:>

its value. The following procedure is recomm~~,d,:~+,

t~.:..?,,~.,.\.\:*,

,,>l.~,.,.,.- ,:{

6LA is the lead-to-ambi~~j~~ermal resistance (“clw) and

PD is the power di::~~%~~?’’’The value for oLA will vary

and depends on th$,&,~y;c&+hou nting method. eLA is 9an-

erally 30-400C/W~?@$~~ ~k various clips and tie points in

common usa an~.f~w,.p>~tad circuit board wirin9.

..!.,%,,.s.\.:a.t,,

‘\~’.+.\‘.~~

‘!.,.,

The tempera@~&of the lead can also be measured usin9 athermo-

couple placed~~~~%~$ead as close as possible to the tie point. The

1! thermal ~~’’~~%ticted to the tia point is normally iarge enough

so that+~t>yt~$:fl~~t significantly respond to heat surges generated in

the diob,q;as arasult of pulsed operation once steady-state condi-

tio~$ are “&hi evad. Using the maasured value of TL, the junction

temperature and may be found from Figure 2for atrain of

power pulses (L =3/8 inch) or from Figure 3for dc power.

ATJL =eJL PD

For worst-case design, using expected limits of Iz, limits of PD

and the extremas of TJ(ATJ) may be astimatad. Changes in voltage,

VZ, can then ba found from:

AV =OVZATJ

evz, the zener voltage temperature coefficient, is found from

Figures 6 and 7.

Under high power-pulse operation, the zener voltage will vary

with time and may also be affected significantly by tha zaner resist-

ance. For best regulation, keep current excursions as low as possible.

Data of Figure 2should not ba used to compute surga capability.

Surge limitations are given in Figure 4. They are lower than would

be expected by considering only junction temperature, as currant

crowding effects cause temperatures to be extremely high in small

spots resulting in device degradation should the limits of Figure 4

be exceeded.