VRE405CD - Apex Microtechnology - Datasheet.Directory

VRE405

VRE405DS 1

Product Innovation From

VRE405

DESCRIPTION

The VRE405 is a low cost, high precision, ±5 V refer-

ence. Available in 14-pin DIP or SMT packages, the

device is ideal for new designs that need a high perfor-

mance reference.

The device provides ultrastable ±5 V output with ±0.8

mV initial accuracy and a temperature coefcient of

1.0 ppm/°C. This improvement in accuracy is made

possible by a unique, patented multipoint laser com-

pensation technique.

Another key feature of this reference is the 0.3 mV

tracking error between the positive and negative out-

put voltages over the operating temperature range.

This is extremely important in high performance sys-

tems for reducing overall system errors.

For designs which use the DIP package in a socket,

there is a reference ground pin to eliminate the refer-

ence ground errors.

FEATURES

♦ ±5 V Output, ± 0.8 mV

♦ Temperature Drift: 1.0 ppm/ºC

♦ Low Noise: 3 μVP-P (0.1-10hz)

♦ Tracking Error: 0.3 mV

♦ Excellent Line Regulation: 6 ppm/V Typical

♦ Surface Mount and DIP Package Options

APPLICATIONS

The VRE405 is recommended for use as a refer-

ence for high precision D/A and A/D converters

which require an external precision reference.

The device is ideal for calibrating scale factor on

high resolution A/D converters. The VRE405 of-

fers superior performance over monolithic refer-

ences.

Precision Dual Voltage Reference

VRE405

Product Innovation From

Figure 1. BLOCK DIAGRAM

Model

Initial

Error

(mV)

Temp.

Coeff.

(ppm/ºC)

Temp.

Range

(ºC)

Package

Options

VRE405AS

VRE405AD

VRE405BS

VRE405BD

VRE405CS

VRE405CD

±0.8

±1.0

±1.1

1.0

2.0

2.2

0ºC to +70ºC

SMT14 (GE)

DIP14 (KE)

SMT14 (GE)

DIP14 (KE)

SMT14 (GE)

DIP14 (KE)

SELECTION GUIDE

14-pin Surface Mount

Package Style GE

14-pin DIP

Package Style KE

www.cirrus.com

MAY 2010

APEX − VRE405DSREVC

VRE405

2 VRE405DS

Product Innovation From

1. CHARACTERISTICS AND SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

VPS =±15V, T = +25ºC, RL = 10KΩ Unless Otherwise Noted.

Model VRE405A VRE405B VRE405C

Parameter Min Typ Max Min Typ Max Min Typ Max Units

ABSOLUTE RATINGS

Power Supply ±13.5 ±15 ±22 * * * * * * V

Operating Temperature 0 +70 * * * * ºC

Storage Temperature -65 +150 * * * * ºC

Short Circuit Protection Continuous * *

OUTPUT VOLTAGE

VRE405 ±5.0 * * V

OUTPUT VOLTAGE ERRORS

Initial Error (Note 1) ±0.80 ±1.00 ±1.10 mV

Warmup Drift 1 2 3 ppm

TMIN - TMAX (Note2) 1.0 2.0 2.2 ppm/ºC

Tracking Error 0.3 0.4 0.5 mV

Long-Term Stability 6 * * ppm/1000hrs.

Noise (0.1 - 10Hz) (Note 3) 3 * * µVpp

OUTPUT CURRENT

Range ±10 * mA

REGULATION

Line 3 * * ppm/V

Load 3 * * ppm/mA

OUTPUT ADJUSTMENT

Range 20 * * mV

POWER SUPPLY CURRENT (Note 4)

+PS 7 * * mA

-PS 4 * * mA

NOTES:

* Same as A Models.

1. The specied values are without external trim.

2. The temperature coefcient (TC) is determined by the box method using the following formula:

4. The tracking error is the deviation between the positive and negative output over the operating

temp. range.

5. The specied values are unloaded.

VNOMINAL x (TMAX – TMIN)

VMAX – VMIN

T.C. = x 106

VRE405

VRE405DS 3

Product Innovation From

2. TYPICAL PERFORMANCE CURVES

QUIESCENT CURRENT VS. TEMP

Temperature oC

JUNCTION TEMP. RISE VS. OUTPUT CURRENT

Output Current (mA)

PSRR VS. FREQUENCY

Frequency (Hz)

QUIESCENT CURRENT VS. TEMP

Temperature oC

JUNCTION TEMP. RISE VS. OUTPUT CURRENT

Output Current (mA)

PSRR VS. FREQUENCY

Frequency (Hz)

POSITIVE OUTPUT (TYP)

NEGATIVE OUTPUT (TYP)

Upper Limit

Lower Limit

Temperature, °C

VRE405C

10 7060504030200

∆VOUT (mV)

-0.75

0.75

0.5

0.25

-0.25

-0.5

-1

VOUT vs. TEMPERATURE

Upper Limit

Lower Limit

Temperature, °C

VRE405B

10 7060504030200

∆VOUT (mV)

-0.75

0.75

0.5

0.25

-0.25

-0.5

-1

VOUT vs. TEMPERATURE

Upper Limit

Lower Limit

Temperature, °C

VRE405A

10 7060504030200

∆VOUT (mV)

-0.75

0.75

0.5

0.25

-0.25

-0.5

-1

VOUT vs. TEMPERATURE

VRE405

4 VRE405DS

Product Innovation From

3. THEORY OF OPERATION

The following discussion refers to the block diagram in Figure 1. A FET current source is used to bias a 6.3 V zener

diode. The zener voltage is divided by the resistor network R1 and R2. This voltage is then applied to the noninvert-

ing input of the operational amplier which amplies the voltage to produce a 5 V output. The gain is determined by

the resistor networks R3 and R4: G=1 + R4/R3. The 6.3 V zener diode is used because it is the most stable diode

over time and temperature.

The current source provides a closely regulated zener current, which determines the slope of the references’ volt-

age vs. temperature function. By trimming the zener current a lower drift over temperature can be achieved. But

since the voltage vs. temperature function is nonlinear this compensation technique is not well suited for wide tem-

perature ranges.

A nonlinear compensation network of thermistors and resistors that is used in the VRE series voltage references.

This proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By adjusting the

slope, a very stable voltage is produced over wide temperature ranges.

This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability.

The VRE405 reference has it’s ground terminal brought out on two pins

(pin 6 and 7) which are connected internally. This allows the user to

achieve greater accuracy when using a socket. Voltage references have

a voltage drop across their power supply ground pin due to quiescent cur-

rent owing through the contact resistance. If the contact resistance was

constant with time and temperature, this voltage drop could be trimmed

out. When the reference is plugged into a socket, this source of error can

be as high as 20 ppm. By connecting pin 7 to the power supply ground

and pin 6 to a high impedance ground point in the measurement circuit,

the error due to the contact resistance can be eliminated. If the unit is

soldered into place, the contact resistance is sufciently small that it does

not effect performance.

VRE405

TOP

VIEW

N/C

+VIN

GND

REF. GND

+VOUT

-VOUT

N/C

-VIN

N/C

PIN CONFIGURATION

CONTACTING CIRRUS LOGIC SUPPORT

For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America.

For inquiries via email, please contact apex.support@cirrus.com.

International customers can also request support by contacting their local Cirrus Logic Sales Representative.

To nd the one nearest to you, go to www.cirrus.com

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