PIC16HV540T-20/SOQTP - Microchip Technology

 1999 Microchip Technology Inc. DS30467A-page 1

PIC16HV54X

This document includes the programming

specifications for the following devices:

INTRODUCTION

Overview

The PIC16HV54X Series is a family of field-program-

mable, single-chip CMOS microcontrollers with on-chip

EPROM for program storage.

Due to the special architecture of these microcontrol-

lers (12-bit wide instruction word) and the low pin

counts (starting at 18 pins), the EPROM programming

methodology is different from that of standard (byte-

wide) EPROMs (e.g., 27C256).

The PIC16HV54X Series can be programmed by

applyi ng the 12 -bit wid e data w ord to the 12 a v aila b le I/

O pins while the address is generated by the on-chip

Program Counter. The MCLR/VPP pin provides the pro-

gramming supply voltage (VPP). Programming/verify

chip enable is controlled by the T0CKI pin while the

OSC1 pin controls the Pr ogram Counter.

This document describes all the programming details of

the PIC16HV54X Series and the requirements for pro-

gramming equipment to be used from programming

prototypes in the engineering lab up to high volume

programming on the facto ry floor.

Pin Diagr a ms

PIN DESCRIPTIONS (DURING PROGRAMMING): PIC16HV540

•PIC16HV540 PDIP, SOIC, Windowed CERDIP

• 1

RA2

RA3

T0CKI

MCLR/VPP

VSS

RB0

RB1

RB2

RB3

RA1

RA0

OSC1/CLKIN

OSC2/CLKOUT

VDD

RB7

RB6

RB5

RB4

PIC16HV540

RA1

RA0

OSC1/CLKIN

OSC2/CLKOUT

VDD

RB7

RB6

RB5

RB4

RA2

RA3

T0CKI

MCLR/VPP

VSS

RB0

RB1

RB2

RB3

•1

SSOP

PIC16HV540

Pin Name

During Programming

Pin Name Pin Type Pin Description

T0CKI PROG/VER I Program pulse input/verify pulse input

RA0 - RA3 D0 - D3 I/O Data input/output

RB0 - RB7 D4 - D11 I/O Data input/output

OSC1 INCPC I Increment Program Counter input

MCLR/VPP VPP P Programming Power

VDD VDD P Power Supply

VSS VSS P Ground

Legend: I = Input, O = Output, P = P owe r

EPROM/ROM Memory Programming/Verify Specification

PIC16HV54X

DS30467A-page 2  1999 Microchip Technology Inc.

1.0 PROGRAM/VERIFY MODES

The PIC16HV54X Series uses the internal Program

Counter (PC) to generate the EPROM address. VPP is

supplied through the MCLR pin.

The T0CKI pin acts as chip enable, alternating between

programming and verifying.

The OSC1 pin is used for incrementing the PC.

Data is applied to, or can be read on PORTA and

PORTB (MSB on RB7, LSB on RA0).

The prog r ammin g/v erify mo de is ent ered b y ra ising the

lev el on the MCLR pin from VIL to VHH (= VPP) while the

T0CKI pin is held at VIH and the OSC1 pin is held a t VIL.

The Program Counter now has the value “0x7FF”,

because MCLR was at VIL before. This condition

selects the configuration word as the v ery first EPROM

locatio n to be accessed after en tering the progr am/v er-

ify mode.

Since the MC L R pin w a s in iti all y at VIL, the device is in

the reset state (the I/O pins are in the reset state).

Incrementing the PC once (by pulsing the OSC1 pin)

selects location “0x000” of the user program memor y.

Afterwards all other memory locations from 001h

through end of memory can be addressed by incre-

menting the PC.

If the Prog ram C ounter has rea ched the l ast address of

the use r memory area (“0x 1FF” for the PIC16HV5404),

and is incremented again, the on-chip special EPROM

area will be addressed. (See Figure 1-2 to determine

wher e the s peci al E PROM are a is l ocat ed f or th e vari -

ous PIC16H V54X devices).

1.1 Program/Verify Without PC Increment

After entering the program/verify mode, pulsing the

T0CKI pin LOW programs the data present on PORTA

and P ORTB in to the me mor y locati on sele cted by the

Progr am Coun ter . The d uration of the T0CK I LOW time

determines the length of the programming pulse.

Pulsing the T0C KI pin LO W again with out ch anging th e

signals on MCLR and OSC1 puts the contents of the

selected memory location out on PORTA and PORTB

for verification of a successful programming cycle. This

verification pulse on T0CKI can be much shor ter than

the programming pulse. If the programming was not

successful, T0CKI can be pulsed LOW again to apply

another programming pulse, followed again by a

shorter T0CKI LO W puls e for anothe r verifica tion cycle .

This sequence can be repeated as many times as

required until the programming is successful.

1.2 Verify with PC Increment

If a verification cycle shows that programming was suc-

cessful, the Program Counter can be incremented by

keeping the T0CKI input at a HIGH level while pulsing

the OSC1 input HIGH. When both T0CKI and OSC1

are HIGH, the contents of the selected memory loca-

tion is put out on Por ts A and B (= Verify). The falling

edge of OSC1 will increment the Program Counter.

A fast VERIFY- ONLY with automatic increment of the

PC can be performed by entering the program/verify

mode as de sc ribed above and then cl ock in g th e O SC 1

input. If OSC1 is HIGH, the selected memory location

is output on Ports A and B, while the falling edge of

OSC1 will increment the Program Counter. Thus, the

first memory location to be verified after entering the

program/verify mode, is the configuration word. The

next location is 000h followed by 001h and so on. The

program memory location “N” can be reached by gen-

erating “N + 1” falling edges on OSC1. When OSC1 is

brought HIGH again, the contents of address “N” are

output on Ports A and B as long as OSC1 stay s HIGH.

1.3 Programming/V erifying Configuration

Word

The configuration word is logically mapp ed at program

memory location “0x 7FF ”. The PC point s to th e co nfi g-

uration word after MCLR pin goes from LOW to VHH

(HIGH). The configuration word can be programmed or

verified using the techniques described in Section 1.1

and Section 1.2.

If PC is incremented, the next location it will point to is

“0x0 00” in us er memor y. Incr ementi ng PC 204 8 times

will no t allow the us er to point to the configur ation wor d.

The only w a y to poin t to it again is to re set an d re-ent er

program mode.

 1999 Microchip Technology Inc. DS30467A-page 3

PIC16HV54X

1.4 Programming Method

The programming technique is described in the follow-

ing section. It is designed to guarantee good program-

ming margins. It does, however, require a variable

power supply for VCC.

1.4.1 PROGRAMMING METHOD DETAILS

Essenti ally, this techn iqu e i nc lud es the fo llowing steps:

1. Perform blank check at VDD = VDDmin. Report

failure. The device may not be properly erased.

2. Program location with pulses and verify after

each pulse at VDD = VDDP:

where VDDP = VDD range required during pro-

gramming (4.5V - 5.5V).

a) Programming condition:

VPP = 13.0V to 13.25V

VDD = VDDP = 4.5V to 5.5V

VPP must be ≥ VDD + 7.25V to k eep “pro gra mming

mode” active.

b) Verify condition:

VDD = VDDP

VPP ≥ VDD + 7.5V but not to exceed 13.25V

If location fails to program after “N” pulses, (sug-

gest ed max imu m prog r am pul ses of 8) the n report

error as a programming failure.

3. Once location passes “Step 2", apply 3X over-

programming, i.e., apply three times the number

of pulses that w ere required to pr ogram the loca-

tion. This will guarantee a solid programming

margin. The overprogramming should be made

“software programm able ” for easy update s .

4. Program all locations.

5. Verify al l loc ati ons (using speed verif y mode) at

VDD = VDDmin

6. Verify all locations at VDD = VDDmax

VDDmin is the minimum oper ating voltag e spec. for

the part. VDDmax is the maximum operating volt-

age spec. for the par t.

1.4.2 SYSTEM REQUIREMENTS

Clearly, to i mplemen t this tec hnique , the m ost stringe nt

requirem ents will be that of the po wer supplies:

VPP:VPP can be a fixed 13.0V to 13.25V supply. It

must not exce ed 1 4.0V to a void damage to the pin and

should be current limited to approxima tely 100mA.

VDD:2.0V to 6.5V with 0.25V granularity. Since this

method calls for verification at different VDD values, a

programmable VDD power supply is needed.

Current Requirement: 40mA maximum

Microc hip ma y releas e PIC16HV5 4Xs in the future with

different VDD ranges which make it necessary to have

a programmable VDD.

It is important to verify an EPROM at the voltages

specified in this method to remain consistent with

Microchip's test screening. For example, a

PIC16HV54X specified for 4.5V to 5.5V should be

tested for proper programming from 4.5V to 5.5V.

1.4.3 SOFTWARE REQUIREMENTS

Certain parameters should be programmable (and

therefore easily modified) for easy upgrade.

a) Pulse width

b) Maximum number of pulses, current limit 8.

c) Number of over-programming pulses: should be

= (A • N) + B, where N = number of pulses

required in regular programming. In our current

algorithm A = 11, B = 0.

1.5 Programming Pulse Width

Program Memory Cells: When programming one

word of EPROM, a programming pulse width (TPW) of

100 µs is recommended.

The maximum number of programming attempts

should be lim ite d to 8 per word.

After the first successful verify, the same location

should be over-programmed with 11X over-program-

ming.

Configuration W ord: The config urati on word for osci l-

lator selection, WDT (watchdog timer) disable and

code protection, requires a programming pulse width

(TPWF) of 1 0 ms. A s eries of 100 µs pulses is preferred

over a single 10 ms pulse.

Note: Device must be verified at minimum and

maximum specified operating voltages as

specified in the data sheet.

Note: Any programmer not meeting the program-

mable VDD requirement and the verify at

VDDmax and VDDmin requirement may

only be classified as “prototype” or “devel-

opment” programmer but not a production

programmer.

PIC16HV54X

DS30467A-page 4  1999 Microchip Technology Inc.

FIGURE 1-1: PROGRAMMING METHOD FLOWCHART

N > 8?

Start

Blank Check

@ VDD = VDDmin

Pass?

Report Poss ible Erase Failure

Continue Programming

at user’s option

Program 1 Location

@ VPP = 13.0V to 13.25V

VDD = VDDP

N = N + 1

(N = # of program pulses)

Report Programming Failure

Increment PC to point to

ne xt location, N = 0 Apply 11N additional

program pulses

Pass?

All

locations

done?

Verify all locations

@ VDD = VDDmin

Pass? Report verify failure

@ VDDmin

VDD = VDD max.

Verify all locations

@ VDD = VDDmax

Pass? Report verify failure

@ VDDmax

Done

Yes

Now program

Configurati on Word Ver ify Configuration Word

@ VDDmax & VDDmin

 1999 Microchip Technology Inc. DS30467A-page 5

PIC16HV54X

FIGURE 1-2: PIC16HV54X SERIES PROGRAM MEMORY MAP IN PROGRAM/VERIFY MODE

1.6 Special Memory Locations

The ID Loc ations are a is only enab led if the de vice is in

a test or programming/verify mode. Thus, in normal

operation mode only the memory location 0x000 to

0xNNN will be accessed and the Program Counter will

just roll ov er from address 0xNNN to 0x000 when incre-

mented.

The configuration word can only be accessed immedi-

atel y after MC LR going from VIL to VHH. The Pro gram

Counter will be set to all ’1’s upon MCLR =VIL. Thus,

it ha s the v alue “0x7FF ” when ac cess ing th e con figur a-

tion EPROM. Incrementing the Program Counter once

by pulsing OSC1 causes the Program Counter to roll

over to all '0's. Incrementing the Program Counter 4K

times after reset (MCLR = VIL) does not allow access to

the configuration EPROM.

1.6.1 CUSTOMER ID CODE LOCATIONS

Per definition, the first four words (address TTT to TTT

+ 3) are reserved for customer use. It is recommended

that the cu stomer use only th e four lower order bits (bits

0 through 3) of each word and filling the eight higher

order bits with '0's.

A user may want to store an identification code (ID) in

the ID locations and still be able to read this code after

the c ode protec tion bit was programmed. This is pos-

sible if the ID code is only four bits long per memory

location, is located in the least significant nibble bound-

ary of the 12-bit word, and the remaining eight bits are

all '0 's.

EXAMPLE 1: CUSTOMER CODE 0xD1E2

The Customer ID code “0xD1E2” should be stored in

the ID locations 200-203 like this:

200: 0000 0000 1101

201: 0000 0000 0001

202: 0000 0000 1110

203: 0000 0000 0010

Reading these four memory locations, even with the

code protection bit programmed would still output on

Port A the bit sequence “1101”, “0001”, “1110”, “0010”

which is “0xD1E2”.

Address

(Hex) 000 Bit Number

11 0

NNN

TTT

TTT + 1

TTT + 2

TTT + 3

TTT + 3F

(FFF)

For Customer Use

(4 x 4 bit usable)

For Factory Use

Configuration Word 4 bit

0 0 ID0

0 0 ID1

0 0 ID2

0 0 ID3

User Program Memory

(NNN + 1) x 12 bit

NNN Highest normal EPROM memory address. NNN = 0x1FF for PIC16HV540.

TTT Star t address of special EPROM area and ID Locations.

Note: Microchip will assign a unique pattern

number for QTP and SQTP requests and

for ROM devices. This pattern number will

be unique and traceable to the submitted

code.

PIC16HV54X

DS30467A-page 6  1999 Microchip Technology Inc.

2.0 CONFIGURATION WORD

The confi guration wo rd is the very first memory location

which is accessed after entering the program/verify

mode of the PIC16HV54X. It contains the two bits for

the selection of the oscillator type, the watchdog timer

enable bit, and the code protection bit. All other bits (4

through 11) are read as ’1’s.

FIGURE 2-1: CONFIGURATION WORD BIT MAP

bit Number:

11109876543210

PIC16HV540 CP WDTE FOSC1 FOSC0

––––––––RA3RA2RA1RA0

TABLE 2-1: CONFIGURATION BIT FUNCTIONALITY

(PIC16HV540)

RA3-RA11

CP RA2

WDTE RA1

FOSC1 RA0

FOSC2 Function Remarks

1 x x x Memory unprotected Default

0 x x x Memory pr otected

x 1 x x Watchdog Timer enabled Default

x 0 x x Watchdog Timer disabled

x x 1 1 RC - Oscillator Default

x x 1 0 HS - High Speed Crystal

x x 0 1 XT - Standard Crystal

x x 0 0 LP - Low Frequency Cry s tal

Legend: 1= Erased (apply HIGH Level to I/O pin during program)

0 = Written (apply LOW Level to I/O pin during program)

x = Don’t Care

 1999 Microchip Technology Inc. DS30467A-page 7

PIC16HV54X

3.0 CODE PROTECTION

The prog ram c ode written into th e EPRO M can be pro-

tected by writing to the “CP” bit of the configuration

word. All memory locations starting at 0x40 and above

are pro tected agains t prog ramming . It is still poss ible to

prog r am lo cations 0 x00 thro ugh 0x3F, the ID locati ons,

and the con fig ur ation wo rd.

3.1 Programming Locations 0x000 to

0x03F after Code Protection

In a code protected part, these locations can still be

programmed. They will read back scrambled data. In

any event, the programmer cannot verify the device

once it is code protected.

In code protected parts, the contents of the program

memory cannot be read out in a way that the program

code can be reconstructed. A location when read out

will read as: 0000 0000 xxxx where xxxx is the XOR of

the three nibbles.

For example, if the memory location contains 0xC04

(movlw 4), after code protection the output will be

0x008.

In addition, all memory locations starting at 0x40 and

abov e are protected ag ainst progra mming. It is st ill pos-

sible to program locations 0x000 through 0x03F and

the configuration word. However, performing a verify

with activated code protection logic puts a 4-bit wide

“checksum” on PORTA while the 8-bits of PORTB are

read as '0's. The checksum is computed as follows:

The four high order bits of an instruction word are

“XOR’ed” with the four middle and the four low order

bits , and the res ult is tra nsferred to POR TA. All memory

loc ations are affecte d.

To program location 0x000 to 0x03F in a code pro-

tected pa rt, the programmer should pro gram one nib ble

at a time and verify the result through the XOR’ed out-

put. For example, to program a location with 0xA93,

first program the location with 0xFF3, verify checksum

to be 0x 003 ; th en prog ra m the loc at ion w ith 0x F93 an d

verify the XOR’ed output to be 0x00C and finally pro-

gram the location with 0xA93 and verify the read-out to

be 0x006.

3.2 Embedding Configuration Word and ID Information in the Hex File

Note: Locations [0x000 : 0x03F] are not secure

after code protection.

To allow portability of code, a PIC16HV54X programmer is required to read the configuration word and ID locations

from the hex file when loading the he x file. If configu ration word information was not present in the hex file then a simple

warning message may be issued. Similarly, while saving a hex file, all configuration word and ID information must be

included. Configuration word should have the address of 0xFFF. ID locations are mapped at addresses described in

Section 1.6.1 and Table 3-1. An option to not include this information may be provided.

Microchip Technology Inc. feels strongly that this feature is important for the benefit of the end customer.

PIC16HV54X

DS30467A-page 8  1999 Microchip Technology Inc.

3.3 Checksum

3.3.1 CHECKSUM CALCULATIONS

Checksum is calculated by reading the contents of the

PIC16HV54X memory locations and adding up the

opcodes up to the maximum user addressable location,

0x1FF for the PIC16HV540. Any carry bits exceeding

16-bits are neglected. Finally, the configuration word

(appropriately masked) is added to the checksum.

Checksum computation for each member of the

PIC16HV54X devices is shown in Table .

The checksum is calculated by summing the following:

• The contents of all program memory locatio ns

• The configuration word, appropriately masked

• Masked ID loc ations (when applicable)

The least significant 16 bits of this sum is the check-

sum.

The following table describes how to calculate the

checksum for each device. Note that the checksum cal-

culation differs depending on the code protect setting.

Since the program memory locations read out differ-

ently depending on the code protect setting, the table

des c ribes how to mani pulate the actual program mem-

ory values to simulate the values that would be read

from a protec ted de v ice . When ca lcul ating a ch ec ksum

by reading a device, the entire program memory can

simply be read and summed. The configuration word

and ID locations can always be read.

Note that some older devices have an additional value

added in the checksum. This is to maintain compatibil-

ity with older device programmer checksums.

TABLE 3-1: CHECKSUM COMPUTATION

Device Code

Protect Checksum* Blank

Value

0x723 at 0

and max

address

PIC16HV540 OFF

ON SUM[0x000:0x1FF] + CFGW & 0x00F + 0x0FF0

SUM_XOR4[0x000:0x1FF] + CFGW & 0x00F 0x0DFF

0x1E07 0xFC47

0x1DF5

Legend: CFGW = Configuration W ord

SUM[a:b] = Sum of locations a through b inclusive

SUM_XOR4[a:b] = XOR of the four high order bits with the four middle and the four low of memory location order bits

summed over the locations a through b inclusive. For example, location_a = 0x123 and

location_b = 0x456, then SUM_XOR [location_a: location_b] = 0x0007.

SUM_ID = ID locations masked by 0xF then made into a 16-bit value with ID0 as the most significant nibble.

For exam ple, ID0 = 0x1, ID1 = 0x2, ID3 = 0x3, ID4 = 0x4, then SUM_ID = 0x1234.

*Checksum = Sum of all individual expressions modulo [0x FFFF]

+ = Addition

& = Bitwise AND

 1999 Microchip Technology Inc. DS30467A-page 9

PIC16HV54X

4.0 PROGRAM/VERIFY MODE ELECTRICAL CHARACTERISTICS

4.1 DC Program Characteristics)

4.2 AC Program and Test Mode Characteristics

)

TABLE 4-1: DC CHARACTERISTICS (TA = +10°C TO +40°C) (25°C IS RECOMMENDED

Parameter

No. Symbol Characteristics Min. Typ. Max. Units Conditions

PD1 VDDP Supply voltage during pro-

gramming 4.75 5.0 5.25 V Note 1

PD2 IDDP Supply Current (from VDD)25.0mAVDD = 5.0V, Fosc1 = 5MHz

PD3 VDDV Supply Voltage during verify VDDmin 5.75 V

PD4 VHH1 Voltage on MCLR to stay in

Program/Verify Modes VDD + 3 VDD+7.25 V

PD5 VHH2 Voltage on MCLR during pro-

gramming 12.5 13.5 V

PD6 IHH Supply current from program-

ming voltage source 100 mA

PD7 IHH2 Cu rrent int o MCLR pin during

programming (T0CKI=0) 10.0 25.0 mA VHH = 13.5V, VDD = 6.0V

PD8 VIL Input Low Voltage VSS 0.15VDD V

PD9 VIH Input High Voltage 0.85VDD 5.0 VDD V

Note 1: Device must be verified at minimum and maximum operating voltages specified in the data sheet.

TABLE 4-1: AC CHARACTERISTICS (TA = +10°C TO +40°C, VDD = 5.0V ± 5%)

(25°C IS RECOMMENDED

Parameter

No. Symbol Characteristics Min Typ Max Units Conditions

P1 TRMCLR Rise Time 0.15 1.0 8 µs

P2 TFMCLR Fall Time 0.5 2.0 8 µs

P3 TPS Program Mode Setup Time 1.0 µs

P4 TACC Data Access Time 250 ns

P5 TDS Data Setup Time 1.0 µs

P6 TDH Data Hold Time 1.0 µs

P7 TOE Output Enable Time 0 100 ns

P8 TOZ Output Disable Time 0 100 ns

P9 TPW Programmi ng Puls e Width 10.0 100 µs

P10 TPWF Pro g r am mi ng Puls e W idt h 10,000 µs Configuration Word only

P11 TRC Recovery Time 10.0 µs

P12 FOSC Frequency on OSC1 DC 5 MHz For incrementing of the PC

PIC16HV54X

DS30467A-page 10  1999 Microchip Technology Inc.

FIGURE 4-1: PROGRAMMING AND VERIFY TIMING WAVEFORM

FIGURE 4-2: SPEED VERIFY TIMING WAVEFORM

MCLR/VPP

T0CKI

OSC1

DATA

(RB7:0,

RA3:0)

(Internal)

PC 0xFFF 0x000 0x001

Data in

(Config)

VHH1/VHH2

P11

P5 P6 P7

(PC pointing to Configuration Word)

Data out

(Config) Data out

(Config) Data in

(LOC 0x000)

P3 P10 P9

P4 P4 P4

P8 P7 P7 P7

P8 P5 P6 P8 P8

Data out

(LOC 0x000) Data out

(LOC0x000)

MCLR/VPP

T0CKI

OSC1

DATA

(RB7:0, RA3:0)

(Internal)

Data out

(Config) Data out

(0x000)

0xFFF 0x000 0x001 0x002 0x003

P4 P8

Data out

(0x001) Data out

(0x002) Data out

(0x003)

VHH1

’1’

 1999 Microchip Technology Inc. DS30467A-page 11

PIC16HV54X

NOTES:

Information cont ai ned in this publication reg ardi ng device app l ications and the l i ke is intended for suggestion onl y and may be superseded by u pdates. No represe nta tion or warranty is giv en and no liability is assumed

by Microchip Technology Inc orporated with respect to the acc uracy or use of such inform ation, or inf ringement of patent s or other intellec tual property ri ghts arising from such use or otherwis e. Use of Microchip’ s products

as critical components i n l ife support sys tems is not authorize d exc ept with ex press written approval by M i crochip. No lic enses are conveyed, implicitl y or otherwise, under any inte llectual property rights. The Mi crochip

logo and name are registered trade ma rks of Microchip Technology Inc. in the U. S.A. and ot her countries. Al l rig hts reserved. All othe r tr adem arks mentione d herein are the proper ty of t hei r res pective comp ani es .

DS30467A-page 12  1999 Microchip Technology Inc.

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223 Hing Fong Road

Kwai Fong, N.T., Hong Kong

Tel: 852-2-401-1200 F ax: 852-2-401-3431

Beijing

Microchip Technology, Beijing

Unit 915, 6 Chaoyangmen Bei Dajie

Dong Erhuan Road, Dongcheng District

New China Hong Kong Manhattan Building

Beijing 100027 PRC

Tel: 86-10-85282100 F ax: 86-10-85282104

India

Microchip Technology Inc.

India Liaison Office

No. 6, Legacy, Convent Road

Bangalore 560 025, India

Tel: 91-80-229-0061 F ax: 91-80-229-0062

Japan

Microchip Technology Intl. Inc.

Benex S-1 6F

3-18-20, Shinyokohama

Kohoku-Ku, Yokohama-shi

Kanagawa 222-0033 Japan

Tel: 81-45-471- 6166 F ax: 81-45-471-6122

Korea

Microchip Technology Korea

168-1, Youngbo Bldg. 3 Floor

Samsung-Dong, Kangnam-Ku

Seoul, Korea

Tel: 82-2-554-7200 Fax: 82-2-558-5934

Shanghai

Microchip Technology

RM 406 Shanghai Golden Bridge Bldg.

2077 Yan’an Road West, Hong Qiao District

Shanghai, PRC 200335

Tel: 86-21-6275-5700 F ax: 86 21-6275-5060

ASIA/PACIFIC (continued)

Singapore

Microchip Technology Singapore Pte Ltd.

200 Middle Road

#07-02 Prime Centre

Singapore 188980

Tel: 65-334-8870 Fax: 65-334-8850

Taiwan, R.O.C

Microchip Technology Taiwan

10F-1C 207

Tung Hua North Road

Taipei, Taiwan, ROC

Tel: 886-2-2717-7175 F ax: 886-2-2545-0139

EUROPE

United Kingdom

Arizona Microchip Technology Ltd.

505 Eskdale Road

Winnersh Triangle

Wokingham

Ber kshir e, Engla nd RG41 5TU

Tel: 44 118 921 5858 Fax: 44-118 921-5835

Denmark

Microchip Technology Denmark ApS

Regus Business Centre

Lautrup hoj 1-3

Bal lerup DK-2750 Denmark

Tel: 45 4420 9895 Fax: 45 4420 9910

France

Arizona Microchip Technology SARL

Parc d’Activite du Moulin de Massy

43 Rue du Saule Trapu

Batiment A - ler Etage

91300 Massy, France

Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79

Germany

Arizona Microchip Technology GmbH

Gustav-Heinemann-Ring 125

D-81739 München, Germany

Tel: 49-89-627-144 0 F ax: 49-89-627-144-44

Italy

Arizona Microchip Technology SRL

Centro Direzionale Colleoni

Palazzo Taurus 1 V. Le Colleoni 1

20041 Agrate Brianza

Milan, Italy

Tel: 39-39-65791-1 F ax: 39-39-6899883

08/11/99

WORLDWIDE SALES AND SERVICE

Microch i p received ISO 9001 Quality

System certification for its worldwide

headquart ers, des ign, and wafe r fabric ation

facilities in January 1997. Our field-pro-

grammabl e PICmicro® 8-bit M C Us,

KEELOQ® code hopping devices, Serial

EEPROMs, related specialty memory prod-

ucts and development syst ems conform to

the str i ngent qualit y standards of the Int er-

national Standard Organization (ISO).