CD4047BCN - Fairchild Semiconductor

October 1987

Revised March 2002

CD4047BC Low Power Monostable/Astable Multivibrator

CD4047BC

Low Power Monostable/Astable Multivibrator

General Description

The CD4047B is capable of operating in either the

monostable or astable mode. It requires an external capac-

itor (between pins 1 and 3) and an external resistor

(between pins 2 and 3) to determine the output pulse width

in the monostable mode, and the output frequency in the

astable mod e.

Astable operatio n i s ena bl ed b y a hi gh lev el o n th e asta bl e

input or low level on the astable input. The output fre-

quency (at 50% duty cycle) at Q and Q outputs is deter-

mined b y the tim i ng c omp on ents. A fre qu ency tw ice that of

Q is available at the Oscillato r Output; a 50% dut y cycle is

not guaranteed.

Monostable operation is obtained when the device is trig-

gered by LOW-to-HIGH transition at + trigger input or

HIGH-to-LOW transition at − trigger input. The device can

be retriggered by applying a simultaneous LOW-to-HIGH

transition to both the + trigger and retrigger inputs.

A high level on Reset input resets the outputs Q to LOW, Q

to HIGH.

Features

■Wide supply voltage range: 3.0V to 15V

■High nois e imm unity: 0.45 VDD (typ.)

■Low power TTL compatibility: Fan out of 2 d riving 74L

or 1 driving 74LS

Special Features

■Low power consumption: special CMOS oscillator

configuration

■Monostable (one-shot) or astable (free-running)

operation

■True and complemented buffered outputs

■Only one external R and C required

Monostable Multivibrator

Features

■Positive- or negative-edge trigger

■Output pulse width independent of trigger pulse duration

■Retriggerable option for pulse width e xpansion

■Long pul se wid ths poss ible u sing s mall RC com ponent s

by means of external counter provision

■Fast recovery time essentially independent of pulse

width

■Pulse-width accuracy maintained at duty cycles

approaching 100%

Asta b le M u ltivi b rato r F e atur es

■Free-running or gatable operating modes

■50% duty cycle

■Oscillator output available

■Good astable frequency stability

typical= ±2% + 0.03%/°C @ 100 kHz

frequency= ±0.5% + 0.0 15% /°C @ 10 kHz

deviation (circuits trimmed to frequency VDD = 10V

±10%)

Applications

• Frequency discriminators

• Timing circuits

• Time-delay applications

• Envelope det ecti o n

• Frequency multiplication

• Frequency division

Ordering Code:

Devices also available in Tape and R eel. Specify by appending th e s uffix let t er “X” to the ordering code.

Order Number Package Number Package Description

CD4047BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

CD4047BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

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CD4047BC

Connection Diagram

Pin Assignments for SOIC and DIP

Top View

Function Table

Note 1: External resistor between te rm inals 2 and 3. External capac it or between termi nals 1 and 3.

Typical Implementation of External Countdown Option

tEXT = (N − 1) tA + (tM + tA/2)

FIGURE 1.

Terminal Connections Output Pulse Typical Output

Function To VDD To VSS Inpu t Pulse From Period or

To Pulse Width

Astable Multivibrator

Free-Running 4, 5, 6, 14 7, 8, 9, 12 10, 11, 13 tA(10, 11) = 4.40 RC

True Gating 4, 6, 14 7, 8, 9, 12 5 10, 11, 13 tA (13) = 2.20 RC

Complement Gating 6, 14 5, 7, 8, 9, 12 4 10, 11, 13

Monostable Multivibrator

Positive-Edge Trigger 4, 14 5, 6, 7, 9, 12 8 10, 11

Negative-Edge Trigger 4, 8, 14 5, 7, 9, 12 6 10, 11 tM (10, 11) = 2.4 8 RC

Retriggerable 4, 14 5, 6, 7, 9 8, 12 10, 11

External Countdown (Note 1) 14 5, 6, 7, 8, 9, 12 Figure 1 Figure 1 Figure 1

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CD4047BC

Block Diagram

Logic Diagram

*Special input protection circuit to permit larger input-voltage swings.

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CD4047BC

Absolute Maximum Ratings(Note 2)

(Note 3) Recommended Operating

Conditions (Note 3)

Note 2: “Absolute Maximum Ratings” are those values beyond which the

safety of the device cannot be guaranteed. They are not meant to imply

that the devic es should be opera ted at these limits. The table of “Recom-

mended Operating Conditions” and “Electrical Characteristics” provides

conditions for act ual devi c e operation.

Note 3: VSS = 0V unless otherwise specified.

DC Electrical Characteristics (Note 3)

Note 4: IOH and IOL are tes t ed one ou t put at a ti me .

DC Supply Voltage (VDD)−0.5V to +18VDC

Input Voltage (VIN)−0.5V to VDD +0.5VDC

Stora ge Temperature Rang e (TS)−65°C to +150°C

Power Di ssipa ti on (PD)

Dual-In- Li ne 700 mW

Small Outline 500 mW

Lead Temperature (TL)

(Soldering, 10 seconds) 26 0°C

DC Supply Voltage (VDD) 3V to 15VDC

Input Voltage (VIN)0 to V

DD VDC

Operating Tempera ture Range ( TA)−55°C to +125°C

Symbol Parameter Conditions −55°C25°C 125°CUnits

Min Max Min Typ Max Min Max

IDD Quiescent Device Current VDD = 5V 5 5 150 µAVDD = 10V 10 10 300

VDD = 15V 20 20 600

VOL LOW Level Output Voltage |IO| < 1 µA

VDD = 5V 0.05 0 0.05 0.05 VVDD = 10V 0.05 0 0.05 0.05

VDD = 15V 0.05 0 0.05 0.05

VOH HIGH Level Output Voltage |IO| < 1 µA

VDD = 5V 4.95 4.95 5 4.95 VVDD = 10V 9.95 9.95 10 9.95

VDD = 15V 14.95 14.95 15 14.95

VIL LOW Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V 1.5 2.25 1.5 1.5 VVDD = 10V, VO = 1V or 9V 3.0 4.5 3.0 3.0

VDD = 15V, VO = 1.5V or 13.5V 4.0 6.75 4.0 4.0

VIH HIGH Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 2.75 3.5 VVDD = 10V, VO = 1V or 9V 7.0 7.0 5.5 7.0

VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 8.25 11.0

IOL LOW Level Output Current VDD = 5V, VO = 0.4V 0.64 0.51 0.88 0.36 mA(Note 4) VDD = 10V, VO = 0.5V 1.6 1.3 2.25 0.9

VDD = 15V, VO = 1.5V 4.2 3.4 8.8 2.4

IOH HIGH Level Output Current VDD = 5V, VO = 4.6V −0.64 −0.51 −0.88 −0.36 mA(Note 4) VDD = 10V, VO = 9.5 V −1.6 −1.3 −2.25 −0.9

VDD = 15V, VO = 13.5V −4.2 −3.4 −8.8 −2.4

IIN Input Current VDD = 15V, VIN = 0V −0.1 −10−5−0.1 −1.0 µA

VDD = 15V, VIN = 15V 0.1 10−50.1 1.0

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CD4047BC

AC Electrical Characteristics (Note 5)

TA = 25°C, CL = 50 pF, RL = 200k, input tr = tf = 20 ns, unless otherwise specified.

Note 5: AC Paramet ers are guaranteed by DC co rrelated te s tin g.

Symbol Parameter Conditions Min Typ Max Units

tPHL, tPLH Propagation Delay Time Astable, VDD = 5V 200 400 nsAstable to Osc Out VDD = 10V 100 200

VDD = 15V 80 160

tPHL, tPLH Astable, Astable to Q, Q VDD = 5V 550 900 nsVDD = 10V 250 500

VDD = 15V 200 400

tPHL, tPLH + Trigger, − Trigger to Q VDD = 5V 700 1200 nsVDD = 10V 300 600

VDD = 15V 240 480

tPHL, tPLH + Trigger, Retrigger to Q VDD = 5V 300 600 nsVDD = 10V 175 300

VDD = 15V 150 250

tPHL, tPLH Reset to Q, Q VDD = 5V 300 600 nsVDD = 10V 125 250

VDD = 15V 100 200

tTHL, tTLH Transition Time Q, Q, Osc Out VDD = 5V 100 200 nsVDD = 10V 50 100

VDD = 15V 40 80

tWL, tWH Minimum Input Pulse Duration Any Input

VDD = 5V 500 1000 nsVDD = 10V 200 400

VDD = 15V 160 320

tRCL, tFCL + Trigger, Retrigger, Rise and VDD = 5V 15 µsFall Time VDD = 10V 5

VDD = 15V 5

CIN Average Input Capacitance Any Input 5 7.5 pF

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CD4047BC

Typical Performance Characteristics

Typical Q, Q, Osc Out Period Accuracy vs

Supply Voltage (Astable Mode Operation) Typical Q, Q, Pulse Width Accuracy vs

Supply Voltage Monostable Mode Operation

Typical Q, Q and Osc Ou t Perio d A ccu racy

vs Temperature Astable Mode Operation Typical Q and Q Pulse Width Accuracy vs

Temperature Monostable Mode Operation

fQ, Q RC

A1000 kHz 22k 10 pF

B100 kHz 22k 100 pF

C10 kHz 220k 100 pF

D1 kHz 220k 1000 pF

E100 Hz 2.2M 1000 pF

tMRC

A2 µs 22k 10 pF

B7 µs 22k 100 pF

C60 µs 220k 100 pF

D550 µs 220k 10 00 pF

E5.5 ms 2.2M 1000 pF

fQ, Q RC

A1000 kHz 22k 10 pF

B100 kHz 22k 100 pF

C10 kHz 220k 100 pF

D1 kHz 220k 1000 pF

tMRC

A2 µs 22k 10 pF

B7 µs 22k 100 pF

C60 µs 220k 100 pF

D550 µs 220k 10 00 pF

Note: Minimum Value o f R: 10 K Ω

Maximum Value of R: 1 Meg Ω

Minimum Value of C for Astable Mode: 100 pF

Minimum Value of C for Monostabl e Mode: 1000 pF

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CD4047BC

Typical Performance Characteristics (Continued)

Timing Diagrams

Astable Mode Monos table Mode

Retrigger Mode

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CD4047BC

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M14A

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CD4047BC Low Power Monostable/Astable Multivibrator

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Package Number N14A

Fairchild does not assume an y responsibility fo r use of any circuitry described, no circuit patent lic enses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

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to perform when properly used in accordance with

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user.

2. A crit ical componen t in any com ponen t of a life s uppor t

device or system whose failure to perform can be rea-

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device or system, or to affect its safety or effectiveness.