Preliminary Data Sheet V1.0 1 2001-10-26
Smart Lowside Power Switch
HITFETâ BSP 75N
Preliminary Data Sheet V1.0
SOT-223
Features
• Logic Level Input
• Input protection (ESD)
• Thermal shutdown with auto restart
• Overload protection
• Short ci rcuit prot ecti on
• Overvoltage protection
• Current limitation
Application
• All kinds of resistive, inductive and capacitive loads in switching applications
•µC compatible power switch for 12 V and 24 V DC applications and for 42 Volt
Powernet
• Replac es elec trom ech ani cal relays and discrete circuits
General Description
N channel vertical power FET in Smart Power Technology. Fully protected by embedded
protection functions.
Type Ordering Code Package
HITFETâ BSP 75N Q67060-S7215 P-SOT223-4-7
Product Summary
Parameter Symbol Value Unit
Con tinuous drain source voltage VDS 60 V
On-state resistance RDS(ON) 550 mΩ
Current limitation ID(lim) 1A
Nominal load current ID(Nom) 0.7 A
Clamping energy EAS 550 mJ
HITFETâ BSP 75N
Preliminary Data Sheet V1.0 2 2001-10-26
Figure 1 Block Diagram
Pin Definitions and Functions
Pin Symbol Function
1 IN Input
2 DRAIN Output to the load
3 + TAB SOURCE Ground (internally connected)
EHA07505
Short Circuit
Protection
Current
Limitation
Over-
Protection
temperature
Protection
Overvoltage
ESD
dv/dt
Limitation
TAB
HITFET
IN
1
Drain 2
Source 3
M
V
bb
+
LOAD
4
®
Preliminary Data Sheet V1.0 3 2001-10-26
HITFETâ BSP 75N
Circuit Description
The BSP 75N is a monolithic power switch in Smart Power Technology (SPT) with a
logic level input, an open drain DMOS output stage and integrated protection functions.
It is designed for all kind of resistive and inductive loads (relays, solenoid) in automotive
and industrial applications.
Protection Functions
•Overvoltage protection: An internal clamp limits the output voltage at VDS(AZ) (min
60V) when inductive loads are sw itched off.
•Current limitation: By means of an internal current measurement the drain current is
limi ted at ID(lim) (1.4 - 1.5 A typ.). If the current limitation is ac tiv e th e d evi ce ope ra tes
in the linear region, so power dissipation may exceed the capability of the heatsink.
This operati on leads to an inc reasing junct ion temperature un til the overtemper ature
threshold is reached.
•Overtemperature and short circuit protection: This protection is based on sensing
the chip temperature. The location of the sensor ensures a fast and accurate junction
temperature detection. Overtemperature shutdown occurs at minimum 150 °C. A
hysteresis of typ. 10 K enables an automatical restart by cooling.
The device is ESD protected according Human Body Model (4 kV) and load dump
protected (see Maximum Ratings).
HITFETâ BSP 75N
Preliminary Data Sheet V1.0 4 2001-10-26
Absolute Maximum Ratings
Tj = 25 °C, unless otherwise specified
Parameter Symbol Values Unit Remarks
Con tinuous drain source voltage
(overvoltage protection see page 3)VDS 60 V –
Drain source voltage for
short circuit protection VDS 32 V –
Load dump protection
IN = low or high (8 V); RL = 50 Ω
IN = high (8 V); RL = 22 Ω
VLoadDump1)
80
47
VVLoadDump =
VP + VS;
VP = 13.5 V
RI2) = 2 Ω;
td = 400 ms;
Continuous input voltage VIN -0.2 … +10 V –
Peak input voltage VIN -0.2 … +20 V –
Operating temperature range
Storage temperature range Tj
Tstg
-40 … +150
-55 … +150 °C
°C–
Power dissipation (DC) Ptot 1.8 W –
Unclamped single pulse inductive energy EAS 550 mJ ID(ISO) = 0.7 A
Electrostatic discharge voltage (Human
Body Model)
according to MIL STD 883D, method
3015.7 and EOS/ESD assn. standard
S5.1 - 1993
VESD 4000 V –
DIN humidity category, DIN 40 040 – E – –
IEC climatic category, DIN IEC 68-1 – 40/150/56 – –
Thermal Resistance
Junction soldering point RthJS ≤ 10 K/W –
Junction - ambient3) RthJA ≤ 70 K/W –
1) VLoadDump is setup wit hout DUT connected to th e generato r per IS O 7637-1 and D I N 40 839.
2) RI = internal re si stance of the lo ad dump test puls e generat or LD 200.
3) Device on epoxy pc b 40 mm × 40 mm × 1.5 mm with 6 cm2 copper area for pi n 4 c onnection.
Preliminary Data Sheet V1.0 5 2001-10-26
HITFETâ BSP 75N
Electrical Characteristics
Tj = 25 °C, unless otherwise specified
Parameter Sym-
bol Limit Values Unit Test Conditions
min. typ. max.
Static Characteristics
Drain source clamp voltage VDS(AZ) 60 –75 V ID = 10 mA,
Tj = -40 … +150 °C
Of f state drain current IDSS ––5µAVIN = 0 V,
VDS = 32 V,
Tj = -40 … +150 °C
Input threshold voltage VIN(th) 11.72.5VID = 10 mA
Input current:
normal operation, ID < ID(lim):
current limitation mode, ID = ID(lim):
After thermal shutdown, ID = 0 A:
IIN(1)
IIN(2)
IIN(3)
–
–
1000
100
200
1500
200
300
2000
µAVIN = 5 V
On-state resistance Tj = 25 °C
Tj = 150 °C
RDS(on) –
–550
850 675
1350
mΩID = 0.7 A,
VIN = 5 V
On-state resistance Tj = 25 °C
Tj = 150 °C
RDS(on) –
–475
750 550
1000
mΩID = 0.7 A,
VIN = 10 V
Nominal load current ID(Nom) 0.7 ––AVBB = 12 V,
VDS = 0 .5 V,
TS = 85 °C,
Tj < 150 °C
Current limit ID(lim) 11.51.9AVIN = 10 V,
VDS = 12 V
Dynamic Characteristics
Turn-on time VIN to 90% ID:ton –10 20 µsRL = 22 Ω,
VIN = 0 to 10 V,
VBB = 12 V
Turn-off time VIN to 10% ID:toff –10 20 µsRL = 22 Ω,
VIN = 10 to 0 V,
VBB = 12 V
HITFETâ BSP 75N
Preliminary Data Sheet V1.0 6 2001-10-26
Slew rate on 70 to 50% VBB:-dVDS/
dton
–410V/
µsRL = 22 Ω,
VIN = 0 to 10 V,
VBB = 12 V
Slew rate off 50 to 70% VBB:dVDS/
dtoff
–410V/
µsRL = 22 Ω,
VIN = 10 to 0 V,
VBB = 12 V
Protection Functions1)
Thermal overload trip
temperature Tjt 150 165 180 °C–
Thermal hysteresis
∆
Tjt –10 –Κ–
Unclamped single pulse inductive
energy Tj = 25 °C
Tj = 150 °C
EAS 550
200 –
––
–
mJ ID(ISO) = 0.7 A,
VBB = 32 V
Inverse Diode
Continuous source drain voltage VSD –1–VVIN = 0 V,
-ID = 2 × 0.7 A
1) Integrat ed prot ect ion f unctions are d esigne d to p reven t IC de s tructio n under fault cond itions de scri bed in t he
datasheet. Fault conditions are considered as “outside” normal o perating ra nge. Protec tion function s are n ot
design ed f or continuous , repetitiv e operation.
Electrical Characteristics (cont’d)
Tj = 25 °C, unless otherwise specified
Parameter Sym-
bol Limit Values Unit Test Conditions
min. typ. max.
Preliminary Data Sheet V1.0 7 2001-10-26
HITFETâ BSP 75N
Block Diagram
Figure 2 Terms
Figure 3 Input Circuit (ESD protection)
ESD zener diodes are not designed for DC current.
EHA07506
HITFET
IN
I
1IN
IN
V
3
2
D
S
D
I
DS
V
bb
V
L
R
®
EHA07507
Source
IN
ESD-ZD
I
HITFETâ BSP 75N
Preliminary Data Sheet V1.0 8 2001-10-26
Figure 4 Inductive and Overvoltage Output Clamp
Figure 5 Turn on into Overload or short Circuit
Shut down by overtemperature and restart by cooling. Current internally limited at ID(lim).
EHA07508
HITFET D
S
Z
V
®
IN
V
DS
V
RR
V
DS(AZ)
V
t
EHA07509
EHA07510
IN
V
D
I
I
D(lim)
t
HITFETâ BSP 75N
Preliminary Data Sheet V1.0 9 2001-10-26
Maximum allo wable P ower Dissipat ion
Ptot = f(TC)
On-state Resistance RON = f(Tj);
ID = 0.7 A; VIN = 5 V
On-state Resistance RON = f(Tj);
ID = 0.7 A; VIN = 10 V
Typ. input Threshold Voltage
VIN(th) = f(Tj); ID = 10 mA; VDS = 12 V
T
EHA07511
C
P
tot
0
025 50 75 100 ˚C 150
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
W
2.0
T
EHA07512
j
-50
0
R
ON
mΩ
-25 0 25 50 75 100 ˚C 150
max.
typ.
200
400
600
800
1000
1400
T
EHA07513
j
-50
0
100
200
300
400
500
600
700
800
1000
R
ON
mΩ
-25 0 25 50 75 100 ˚C 150
max.
typ.
0
0,5
1
1,5
2
2,5
-50 -25 0 25 50 75 100 125 150
Tj [°C]
VIN(th) [V]
HITFETâ BSP 75N
Preliminary Data Sheet V1.0 10 2001-10-26
Typ. On-state Resistance RON = f(VIN);
ID = 0.7 A; Tj = 25 °C
Typ. Short Circuit Current
ID(SC) = f(VIN); VDS = 12 V, Tj = 25 °C
Typ. Current Limitation ID(lim) = f(Tj);
VDS = 12 V, VIN = 10 V
Max. Transient Thermal Impendance
ZthJA = f(tp) @ 6cm²; Parameter: D = tp/T
0
200
400
600
800
1000
1200
1400
1600
1800
2000
0246810
VIN [V]
RON [mOhm]
0
0,2
0,4
0,6
0,8
1
1,2
1,4
1,6
1,8
0246810
VIN [V]
ID(SC) [A]
1
1,1
1,2
1,3
1,4
1,5
1,6
-50 -25 0 25 50 75 100 125 150
Tj [°C]
ID(lim) [A]
0,01
0,1
1
10
100
1E-6 1E-3 1E0 1E3
tp [s e c]
Zth(JA) [K/W]
Single pulse
0.01
0.02
0.05
0.1
0.2
D=0.5
Preliminary Data Sheet V1.0 11 2001-10-26
HITFETâ BSP 75N
Package Outlines
±0.1
±0.2
±0.1
0.7
4
3
21
6.5
3
acc. to
+0.2
DIN 6784
1.6
±0.1
15˚max
±0.04
0.28
7±0.3
±0.2
3.5
0.5
0.1 max
min
B
M
0.25
B
A
2.3
4.6
A
M
0.25
P-SOT223-4-7
(Small Outline Transistor)
GPS05560
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”Dimensions in mm
SMD = Surface Mounted Device
HITFETâ BSP 75N
Preliminary Data Sheet V1.0 12 2001-10-26
Published by
Infineon Technologies AG,
Bereichs Kommunikation
St.-Martin-Strasse 76,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
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We hereby disclaim any and all warranties, including but not limited to warranties of
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devices or systems are in-tended to be implanted in the human body, or to support and/
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