STGIPN3H60AT SLLIMMTM-nano (small low-loss intelligent molded module) IPM, 3 A - 600 V 3-phase IGBT inverter bridge Datasheet - production data Applications * 3-phase inverters for motor drives * Dish washers, refrigerator compressors, heating systems, air-conditioning fans, draining and recirculation pumps Description NDIP-26L Features * IPM 3 A, 600 V, 3-phase IGBT inverter bridge including control ICs for gate driving and freewheeling diodes * Optimized for low electromagnetic interference This intelligent power module implements a compact, high-performance AC motor drive in a simple, rugged design. It is composed of six IGBTs with freewheeling diodes and three halfbridge HVICs for gate driving, providing low electromagnetic interference (EMI) characteristics with optimized switching speed. The package is optimized for thermal performance and compactness in built-in motor applications, or other low power applications where assembly space is limited. SLLIMMTM is a trademark of STMicroelectronics. * VCE(sat) negative temperature coefficient * 3.3 V, 5 V, 15 V CMOS/TTL input comparators with hysteresis an * d pull-down resistor * Undervoltage lockout * Internal bootstrap diode * Interlocking function * Optimized pinout for easy board layout * 85 k NTC for temperature control (UL1434 CA 2 and 4) Table 1. Device summary Order code Marking Package Packaging STGIPN3H60AT GIPN3H60AT NDIP-26L Tube September 2014 This is information on a product in full production. DocID026945 Rev 1 1/19 www.st.com Contents STGIPN3H60AT Contents 1 Internal schematic diagram and pin configuration . . . . . . . . . . . . . . . . 3 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.1 4 NTC thermistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 DocID026945 Rev 1 STGIPN3H60AT 1 Internal schematic diagram and pin configuration Internal schematic diagram and pin configuration Figure 1. Internal schematic diagram 1: *1' 1' 7 :287: *1' 9FF FF: +9* 287 9ERRW: 9&& +,1: /,1: +,1 /9* /,1 9ER ERRW 17& 7 19 1& 1& *1' +9* 1& 1& 92879 287 9&& 9FF FF9 +,19 +,1 /9* /,1 9ER ERRW 9ERRW9 /,19 1& 1& 18 *1' +9* 9FF FF8 287 82878 9&& +,18 +,1 /9* /,1 9ER ERRW 3 7 9ERRW8 /,18 DocID026945 Rev 1 3/19 19 Internal schematic diagram and pin configuration STGIPN3H60AT Table 2. Pin description 4/19 Pin Symbol Description 1 GND 2 T 3 VCC W Low voltage power supply W phase 4 HIN W High side logic input for W phase 5 LIN W Low side logic input for W phase 6 T 7 NC Not connected 8 NC Not connected 9 VCC V Low voltage power supply V phase 10 HIN V High side logic input for V phase 11 LIN V Low side logic input for V phase 12 NC 13 VCC U Low voltage power supply for U phase 14 HIN U High side logic input for U phase 15 T 16 LIN U 17 Vboot U 18 P Positive DC input 19 U U phase output 20 NU Negative DC input for U phase 21 Vboot V Bootstrap voltage for V phase 22 V V phase output 23 NV Negative DC input for V phase 24 Vboot W Bootstrap voltage for W phase 25 W W phase output 26 NW Negative DC input for W phase Ground NTC thermistor terminal NTC thermistor terminal Not connected NTC thermistor terminal Low side logic input for U phase Bootstrap voltage for U phase DocID026945 Rev 1 STGIPN3H60AT Internal schematic diagram and pin configuration Figure 2. Pin layout (top view) (*) Dummy pin internally connected to P (positive DC input). DocID026945 Rev 1 5/19 19 Electrical ratings STGIPN3H60AT 2 Electrical ratings 2.1 Absolute maximum ratings Table 3. Inverter part Symbol Parameter Value Unit 600 V VCES Each IGBT collector emitter voltage (VIN(1) = 0) IC (2) Each IGBT continuous collector current at TC = 25 C 3 A ICP (3) Each IGBT pulsed collector current 18 A Each IGBT total dissipation at TC = 25 C 8 W PTOT 1. Applied between HINi, LINi and GND for i = U, V, W. 2. Calculated according to the iterative formula: Tj ( max ) - TC IC ( T C ) = ------------------------------------------------------------------------------------------------------R thj - c x V CE ( sat ) ( max ) ( T j ( max ), I C ( T C ) ) 3. Pulse width limited by max junction temperature. Table 4. Control part Symbol Parameter Min. Max. Unit Vboot -18 Vboot + 0.3 V VOUT Output voltage applied between OUTU, OUTV, OUTW - GND VCC Low voltage power supply - 0.3 18 V Vboot Bootstrap voltage - 0.3 618 V Logic input voltage applied between HINi, LINi and GND for i = U, V, W - 0.3 VCC + 0.3 V 50 V/ns VIN VOUT/dT Allowed output slew rate Table 5. Total system Symbol VISO 6/19 Parameter Isolation withstand voltage applied between each pin and heatsink plate (AC voltage, t = 60 sec.) Value Unit 1000 V TJ Power chips operating junction temperature -40 to 150 C TC Module case operating temperature -40 to 125 C DocID026945 Rev 1 STGIPN3H60AT 2.2 Electrical ratings Thermal data Table 6. Thermal data Symbol RthJA Parameter Thermal resistance junction-ambient DocID026945 Rev 1 Value Unit 50 C/W 7/19 19 Electrical characteristics 3 STGIPN3H60AT Electrical characteristics Tj = 25 C unless otherwise specified. Table 7. Inverter part Symbol VCE(sat) ICES VF Parameter Test conditions Min. Typ. Max. VCC = Vboot = 15 V, VIN(1)= 0 - 5 V, IC = 1 A - 2.15 2.6 VCC = Vboot = 15 V, VIN(1)= 0 - 5 V, IC = 1 A, TJ = 125 C - 1.65 Collector-cut off current (VIN(1)= 0 "logic state") VCE = 550 V, VCC = VBoot = 15 V - 250 A Diode forward voltage VIN(1) = 0 "logic state", IC = 1 A - 1.7 V Collector-emitter saturation voltage Unit V Inductive load switching time and energy ton tc(on) toff tc(off) trr Turn-on time Crossover time (on) Turn-off time Crossover time (off) Reverse recovery time Eon Turn-on switching losses Eoff Turn-off switching losses VDD = 300 V, VCC = Vboot = 15 V, VIN(1) = 0 - 5 V, IC = 1 A (see Figure 4) - 275 - 90 - 890 - 125 - 50 - 18 - 13 ns J 1. Applied between HINi, LINi and GND for i = U, V, W (LIN inputs are active-low). Note: tON and tOFF include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are the switching time of IGBT itself under the internally given gate driving condition. Figure 3. Switching time test circuit INPUT BOOT Lin BUS VBOOT>VCC HVG L Hin VCC OUT Vcc IC LVG VCE GND 0 8/19 DocID026945 Rev 1 1 STGIPN3H60AT Electrical characteristics Figure 4. Switching time definition 100% IC 100% IC t rr IC VCE VCE IC VIN VIN t ON t OFF t C(OFF) t C(ON) VIN(ON) VIN(OFF) 10% IC 90% IC 10% VCE 10% VCE (a) turn-on 3.1 10% IC (b) turn-off AM09223V1 Control part Table 8. Low voltage power supply (VCC = 15 V unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit VCCthON Undervoltage turn-on threshold 9.1 9.6 10.1 V VCCthOFF Undervoltage turn-off threshold 7.9 8.3 8.8 V Undervoltage hystereses 0.9 VCChys V Iqccu Undervoltage quiescent supply current VCC < 7.9 V 250 330 A Iqcc Quiescent current VCC = 15 V 350 450 A DocID026945 Rev 1 9/19 19 Electrical characteristics STGIPN3H60AT Table 9. Bootstrapped voltage (VCC = 15 V unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit Undervoltage turn-on threshold 8.5 9.5 10.5 V Vboot_thOFF Undervoltage turn-off threshold 7.2 8.3 9.2 V Vboot_thON Vboothys Iqboot RDS(on) Undervoltage hystereses 0.9 V Quiescent current 250 Bootstrap driver on-resistance VCC > 12.5 V A 125 Table 10. Logic inputs (VCC = 15 V unless otherwise specified) (1) Symbol Parameter Test conditions Vil Low level logic input voltage Vih High level logic input voltage Iil Low level logic input current VIN (2) = 0 Iih High level logic input current (1) Dt Dead time Min. Typ. Max. Unit 1.1 VIN = 15 V V 1.8 V -1 A 20 70 320 A ns 1. See Figure 5: Dead time and interlocking definition. 2. Applied between HINi, LINi and GND for i = U, V, W Figure 5. Dead time and interlocking definition H IN DT DT LVG DT Interlocking function LIN HVG AM03794v1 10/19 DocID026945 Rev 1 STGIPN3H60AT 3.1.1 Electrical characteristics NTC thermistor Table 11. NTC thermistor Symbol Parameter Test conditions Min. Typ. Max. Unit. R25 Resistance T = 25 C 85 k R100 Resistance T = 100 C 5388 B B-constant T = 25 C to 100 C 4092 K T Operating temperature -25 125 C Equation 1: resistance variation vs. temperature R ( T ) = R 25 e 1 1 B --- - ---------- T 298 Where T are temperatures in Kelvins Figure 6. NTC resistance vs. temperature NTC [k] 3.500 3.000 2.500 2.000 1.500 1.000 Max Min 500 0 -40 Typ -20 0 20 40 60 DocID026945 Rev 1 80 100 120 140 [C] GIPD17220131349FSR 11/19 19 Electrical characteristics STGIPN3H60AT Figure 7. NTC resistance vs. temperature (zoom) NTC [k] 40 35 30 25 20 15 10 Max Min Typ 5 0 50 12/19 70 90 DocID026945 Rev 1 110 130 150[C] GIPD17220131350FSR 0,&52&21752// //(5 DocID026945 Rev 1 9&& 9& '= 5 +,1: : &YFF 5 &27 &2 /,1: : 7HPS PS PRQ PRQLWRULQJ 527 52 5 +,19 9 9'' 9' 5 /,19 9 5 +,18 8 9 9 9 5 *1B*1 *1 ' 6*1 & & & & & & & & & *1' *1' 7 9FF FF: +,1: /,1: 7 1& 1& 1& 1& 9FF FF9 +,19 /,19 1& 1& 9FF FF8 +,18 7 /,18 17& *1' 9&& +,1 /,1 *1' 9&& +,1 /,1 *1' 9&& +,1 /,1 /9* 287 +9* 9ERR ERRW /9* 287 +9* 9ERR ERRW /9* 287 +9* 9ERR ERRW WR0&8 0&8 2S 2SDPS 1: : 28 287: 9ERR ERRW: 19 9 28 2879 9ERR ERRW9 18 8 28 2878 3 9ERR ERRW8 &6) &6 &ERRW: &ERR W: &ERRW9 &ERR W9 &ERRW8 &ERR W8 56) 56 & & & '= '= '= 3: 5B*1' 5VKXQ KXQW 0 & &YGF 9'& 9' 4 /,18 8 STGIPN3H60AT Application information Application information Figure 8. Typical application circuit 13/19 19 Application information 4.1 STGIPN3H60AT Recommendations * Input signals HIN, LIN are active-high logic. A 500 k (typ.) pull-down resistor is built-in for each input. To prevent input signal oscillation, the wiring of each input should be as short as possible and the use of RC filters (R1, C1) on each input signal is suggested. The filters should be done with a time constant of about 100ns and must be placed as close as possible to the IPM input pins. * The bypass capacitor Cvcc (aluminum or tantalum) is recommended to reduce the transient circuit demand on the power supply. In addition, a decoupling capacitor C2 (from 100 to 220 nF, ceramic with low ESR) is suggested, to reduce high frequency switching noise distributed on the power supply lines. It must be placed as close as possible to each Vcc pin and in parallel to the bypass capacitor. * The use of RC filter (RSF, CSF) for current monitoring is recommended to improve noise immunity. The filter must be placed as close as possible to the microcontroller or to the Op-amp. * The decoupling capacitor C3 (from 100 to 220 nF, ceramic with low ESR), in parallel to each Cboot, is recommended in order to filter high frequency disturbances. * The Zener diodes DZ1 between the Vcc pins and GND and in parallel to each Cboot is suggested in order to prevent overvoltage. * The decoupling capacitor C4 (from 100 to 220 nF, ceramic with low ESR) in parallel to the electrolytic capacitor Cvdc is recommended, in order to prevent surge destruction. Both capacitors C4 and Cvdc should be placed as close as possible to the IPM (C4 has priority over Cvdc). * By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals without an opto-coupler is possible. * Low inductance shunt resistors should be used for phase leg current sensing * In order to avoid malfunctions, the wiring between N pins, the shunt resistor and PWR_GND should be as short as possible. * It is recommended to connect SGN_GND to PWR_GND at only one point (near the terminal of shunt resistor), in order to avoid any malfunction due to power ground fluctuation. Table 12. Recommended operating conditions Symbol 14/19 Test conditions Min. VPN Supply voltage Applied between P-Nu, Nv, Nw VCC Control supply voltage Applied between VCCGND VBS High side bias voltage Applied between VBOOTiOUTi for i = U, V, W 11.5 tdead Blanking time to prevent Arm-short For each input signal 1.5 fPWM PWM input signal -40C < Tc < 100C -40C < Tj < 125C TC Note: Parameter Case operation temperature For further details refer to AN4043. DocID026945 Rev 1 12 Typ. Max. Unit 300 500 V 15 17 V 17 V s 25 kHz 100 C STGIPN3H60AT Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 9. NDIP-26L drawing D3 b,b2 A1 PIN 1 BASE METAL SECTION F-F&G-G b D1 F e F A3 A4 c c1 A2 WITH PLATING A 0.075 b1,b3 PIN 16 D PIN 17 L PIN 26 0.075 E eB2 PIN#1 ID eB1 5 Package mechanical data PIN 1 PIN 16 D2 b2 e1 PIN 26 PIN 17 G G 8278949B DocID026945 Rev 1 15/19 19 Package mechanical data STGIPN3H60AT Table 13.NDIP-26L mechanical data mm. Dim. Min. Typ. A 4.40 A1 0.80 1.00 1.20 A2 3.00 3.10 3.20 A3 1.70 1.80 1.90 A4 5.70 5.90 6.10 b 0.53 b1 0.52 b2 0.83 b3 0.82 c 0.46 c1 0.45 0.50 0.55 D 29.05 29.15 29.25 D1 0.50 0.77 1.00 D2 0.35 0.53 0.70 0.72 0.60 0.68 1.02 0.90 0.98 0.59 D3 16/19 Max. 29.55 E 12.35 12.45 12.55 e 1.70 1.80 1.90 e1 2.40 2.50 2.60 eB1 16.10 16.40 16.70 eB2 21.18 21.48 21.78 L 1.24 1.39 1.54 DocID026945 Rev 1 STGIPN3H60AT Package mechanical data AN T IS T AT IC S 03 P VC AM10474v1 Figure 10. NDIP-26L tube dimensions (dimensions are in mm.) 8313150_A Note: Base quantity 17 pcs, bulk quantity 476 pcs. DocID026945 Rev 1 17/19 19 Revision history 6 STGIPN3H60AT Revision history Table 14. Document revision history 18/19 Date Revision 30-Sep-2014 1 Changes Initial release. DocID026945 Rev 1 STGIPN3H60AT IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. 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