EMIF02-MIC02F2 (R) 2 LINES EMI FILTER INCLUDING ESD PROTECTION IPADTM MAIN PRODUCT CHARACTERISTICS: Where EMI filtering in ESD sensitive equipment is required: Mobile phones and communication systems Computers, printers and MCU Boards DESCRIPTION The EMIF02-MIC02 is a highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF02 flip chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV. Flip-Chip (6 Bumps) Table 1: Order Code Part Number EMIF02-MIC02F2 BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Lead free package Very low PCB space consuming: 1.07mm x 1.57mm Very thin package: 0.65 mm High efficiency in ESD suppression High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. Figure 1: Pin Configuration (Ball side) COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 Level 4 on input pins 15kV (air discharge) 8kV (contact discharge) Level 1 on output pins 2kV 2kV Marking FJ 3 2 1 I2 GND I1 A O2 GND O1 B (air discharge) (contact discharge) Figure 2: Basic Cell Configuration Low-pass Filter Input Output Ri/o = 470 Cline = 16pF GND GND GND TM: IPAD is a trademark of STMicroelectronics. October 2004 REV. 1 1/7 EMIF02-MIC02F2 Table 2: Absolute Ratings (limiting values) Symbol Tj Parameter and test conditions Value Unit 125 C Maximum junction temperature Top Operating temperature range - 40 to + 85 C Tstg Storage temperature range - 55 to + 150 C Table 3: Electrical Characteristics (Tamb = 25C) Symbol Parameter I VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between Input & Output Cline Input capacitance per line Symbol IPP VCL VBR VRM IRM IR IR = 1 mA IRM VRM = 12V per line Min. Typ. 14 16 423 RI/O Cline VRM VBR VCL V IPP Test conditions VBR IR IRM 470 Max. Unit V 500 nA 517 16 @ 0V Figure 3: S21 (dB) attenuation measurement and Aplac simulation - 10.00 dB - 15.00 pF Figure 4: Analog crosstalk measurements -20.00 dB --30.00 - 20.00 Measurement I2/O1 --40.00 - 25.00 - 30.00 --50.00 - 35.00 --60.00 - 40.00 --70.00 - 45.00 Simulation - 50.00 1.0M 2/7 3.0M 10.0M 30.0M 100.0M f/Hz 300.0M 1.0G 3.0G --80.00 1.0M 3.0M 10.0M 30.0M 100.0M f/Hz 300.0M 1.0G 3.0G EMIF02-MIC02F2 Figure 5: Digital crosstalk measurement Figure 6: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout) Figure 7: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout) Figure 8: Line capacitance versus applied voltage C(pF) 20 F=1MHz Vosc=30mVRMS Tj=25C 18 16 14 12 10 8 6 4 2 VR(V) 0 0 1 2 3 4 5 6 7 8 9 10 11 12 3/7 EMIF02-MIC02F2 Figure 9: Aplac model I1 Cox MODEL = D01-int gnd O1 R_470R Cox 50pH MODEL = D01-ext Rsubump Rsubump 50pH 50m 50m Lgnd Lgnd MODEL = D01-gnd gnd Rsubump Rsubump Cgnd MODEL = D01-ext Cox MODEL = D01-int Cox I2 Cgnd Rgnd O2 R_470R Figure 10: Aplac parameters Model D01-ext BV = 7 CJO = Cz_ext IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_ext VJ = 0.6 TT = 50n Model D01-int BV = 7 CJO = Cz_int IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_int VJ = 0.6 TT = 50n Model D01-gnd BV = 7 CJO = Cz_gnd IBV = 1u IKF = 1000 IS = 10f ISR = 100p N=1 M = 0.3333 RS = Rs_gnd VJ = 0.6 TT = 50n Ls 400pH Rs 100m R_470R 482.6 Cz_ext 8.73pF Rs_ext 850m Cz_int 2.9pF Rs_int 850m Cz_gnd 215.61pF Rs_gnd 470m Rgnd 10m Lgnd 48pH Cgnd 0.15pF Cox 3.05pF Rsubump 200m 4/7 Rgnd EMIF02-MIC02F2 Figure 11: Ordering Information Scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip-Chip x = 1: 500m, Bump = 315m = 2: Leadfree Pitch = 500m, Bump = 315m = 3: Leadfree Pitch = 400m, Bump = 250m Figure 12: FLIP-CHIP Package Mechanical Data 315m 50 650m 65 1.57mm 50m 500m 50 500m 50 1.07mm 50m Figure 13: Foot print recommendations Solder stencil opening : 330m Dot, ST logo xx = marking z = packaging location yww = datecode (y = year ww = week) 365 240 365 Copper pad Diameter : 250m recommended , 300m max Figure 14: Marking E 220 x x z y ww 40 Solder mask opening recommendation : 340m min for 300m copper pad diameter All dimensions in m 5/7 EMIF02-MIC02F2 Figure 15: FLIP-CHIP Tape and Reel Specification Dot identifying Pin A1 location 1.75 +/- 0.1 O 1.5 +/- 0.1 4 +/- 0.1 3.5 +/- 0.1 ST E xxz yww ST E xxz yww ST E xxz yww 8 +/- 0.3 0.73 +/- 0.05 4 +/- 0.1 User direction of unreeling All dimensions in mm Table 4: Ordering Information Ordering code Marking Package Weight Base qty Delivery mode EMIF02-MIC02F2 FJ Flip-Chip 2.3 mg 5000 Tape & reel 7" Note: More informations are available in the application notes: AN1235: "Flip-Chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements" Table 5: Revision History 6/7 Date Revision 12-Oct-2004 1 Description of Changes First issue EMIF02-MIC02F2 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. 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