1
®
INA118
A
1
A
2
A
3
6
60kΩ60kΩ
60kΩ60kΩ
7
4
3
8
1
2
V
IN
V
IN
R
G
V+
V–
INA118
Ref
V
O
G = 1 + 50kΩ
R
G
–
+5
Over-Voltage
Protection
25kΩ
25kΩ
Over-Voltage
Protection
FEATURES
●LOW OFFSET VOLTAGE: 50µV max
●LOW DRIFT: 0.5µV/°C max
●LOW INPUT BIAS CURRENT: 5nA max
●HIGH CMR: 110dB min
●INPUTS PROTECTED TO ±40V
●WIDE SUPPLY RANGE: ±1.35 to ±18V
●LOW QUIESCENT CURRENT: 350µA
●8-PIN PLASTIC DIP, SO-8
DESCRIPTION
The INA118 is a low power, general purpose instru-
mentation amplifier offering excellent accuracy. Its
versatile 3-op amp design and small size make it ideal
for a wide range of applications. Current-feedback
input circuitry provides wide bandwidth even at high
gain (70kHz at G = 100).
A single external resistor sets any gain from 1 to 10,000.
Internal input protection can withstand up to ±40V
without damage.
The INA118 is laser trimmed for very low offset voltage
(50µV), drift (0.5µV/°C) and high common-mode re-
jection (110dB at G = 1000). It operates with power
supplies as low as ±1.35V, and quiescent current is only
350µA—ideal for battery operated systems.
The INA118 is available in 8-pin plastic DIP,
and SO-8 surface-mount packages, specified for
the –40°C to +85°C temperature range.
Precision, Low Power
INSTRUMENTATION AMPLIFIER
®
INA118
APPLICATIONS
●BRIDGE AMPLIFIER
●THERMOCOUPLE AMPLIFIER
●RTD SENSOR AMPLIFIER
●MEDICAL INSTRUMENTATION
●DATA ACQUISITION
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
INA118
INA118
©1994 Burr-Brown Corporation PDS-1199D Printed in U.S.A. April, 1998
SBOS027
2
®
INA118
INPUT
Offset Voltage, RTI
Initial TA = +25°C±10 ± 50/G ±50 ± 500/G ±25 ±100/G ±125±1000/G µV
vs Temperature TA = TMIN to TMAX ±0.2 ± 2/G ±0.5 ± 20/G ±0.2 ± 5/G ±1 ± 20/G µV/°C
vs Power Supply VS = ±1.35V to ±18V ±1 ±10/G ±5 ± 100/G ✻±10 ±100/G µV/V
Long-Term Stability ±0.4 ±5/G ✻µV/mo
Impedance, Differential 1010 || 1 ✻Ω || pF
Common-Mode 1010 || 4 ✻Ω || pF
Linear Input Voltage Range (V+) – 1 (V+) – 0.65 ✻✻ V
(V–) + 1.1 (V–) + 0.95 ✻✻ V
Safe Input Voltage ±40 ✻V
Common-Mode Rejection VCM = ±10V, ∆RS = 1kΩ
G = 1 80 90 73 ✻dB
G = 10 97 110 89 ✻dB
G = 100 107 120 98 ✻dB
G = 1000 110 125 100 ✻dB
BIAS CURRENT ±1±5✻±10 nA
vs Temperature ±40 ✻pA/°C
OFFSET CURRENT ±1±5✻±10 nA
vs Temperature ±40 ✻pA/°C
NOISE VOLTAGE, RTI G = 1000, RS = 0Ω
f = 10Hz 11 ✻nV/√Hz
f = 100Hz 10 ✻nV/√Hz
f = 1kHz 10 ✻nV/√Hz
fB = 0.1Hz to 10Hz 0.28 ✻µVp-p
Noise Current
f=10Hz 2.0 ✻pA/√Hz
f=1kHz 0.3 ✻pA/√Hz
fB = 0.1Hz to 10Hz 80 ✻pAp-p
GAIN
Gain Equation 1 + (50kΩ/RG)✻V/V
Range of Gain 1 10000 ✻✻V/V
Gain Error G = 1 ±0.01 ±0.024 ✻±0.1 %
G = 10 ±0.02 ±0.4 ✻±0.5 %
G = 100 ±0.05 ±0.5 ✻±0.7 %
G = 1000 ±0.5 ±1✻±2%
Gain vs Temperature G = 1 ±1±10 ✻±10 ppm/°C
50kΩ Resistance(1) ±25 ±100 ✻✻ppm/°C
Nonlinearity G = 1 ±0.0003 ±0.001 ✻±0.002 % of FSR
G = 10 ±0.0005 ±0.002 ✻±0.004 % of FSR
G = 100 ±0.0005 ±0.002 ✻±0.004 % of FSR
G = 1000 ±0.002 ±0.01 ✻±0.02 % of FSR
OUTPUT
Voltage: Positive RL = 10kΩ(V+) – 1 (V+) – 0.8 ✻✻ V
Negative RL = 10kΩ(V–) + 0.35 (V–) + 0.2 ✻✻ V
Single Supply High
VS = +2.7V/0V(2), RL = 10kΩ
1.8 2.0 ✻✻ V
Single Supply Low
VS = +2.7V/0V(2), RL = 10kΩ
60 35 ✻✻ mV
Load Capacitance Stability 1000 ✻pF
Short Circuit Current +5/–12 ✻mA
FREQUENCY RESPONSE
Bandwidth, –3dB G = 1 800 ✻kHz
G = 10 500 ✻kHz
G = 100 70 ✻kHz
G = 1000 7 ✻kHz
Slew Rate VO = ±10V, G = 10 0.9 ✻V/µs
Settling Time, 0.01% G = 1 15 ✻µs
G = 10 15 ✻µs
G = 100 21 ✻µs
G = 1000 210 ✻µs
Overload Recovery 50% Overdrive 20 ✻µs
POWER SUPPLY
Voltage Range ±1.35 ±15 ±18 ✻✻ ✻V
Current VIN = 0V ±350 ±385 ✻✻µA
TEMPERATURE RANGE
Specification –40 85 ✻✻°C
Operating –40 125 ✻✻°C
θ
JA 80 ✻°C/W
INA118PB, UB INA118P, U
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
SPECIFICATIONS
ELECTRICAL
At TA = +25°C, VS = ±15V, RL = 10kΩ unless otherwise noted.
✻ Specification same as INA118PB, UB.
NOTE: (1) Temperature coefficient of the “50kΩ” term in the gain equation. (2) Common-mode input voltage range is limited. See text for discussion of low power supply
and single power supply operation.
3
®
INA118
PIN CONFIGURATION
8-Pin DIP and SO-8
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION
PACKAGE
DRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER(1) RANGE
INA118P 8-Pin Plastic DIP 006 –40°C to +85°C
INA118PB 8-Pin Plastic DIP 006 –40°C to +85°C
INA118U SO-8 Surface-Mount 182 –40°C to +85°C
INA118UB SO-8 Surface-Mount 182 –40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
Supply Voltage .................................................................................. ±18V
Analog Input Voltage Range ............................................................. ±40V
Output Short-Circuit (to ground).............................................. Continuous
Operating Temperature ..................................................–40°C to +125°C
Storage Temperature .....................................................–40°C to +125°C
Junction Temperature.................................................................... +150°C
Lead Temperature (soldering, 10s)............................................... +300°C
ABSOLUTE MAXIMUM RATINGS
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
R
G
V
–IN
V
+IN
V–
R
G
V+
V
O
Ref
1
2
3
4
8
7
6
5
Top View
4
®
INA118
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE
Output Voltage (V)
Common-Mode Voltage (V)
0
5
4
3
2
1
012345
G = 1 G = 2
G ≥ 10
V
D/2
–
+
–
+
V
CM
V
O
V
D/2
INA118Ref
+5V
Single Supply
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, unless otherwise noted.
GAIN vs FREQUENCY
60
50
40
30
20
10
0
–10
–20
Gain (dB)
Frequency (Hz)
1k 10k 100k 1M 10M
G = 100
G = 10
G = 1
G = 1000
COMMON-MODE REJECTION vs FREQUENCY
Frequency (Hz)
Common-Mode Rejection (dB)
1 10 1k 100k100
140
120
100
80
60
40
20
010k
G=1
G=10
G=100
G=1000
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE
Output Voltage (V)
Common-Mode Voltage (V)
–15 –10 0 5 15–5
15
10
5
0
–5
–10
–15 10
All
Gains All
Gains
G = 1 G = 1
G ≥ 10 G ≥ 10
V
D/2
–
+
–
+
V
CM
V
O
V
D/2
INA118Ref
–15V
+15V
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE
Output Voltage (V)
Common-Mode Voltage (V)
–5
5
4
3
2
1
0
–1
–2
–3
–4
–5 –4 –3 –2 –1 0 1 2 3 4 5
All
Gains All
Gains
G = 1 G = 1
G ≥ 10 G ≥ 10
V
D/2
–
+
–
+
V
CM
V
O
V
D/2
INA118Ref
–5V
+5V
INPUT COMMON-MODE RANGE
vs OUTPUT VOLTAGE
Output Voltage (V)
Common-Mode Voltage (V)
0
3
2
1
0123
G = 1
G ≥ 10
VD/2 –
+
–
+
VCM
VO
VD/2 INA118Ref
+3V
Single Supply
5
®
INA118
POSITIVE POWER SUPPLY REJECTION
vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
160
140
120
100
80
60
40
20
01 10 100 1k 10k 100k
G = 1000
G = 100
G = 10
G = 1
INPUT BIAS CURRENT
vs INPUT OVERLOAD VOLTAGE
10
8
6
4
2
0
–2
–4
–6
–8
–10
Input Bias Current (mA)
Overload Voltage (V)
–40 0 40
G = 1
G = 1
G = 1000
G = 1000
QUIESCENT CURRENT and SLEW RATE
vs TEMPERATURE
Temperature (°C)
Quiescent Current (µA)
500
400
300
200–75 –50 –25 0 25 50 75 100 125
1.5
1
0.5
0
Slew Rate (V/µs)
Slew Rate
I
Q
V
S
= ±15V
V
S
= ±1.35V
SETTLING TIME vs GAIN
Gain (V/V)
Settling Time (µs)
1000
100
10 1 10 100 1000
0.01%
0.1%
R
L
= 10kΩ
C
L
= 100pF
INPUT- REFERRED NOISE VOLTAGE
vs FREQUENCY
Frequency (Hz)
Input-Referred Noise Voltage (nV/√ Hz)
110 1k100
1k
100
10
110k
G = 1
G = 10
100
10
1
0.1
Input Bias Current Noise (pA/√ Hz)
Current Noise
(All Gains)
G = 100, 1000
G = 1000 BW Limit
NEGATIVE POWER SUPPLY REJECTION
vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
160
140
120
100
80
60
40
20
010 100 1k 10k 100k
G = 1000
G = 100
G = 10
G = 1
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
6
®
INA118
MAXIMUM OUTPUT SWING vs FREQUENCY
32
28
24
20
16
12
8
4
0100 1k 10k 100k 1M
Frequency (Hz)
Peak-to-Peak Output Voltage (V)
G = 10, 100
G = 1
G = 1000
OUTPUT CURRENT LIMIT vs TEMPERATURE
16
14
12
10
8
6
4
2
0–75 –50 –25 0 25 50 75 100 125
Temperature (°C)
Short Circuit Current (mA)
–|I
CL
|
+|I
CL
|
OUTPUT VOLTAGE SWING
vs POWER SUPPLY VOLTAGE
V+
(V+) –0.2
(V+) –0.4
(V+) –0.6
(V+) –0.8
(V+) –1
(V–) +0.4
(V–) +0.2
V– 0 ±5 ±10 ±15 ±20
Positive
+85°C +25°C
–40°C
Negative +85°C
+25°C
–40°C
Power Supply Voltage (V)
R
L
= 10kΩ
Output Voltage Swing (V)
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
01234
Output Current (mA)
Output Voltage Swing (V)
V+
(V+) –0.4
(V+) –0.8
(V–)+0.8
(V–)+0.4
V–
Positive
Negative
V
S
≤ ±5V
V
S
= ±15V
Single Power Supply, V– = 0V
Ground-Referred Load
INPUT BIAS AND OFFSET CURRENT
vs TEMPERATURE
5
4
3
2
1
0
–1
–2
–3
–4
–5–75 –50 –25 0 25 50 75 100 125
Temperature (°C)
Input Bias and Offset Current (nA)
I
OS
±I
b
OFFSET VOLTAGE vs WARM-UP TIME
10
8
6
4
2
0
–2
–4
–6
–8
–10 00.5 1.0 1.5 2.0 2.5 3.0
Time from Power Supply Turn On (ms)
Offset Voltage Change (µV)
G = 1000
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
7
®
INA118
THD + N vs FREQUENCY
1
0.1
0.01
0.001 20 100 1k 10k 20k
Frequency (Hz)
THD + N (%)
R
L
= 10kΩ
R
L
= ∞
(Noise Floor)
G = 10
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
0.1µV/div
1s/div
G = 1
G = 10
G = 100
G = 1000
G = 1
G = 10
G = 100
G = 1000
20mV/div
100µs/div
20mV/div
10µs/div
5V/div
100µs/div
5V/div
100µs/div
INPUT-REFERRED NOISE, 0.1Hz to 10Hz
SMALL-SIGNAL RESPONSE
SMALL-SIGNAL RESPONSE
LARGE-SIGNAL RESPONSE
LARGE-SIGNAL RESPONSE
8
®
INA118
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the INA118. Applications with noisy or high impedance
power supplies may require decoupling capacitors close to
the device pins as shown.
The output is referred to the output reference (Ref) terminal
which is normally grounded. This must be a low-impedance
connection to assure good common-mode rejection. A resis-
tance of 12Ω in series with the Ref pin will cause a typical
device to degrade to approximately 80dB CMR (G = 1).
SETTING THE GAIN
Gain of the INA118 is set by connecting a single external
resistor, RG, connected between pins 1 and 8:
Commonly used gains and resistor values are shown in
Figure 1.
The 50kΩ term in Equation 1 comes from the sum of the two
internal feedback resistors of A1 and A2. These on-chip
metal film resistors are laser trimmed to accurate absolute
values. The accuracy and temperature coefficient of these
resistors are included in the gain accuracy and drift specifi-
cations of the INA118.
(1)
G=1+50kΩ
R
G
FIGURE 1. Basic Connections.
DESIRED RGNEAREST 1% RG
GAIN (Ω)(Ω)
1NC NC
2 50.00k 49.9k
5 12.50k 12.4k
10 5.556k 5.62k
20 2.632k 2.61k
50 1.02k 1.02k
100 505.1 511
200 251.3 249
500 100.2 100
1000 50.05 49.9
2000 25.01 24.9
5000 10.00 10
10000 5.001 4.99
NC: No Connection.
The stability and temperature drift of the external gain
setting resistor, RG, also affects gain. RG’s contribution to
gain accuracy and drift can be directly inferred from the gain
equation (1). Low resistor values required for high gain can
make wiring resistance important. Sockets add to the wiring
resistance which will contribute additional gain error (possi-
bly an unstable gain error) in gains of approximately 100 or
greater.
DYNAMIC PERFORMANCE
The typical performance curve “Gain vs Frequency” shows
that, despite its low quiescent current, the INA118 achieves
wide bandwidth, even at high gain. This is due to the
current-feedback topology of the INA118. Settling time also
remains excellent at high gain.
The INA118 exhibits approximately 3dB peaking at 500kHz
in unity gain. This is a result of its current-feedback topol-
ogy and is not an indication of instability. Unlike an op amp
with poor phase margin, the rise in response is a predictable
+6dB/octave due to a response zero. A simple pole at
300kHz or lower will produce a flat passband unity gain
response.
A
1
A
2
A
3
6
60kΩ60kΩ
60kΩ60kΩ
7
4
3
8
1
2
V
IN
V
IN
R
G
V+
V–
INA118
G = 1 + 50kΩ
R
G
–
+5
Over-Voltage
Protection
25kΩ
25kΩ
Over-Voltage
Protection
Load
V
O
= G • (V
IN
– V
IN
)
+–
0.1µF
0.1µF
+
–
V
O
R
G
Also drawn in simplified form:
INA118
Ref
V
O
V
IN
–
V
IN
+
Ref
9
®
INA118
INA118
47kΩ47kΩ
INA118
10kΩ
Microphone,
Hydrophone
etc.
Thermocouple
INA118
Center-tap provides
bias current return.
NOISE PERFORMANCE
The INA118 provides very low noise in most applications.
For differential source impedances less than 1kΩ, the INA103
may provide lower noise. For source impedances greater
than 50kΩ, the INA111 FET-Input Instrumentation Ampli-
fier may provide lower noise.
Low frequency noise of the INA118 is approximately
0.28µVp-p measured from 0.1 to 10Hz (G≥100). This pro-
vides dramatically improved noise when compared to state-
of-the-art chopper-stabilized amplifiers.
OFFSET TRIMMING
The INA118 is laser trimmed for low offset voltage and
drift. Most applications require no external offset adjust-
ment. Figure 2 shows an optional circuit for trimming the
output offset voltage. The voltage applied to Ref terminal is
summed at the output. The op amp buffer provides low
impedance at the Ref terminal to preserve good common-
mode rejection.
FIGURE 2. Optional Trimming of Output Offset Voltage.
INPUT BIAS CURRENT RETURN PATH
The input impedance of the INA118 is extremely high—
approximately 1010Ω. However, a path must be provided for
the input bias current of both inputs. This input bias current
is approximately ±5nA. High input impedance means that
this input bias current changes very little with varying input
voltage.
Input circuitry must provide a path for this input bias current
for proper operation. Figure 3 shows various provisions for
an input bias current path. Without a bias current path, the
inputs will float to a potential which exceeds the common-
mode range of the INA118 and the input amplifiers will
saturate.
If the differential source resistance is low, the bias current
return path can be connected to one input (see the thermo-
couple example in Figure 3). With higher source impedance,
using two equal resistors provides a balanced input with
possible advantages of lower input offset voltage due to bias
current and better high-frequency common-mode rejection.
INPUT COMMON-MODE RANGE
The linear input voltage range of the input circuitry of the
INA118 is from approximately 0.6V below the positive
supply voltage to 1V above the negative supply. As a
differential input voltage causes the output voltage to in-
crease, however, the linear input range will be limited by the
output voltage swing of amplifiers A1 and A2. Thus, the
linear common-mode input range is related to the output
voltage of the complete amplifier. This behavior also de-
pends on supply voltage—see performance curves “Input
Common-Mode Range vs Output Voltage”.
Input-overload can produce an output voltage that appears
normal. For example, if an input overload condition drives
both input amplifiers to their positive output swing limit, the
difference voltage measured by the output amplifier will be
near zero. The output of the INA118 will be near 0V even
though both inputs are overloaded.
LOW VOLTAGE OPERATION
The INA118 can be operated on power supplies as low as
±1.35V. Performance of the INA118 remains excellent with
power supplies ranging from ±1.35V to ±18V. Most param-
eters vary only slightly throughout this supply voltage range—
see typical performance curves. Operation at very low sup-
ply voltage requires careful attention to assure that the input
voltages remain within their linear range. Voltage swing
requirements of internal nodes limit the input common-
mode range with low power supply voltage. Typical perfor-
mance curves, “Input Common-Mode Range vs Output
Voltage” show the range of linear operation for a various
supply voltages and gains.
FIGURE 3. Providing an Input Common-Mode Current Path.
10kΩ
OPA177
±10mV
Adjustment Range
100Ω
100Ω
100µA
1/2 REF200
100µA
1/2 REF200
V+
V–
R
G
INA118
Ref
V
O
V
IN
–
V
IN
+
10
®
INA118
V
D
/2
V
D
/2
V
CM
10µAV
B
10µA
A
2
A
1
C
1
C
2
60kΩ
60kΩ
60kΩ
60kΩ
A
3
V
O
Ref
R
2
25kΩ
R
1
25kΩR
G
(External)
Q
2
Q
1
V
IN
V
IN
A
1
Out = V
CM
– V
BE
– (10µA • 25kΩ) – V
O
/2
A
2
Out = V
CM
– V
BE
– (10µA • 25kΩ) + V
O
/2
Output Swing Range A
1
, A
2
; (V+) – 0.65V to (V–) + 0.06V
Amplifier Linear Input Range: (V+) – 0.65V to (V–) + 0.98V
–
V
O
= G • (V
IN
– V
IN
)
+–+–
+
Input Bias Current
Compensation
Output Swing Range:
(V+) – 0.8V to (V–) + 0.35V
SINGLE SUPPLY OPERATION
The INA118 can be used on single power supplies of +2.7V
to +36V. Figure 5 shows a basic single supply circuit. The
output Ref terminal is connected to ground. Zero differential
input voltage will demand an output voltage of 0V (ground).
Actual output voltage swing is limited to approximately
35mV above ground, when the load is referred to ground as
shown. The typical performance curve “Output Voltage vs
Output Current” shows how the output voltage swing varies
with output current.
With single supply operation, VIN and VIN must both be
0.98V above ground for linear operation. You cannot, for
instance, connect the inverting input to ground and measure
a voltage connected to the non-inverting input.
To illustrate the issues affecting low voltage operation,
consider the circuit in Figure 5. It shows the INA118,
operating from a single 3V supply. A resistor in series with
the low side of the bridge assures that the bridge output
voltage is within the common-mode range of the amplifier’s
inputs. Refer to the typical performance curve “Input Com-
mon-Mode Range vs Output Voltage” for 3V single supply
operation.
INPUT PROTECTION
The inputs of the INA118 are individually protected for
voltages up to ±40V. For example, a condition of –40V on
one input and +40V on the other input will not cause
damage. Internal circuitry on each input provides low series
impedance under normal signal conditions. To provide
equivalent protection, series input resistors would contribute
excessive noise. If the input is overloaded, the protection
circuitry limits the input current to a safe value of approxi-
mately 1.5 to 5mA. The typical performance curve “Input
Bias Current vs Input Overload Voltage” shows this input
current limit behavior. The inputs are protected even if the
power supplies are disconnected or turned off.
FIGURE 4. INA118 Simplified Circuit Diagram.
INSIDE THE INA118
Figure 1 shows a simplified representation of the INA118.
The more detailed diagram shown here provides addi-
tional insight into its operation.
Each input is protected by two FET transistors that
provide a low series resistance under normal signal con-
ditions, preserving excellent noise performance. When
excessive voltage is applied, these transistors limit input
current to approximately 1.5 to 5mA.
The differential input voltage is buffered by Q1 and Q2
and impressed across RG, causing a signal current to flow
through RG, R1 and R2. The output difference amp, A3,
removes the common-mode component of the input sig-
nal and refers the output signal to the Ref terminal.
Equations in the figure describe the output voltages of A1
and A2. The VBE and IR drop across R1 and R2 produce
output voltages on A1 and A2 that are approximately 1V
lower than the input voltages.
+–
11
®
INA118
FIGURE 9. ECG Amplifier With Right-Leg Drive.
FIGURE 8. Differential Voltage to Current Converter.
A1IB Error
OPA177 ±1.5nA
OPA602 ±1pA
OPA128 ±75fA
FIGURE 5. Single-Supply Bridge Amplifier.
FIGURE 6. AC-Coupled Instrumentation Amplifier.
SEEBECK
ISA COEFFICIENT
TYPE MATERIAL (µV/°C) R1, R2
E + Chromel 58.5 66.5kΩ
– Constantan
J + Iron 50.2 76.8kΩ
– Constantan
K + Chromel 39.4 97.6kΩ
– Alumel
T + Copper 38.0 102kΩ
– Constantan
FIGURE 7. Thermocouple Amplifier With Cold Junction
Compensation.
300Ω
+3V
150Ω
R
1 (1)
2V – ∆V
2V + ∆V
NOTE: (1) R
1
required to create proper common-mode voltage,
onl
y
for low volta
g
e operation — see text.
3V
R
G
INA118 V
O
Ref
INA118
R
G
V
O
C
1
0.1µF
OPA602
Ref R
1
1MΩ
f
–3dB
= 1
2πR
1
C
1
= 1.59Hz
V
IN
+
–
REF102
R
2
R
1
R
3
Pt100
Cu
Cu
V+
K
6
10.0V
4
2
INA118 V
O
Ref
100Ω = RTD at 0°C
R
G
INA118
RG
IB
R1
VIN
–
+
A1 IO
Load
IO = • G
VIN
R1
Ref
INA118
R
G
/2 V
O
LA
RL
RA
10kΩ
Ref G = 102.8kΩ
2.8kΩ
1/2
OPA2604
390kΩ
390kΩ
1/2
OPA2604
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
INA118P ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
INA118PB ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
INA118PBG4 ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
INA118PG4 ACTIVE PDIP P 8 50 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
INA118U ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA118U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA118U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA118UB ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA118UB/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA118UB/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA118UBG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA118UG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Apr-2009
Addendum-Page 1
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Apr-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
INA118U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
INA118UB/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA118U/2K5 SOIC D 8 2500 346.0 346.0 29.0
INA118UB/2K5 SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 2
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