SN74S1053 16-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS017A - SEPTEMBER 1990 - REVISED AUGUST 1997 D D D D DW OR N PACKAGE (TOP VIEW) Designed to Reduce Reflection Noise Repetitive Peak Forward Current to 200 mA 16-Bit Array Structure Suited for Bus-Oriented Systems Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs VCC D01 D02 D03 D04 D05 D06 D07 D08 GND description This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device consists of a 16-bit high-speed Schottky diode array suitable for clamping to VCC and/or GND. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC D16 D15 D14 D13 D12 D11 D10 D09 GND The SN74S1053 is characterized for operation from 0C to 70C. schematic diagrams D01 2 D02 3 D03 4 D04 5 D05 6 D06 7 D07 8 D08 9 D09 12 D10 13 10 GND 11 GND D11 14 D12 15 D13 16 D14 17 D15 18 D16 19 VCC 1 VCC 20 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN74S1053 16-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS017A - SEPTEMBER 1990 - REVISED AUGUST 1997 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Steady-state reverse voltage, VR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Continuous forward current, IF: Any D terminal from GND or to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Total through all GND or VCC terminals . . . . . . . . . . . . . . . . . . . . . . . 170 mA Repetitive peak forward current, IFRM: Any D terminal from GND or VCC . . . . . . . . . . . . . . . . . . . . . 200 mA Total through all GND or VCC terminals . . . . . . . . . . . . . . . . . . 1.2 A Continuous total power dissipation at (or below) 25C free-air temperature (see Note 1) . . . . . . . . . . 625 mW Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. These values apply for tw 100 s, duty cycle 20%. NOTE 1: For operation above 25C free-air temperature, derate linearly at the rate of 5 m/W/C. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) single-diode operation (see Note 2) TYP MAX To VCC IF = 18 mA IF = 50 mA 0.85 1.05 1.05 1.3 From GND IF = 18 mA IF = 50 mA 0.75 0.95 0.95 1.2 IF = 200 mA 1.45 PARAMETER VF VFM TEST CONDITIONS Static forward voltage Peak forward voltage IR Static reverse current Ct Total capacitance To VCC MIN VR = 0 V, VR = 2 V, V V 5 VR = 7 V From GND UNIT 5 f = 1 MHz 8 16 f = 1 MHz 4 8 A pF All typical values are at VCC = 5 V, TA = 25C. NOTE 2: Test conditions and limits apply separately to each of the diodes. The diodes not under test are open-circuited during the measurement of these characteristics. multiple-diode operation PARAMETER Ix Internal crosstalk current TEST CONDITIONS MIN TYP MAX Total IF current = 1 A, See Note 3 0.8 2 Total IF current = 198 mA, See Note 3 0.02 0.2 TYP MAX 8 16 UNIT mA All typical values are at VCC = 5 V, TA = 25C. NOTE 3: Ix is measured under the following conditions with one diode static, and all others switching: Switching diodes: tw = 100 s, duty cycle = 20% Static diode: VR = 5 V The static diode input current is the internal crosstalk current Ix. switching characteristics, TA = 25C (see Figures 1 and 2) PARAMETER trr 2 Reverse recovery time TEST CONDITIONS IF = 10 mA, IRM(REC) = 10 mA, POST OFFICE BOX 655303 IR(REC) = 1 mA, * DALLAS, TEXAS 75265 MIN RL = 100 UNIT ns SN74S1053 16-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS017A - SEPTEMBER 1990 - REVISED AUGUST 1997 PARAMETER MEASUREMENT INFORMATION 50 (See Note A) 450 Pulse Generator Sampling Oscilloscope (See Note B) DUT 90% VFM VF Output Waveform (See Note B) Input Pulse (See Note A) 10% tr NOTES: A. The input pulse is supplied by a pulse generator having the following characteristics: tr = 20 ns, ZO = 50 , freq = 500 Hz, duty cycle = 1%. B. The output waveform is monitored by an oscilloscope having the following characteristics: tr 350 ps, Ri = 50 , Ci 5 pF. Figure 1. Forward Recovery Voltage DUT (See Note A) Pulse Generator IF Sampling Oscilloscope If tf 10% (See Note B) trr 0 Output Waveform (See Note B) IR(REC) Input Pulse (See Note A) 90% IRM(REC) NOTES: A. The input pulse is supplied by a pulse generator having the following characteristics: tf = 0.5 ns, ZO = 50 , tw 50 ns, duty cycle = 1%. B. The output waveform is monitored by an oscilloscope having the following characteristics: tr 350 ps, Ri = 50 , Ci 5 pF. Figure 2. Reverse Recovery Time POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN74S1053 16-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS017A - SEPTEMBER 1990 - REVISED AUGUST 1997 APPLICATION INFORMATION Large negative transients occurring at the inputs of memory devices (DRAMs, SRAMs, EPROMs, etc.) or on the CLOCK lines of many clocked devices can result in improper operation of the devices. The SN74S1053 diode termination array helps suppress negative transients caused by transmission-line reflections, crosstalk, and switching noise. Diode terminations have several advantages when compared to resistor termination schemes. Split resistor or Thevenin equivalent termination can cause a substantial increase in power consumption. The use of a single resistor to ground to terminate a line usually results in degradation of the output high level, resulting in reduced noise immunity. Series damping resistors placed on the outputs of the driver reduce negative transients, but they also can increase propagation delays down the line, as a series resistor reduces the output drive capability of the driving device. Diode terminations have none of these drawbacks. The operation of the diode arrays in reducing negative transients is explained in the following figures. The diode conducts current when the voltage reaches a negative value large enough for the diode to turn on. Suppression of negative transients is tracked by the current-voltage characteristic curve for that diode. Typical current versus voltage curves for the SN74S1053 are shown in Figures 3 and 4. To illustrate how the diode arrays act to reduce negative transients at the end of a transmission line, the test setup in Figure 5 was evaluated. The resulting waveforms with and without the diode are shown in Figure 6. The maximum effectiveness of the diode arrays in suppressing negative transients occurs when the diode arrays are placed at the end of a line and/or the end of a long stub branching off a main transmission line. The diodes also can be used to reduce the negative transients that occur due to discontinuities in the middle of a line. An example of this is a slot in a backplane that is provided for an add-on card. DIODE FORWARD CURRENT vs DIODE FORWARD VOLTAGE -100 TA = 25C -90 I I - Forward Current - mA -80 -70 -60 -50 -40 -30 -20 -10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 VI - Forward Voltage - V Figure 3. Typical Input Current vs Input Voltage (Lower Diode) 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74S1053 16-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS017A - SEPTEMBER 1990 - REVISED AUGUST 1997 DIODE FORWARD CURRENT vs DIODE FORWARD VOLTAGE 100 TA = 25C 90 I I - Forward Current - mA 80 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 VI - Forward Voltage - V Figure 4. Typical Input Current vs Input Voltage (Upper Diode) POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SN74S1053 16-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY SDLS017A - SEPTEMBER 1990 - REVISED AUGUST 1997 APPLICATION INFORMATION ZO = 50 Length = 36 in. Figure 5. Diode Test Setup 56.500 ns 31.500 ns End-ofLine Without Diode 81.500 ns End-of-Line With Diode Vmarker 1 Vmarker 2 Ch 2 Timebase Memory 1 Vmarker 1 Vmarker 2 Offset = 0.000 V Delay = 56.500 ns Delta V = -2.293 V = 1.880 V/div = 5.00 ns/V = 1.880 V/div = -1.353 V = -3.647 V Figure 6. Oscilloscope Display 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 28-May-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74S1053DBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74S1053NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74S1053NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053PW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053PWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74S1053PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 28-May-2007 retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74S1053DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74S1053DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74S1053NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74S1053PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74S1053DBR SN74S1053DWR SSOP DB 20 2000 367.0 367.0 38.0 SOIC DW 20 2000 367.0 367.0 45.0 SN74S1053NSR SO NS 20 2000 367.0 367.0 45.0 SN74S1053PWR TSSOP PW 20 2000 367.0 367.0 38.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. 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