LT1166 Power Output Stage Automatic Bias System FEATURES DESCRIPTION Set Class AB Bias Currents nn Eliminates Adjustments nn Eliminates Thermal Runaway of I Q nn Corrects for Device Mismatch nn Simplifies Heat Sinking nn Programmable Current Limit nn May Be Paralleled for Higher Current nn Small SO-8 or PDIP Package The LT(R)1166 is a bias generating system for controlling class AB output current in high powered amplifiers. When connected with external transistors, the circuit becomes a unity-gain voltage follower. The LT1166 is ideally suited for driving power MOSFET devices because it eliminates all quiescent current adjustments and critical transistor matching. Multiple output stages using the LT1166 can be paralleled to obtain higher output current. nn Thermal runaway of the quiescent point is eliminated because the bias system senses the current in each power transistor by using a small external sense resistor. A high speed regulator loop controls the amount of drive applied to each power device. The LT1166 can be biased from a pair of resistors or current sources and because it operates on the drive voltage to the output transistors, it operates on any supply voltage. APPLICATIONS Biasing Power MOSFETs High Voltage Amplifiers nn Shaker Table Amplifiers nn Audio Power Amplifiers nn nn L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and C-Load is a trademark of Analog Devices, Inc. All other trademarks are the property of their respective owners. TYPICAL APPLICATION R1 100 47 2N2907 1 ITOP = 15mA VTOP 5.6k 4.3k 2 SENSE 3 ILIM- SENSE- 6 220F IRF530 4 IBOTTOM = 15mA 1F RSENSE+ 0.33 1F 1k RSENSE- 0.33 R3 100 47 0V OUTPUT 0V VOUT 1 IRF9530 1166 * TA01 300pF 2N2222 INPUT 1k 5 VBOTTOM MPS2222 + 300pF 7 VIN LT1166 VOUT R4 100 R2 100 + 8 ILIM+ VIN Unity Gain Buffer Amp Driving 1 Load 15V -15V + MPS2907 220F 1166 * F01 Figure 1. Unity Gain Buffer with Current Limit 1166fa For more information www.linear.com/LT1166 1 LT1166 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW Supply Current (Pin 1 or Pin 4)...............................75mA Differential Voltage (Pin 2 to Pin 3)............................6V Output Short-Circuit Duration (Note 1).......... Continuous Specified Temperature Range (Note 2)......... 0C to 70C Operating Temperature Range..................-40C to 85C Storage Temperature Range................... -65C to 150C Junction Temperature (Note 3).............................. 150C Lead Temperature (Soldering, 10 sec).................... 300C ORDER INFORMATION 8 SENSE + 7 ILIM + VOUT 3 6 ILIM - VBOTTOM 4 5 SENSE - VTOP 1 +1 VIN 2 N8 PACKAGE S8 PACKAGE 8-LEAD PDIP 8-LEAD PLASTIC SO TJMAX = 150C, JA = 100C/W (N8) TJMAX = 150C, JA = 150C/W (S8) http://www.linear.com/product/LT1166#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT1166CN8#PBF LT1166CN8#TRPBF 1166 8-LEAD PDIP 0C to 70C LT1166CS8#PBF LT1166CS8#TRPBF 1166 8-LEAD PLASTIC SO 0C to 70C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Pin 1 = 2V, Pin 4 = - 2V, Operating current 15mA and RIN = 20k, unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS Output Offset Voltage Operating Current 15mA to 50mA l 50 250 mV Input Bias Current Operating Current 15mA to 50mA (Note 4) l 2 10 A Input Resistance Operating Current 15mA to 50mA (Note 5) l 2 15 M VAB (Top) Measure Pin 8 to Pin 3, No Load 14 20 26 mV VAB (Bottom) Measure Pin 5 to Pin 3, No Load -14 -20 -26 mV Voltage Compliance Operating Current = 50mA (Notes 6, 9) l 2 10 V Current Compliance Operating Voltage = 2V l 4 50 mA Transconductance gmCC2 gmEE2 gmCC10 gmEE10 (Note 7) Pin 1 = 2V, Pin 4 = -2V Pin 1 = 2V, Pin 4 = -2V Pin 1 = 10V, Pin 4 = -10V Pin 1 = 10V, Pin 4 = -10V l l l l 0.08 0.08 0.09 0.09 0.13 0.13 0.16 0.16 mho mho mho mho 0.100 0.100 0.125 0.125 PSRRCC (Note 8) 19 dB PSRREE (Note 8) 19 dB Current Limit Voltage Operating Current 15mA to 50mA Pin 7 Voltage to Pin 3 Pin 6 Voltage to Pin 3 l l 1.0 -1.0 1.3 -1.3 1.5 -1.5 V V 1166fa 2 For more information www.linear.com/LT1166 LT1166 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Commercial grade parts are designed to operate over the temperature range of - 40C to 85C but are neither tested nor guaranteed beyond 0C to 70C. Industrial grade parts specified and tested over -40C and 85C are available on special request, consult factory. Note 3: TJ calculated from the ambient temperature TA and the power dissipation PD according to the following formulas: LT1166CN8: TJ = TA + (PD * 100C/W) LT1166CS8: TJ = TA + (PD * 150C/W) Note 4: ITOP = IBOTTOM Note 5: The input resistance is typically 15M when the loop is closed. When the loop is open (current limit) the input resistance drops to 200 referred to Pin 3. Note 6: Maximum TJ can be exceeded with 50mA operating current and simultaneous 10V and -10V (20V total). Note 7: Apply 200mV to Pin 2 and measure current change in Pin 1 and 4. Pin 3 is grounded. Note 8: PSRRCC = gmCC2 - gmCC10 gmCC2 PSRREE = gmEE2 - gmEE10 gmEE2 Note 9: For Linear Operation, Pin 1 must not be less than 2V or more than 10V from Pin 3. Similarly, Pin 4 must not be less than 2V or more than 10V from Pin 3. TYPICAL PERFORMANCE CHARACTERISTICS Output Offset Voltage vs Current Source Mismatch 150 INPUT BIAS CURRENT (A) 100 50 ITOP = IBOTTOM = 50mA 0 ITOP = IBOTTOM = 4mA -50 -100 OUTPUT OFFSET VOLTAGE (mV) 800 600 Output Offset Voltage vs Temperature 60 ITOP = IBOTTOM = 50mA RIN = 20k 400 200 0 RIN = 2k -200 -400 -600 -150 2.5 5.0 7.5 -10 -7.5 -5.0 -2.5 0 CURRENT SOURCE MISMATCH (%) -800 -1.0 -0.75 -0.5 -0.25 0 0.25 0.5 0.75 1.0 ITOP AND IBOTTOM MISMATCH (mA) 10 LT1166 * TPC01 2.8 8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 LT1166 * TPC04 40 35 50 25 75 0 TEMPERATURE (C) 6 4 2 0 30 RIN = 4.3k C1 = C2 = 500pF RL = 10 SEE FIGURE 8 RL = 25 RL =10 20 15 RTOP = RBOTTOM = 1k 10 5 0 -5 ITOP = IBOTTOM = 12mA -6 -10 -8 -15 -10 -10 -8 -6 -4 -2 0 2 4 INPUT VOLTAGE (V) 125 Open-Loop Voltage Gain vs Frequency -2 -4 100 LT1166 * TPC03 10 RL = ITOP = IBOTTOM = 15mA RIN = 4.3k 45 30 -50 -25 GAIN (dB) 2.9 RL = ITOP = IBOTTOM = 15mA RIN = 4.3k 50 Output Voltage vs Input Voltage OUTPUT VOLTAGE SWING (V) 3.0 55 LT1166 * TPC02 Input Bias Current vs Temperature INPUT BIAS CURRENT (A) OUTPUT OFFSET VOLTAGE (mV) Input Bias Current vs Current Source Mismatch 6 8 10 LT1166 * TPC05 VS = 15V RIN = 4.3k ITOP = IBOTTOM = 12mA C1 = C2 = 500pF SEE FIGURE 8 -20 0.001 0.01 0.1 1 FREQUENCY (MHz) 10 LT1166 * TPC06 1166fa For more information www.linear.com/LT1166 3 LT1166 TYPICAL PERFORMANCE CHARACTERISTICS Voltage Across Sense Resistors vs Temperature RL = 0 RL =10 GAIN (dB) -1 -2 -3 -4 VS = 15V RIN = 4.3k ITOP = IBOTTOM = 12mA C1 = C2 = 500pF SEE FIGURE 8 -5 -6 -7 -8 0.001 0.01 0.1 1 FREQUENCY (MHz) 10 24 22 SENSE + 20 18 16 -16 -20 -24 -50 -25 10 0.080 gmCC VIN = 200mV RL = 0 RIN = 0 -0.080 -0.090 125C gmEE - 55C -0.100 25C -0.110 -0.120 TOTAL HARMONIC DISTORTION (%) INPUT TRANSCONDUCTANCE (mhos) - 55C 0 1 2 1.15 50 25 0 75 TEMPERATURE (C) 100 125 3 4 5 6 7 8 SUPPLY VOLTAGE (V) 9 10 LT1166 * TPC10 PIN 6 TO PIN 3 -1.25 -50 -25 50 0 75 25 TEMPERATURE (C) 1000 RL = 10 PO = 1W SEE FIGURE 8 1 0.1 0.01 0.01 0.1 100 1 10 FREQUENCY (kHz) LT1166 * TPC11 125 100 LT1166 * TPC09 Total Harmonic Distortion vs Frequency 25C 0.090 PIN 7 TO PIN 3 LT1166 * TPC08 0.120 125C 1.20 -1.20 SENSE - -22 Input Transconductance vs Supply Voltage 0.100 VIN = 1.5V -1.15 -18 LT1166 * TPC07 0.110 1.25 SENSE PIN VOLTAGE REFERENCED TO VOUT (mV) 1 Current Limit Pin Voltage vs Temperature ILIM PIN VOLTAGE REFERENCED TO VOUT (V) 2 VOLTAGE DROP ACROSS SENSE RESISTORS (mV) Closed-Loop Voltage Gain vs Frequency Sense Pin Voltage Referenced to VOUT vs Load Current VBOTTOM VTOP 100 10 RSENSE = 100 1 10 8 6 4 2 SINKING 0 2 4 6 8 SOURCING LOAD CURRENT (mA) 10 LT1166 * TPC12 1166fa 4 For more information www.linear.com/LT1166 LT1166 PIN FUNCTIONS VTOP (Pin 1): Pin 1 establishes the top side drive voltage for the output transistors. Operating supply current enters Pin 1 and a portion biases internal circuitry; Pin 1 current should be greater than 4mA. Pin 1 voltage is internally clamped to 12V with respect to VOUT and the pin current should be limited to 75mA maximum. VIN (Pin 2): Pin 2 is the input to a unity gain buffer which drives VOUT (Pin 3). During a fault condition (short-circuit) the input impedance drops to 200 and the input current must be limited to 5mA or VIN to VOUT limited to less than 6V. VOUT (Pin 3): Pin 3 of the LT1166 is the output of a voltage control loop that maintains the output voltage at the input voltage. VBOTTOM (Pin 4): Pin 4 establishes the bottom side drive voltage for the output transistors. Operating supply current exits this pin; Pin 4 current should be greater than 4mA. Pin 4 voltage is internally clamped to -12V with respect to VOUT and the pin current should be limited to 75mA maximum. SENSE- (Pin 5): The Sense- pin voltage is established by the current control loop and it controls the output quiescent current in the bottom side power device. Limit the maximum differential voltage between Pin 5 and Pin 3 to 6V during fault conditions. ILIM- (Pin 6): The negative side current limit, limits the voltage at VBOTTOM to VOUT during a negative fault condition. The maximum reverse voltage on Pin 6 with respect to VOUT is 6V. ILIM+ (Pin 7): The positive side current limit, limits the voltage at VTOP to VOUT during a positive fault condition. The maximum reverse voltage on Pin 7 with respect to VOUT is -6V. SENSE+ (Pin 8): The Sense+ pin voltage is established by the current control loop and it controls the output quiescent current in the top side power device. Limit the maximum differential voltage between Pin 8 and Pin 3 to 6V during fault conditions. 1166fa For more information www.linear.com/LT1166 5 LT1166 APPLICATIONS INFORMATION Overvoltage Protection The supplies VTOP (Pin 1) and VBOTTOM (Pin 4) have clamp diodes that turn on when they exceed 12V. These diodes act as ESD protection and serve to protect the LT1166 when used with large power MOS devices that produce high VGS voltage. Current into Pin 1 or Pin 4 should be limited to 75mA maximum. Multiplier Operation Figure 2 shows the current multiplier circuit internal to the LT1166 and how it works in conjunction with power output transistors. The supply voltages VT (top) and VB (bottom) of the LT1166 are set by the required "on" voltage of the power devices. A reference current IREF sets a constant VBE7 and VBE8. This voltage is across emitter base of Q9 and Q10 which are 1/10 the emitter area of Q7 and Q8. The expression for this current multiplier is: VBE7 + VBE8 = VBE9 + VBE10 or in terms of current: (IC9)(IC10) = (IREF)2/100 = Constant The product of IC9 and IC10 is constant. These currents are mirrored and set the voltage on the (+) inputs of a pair of RT 1k VTOP 1 internal op amps. The feedback of the op amps force the same voltage on the (-) inputs and these voltages then appear on the sense resistors in series with the power devices. The product of the two currents in the power devices is constant, as one increases the other decreases. The excellent logging nature of Q9 and Q10 allows this relation to hold over many decades in current. The total current in Q7 and Q8 is actually the sum of IREF and a small error current from the shunt regulator. During high output current conditions the error current from the regulator decreases. Current conducted by the regulator also decreases allowing VT or VB to increase by an amount needed to drive the power devices. Driving the Input Stage Figure 3 shows the input transconductance stage of the LT1166 that provides a way to drive VT and VB. When a positive voltage VIN is applied to RIN, a small input current flows into R2 and the emitter of Q2. This effect causes VO to follow VIN within the gain error of the amplifier. The input current is then mirrored by Q3/Q4 and current supplied to Q4's collector is sourced by power device M1. The signal current in Q4's emitter is absorbed by external resistor RB and this causes VB to rise by the same amount V+ M1 VTOP IREF SHUNT REGULATOR - IREF 10 VAB+ 1 + Q9 x1 Q7 x 10 Q10 x1 Q1 1 VO RIN 1k + VAB- 1 - R1 Q11 R2 Q12 2 3 VIN 4 M2 RB 1k 1 V- CEXT2 Q3 x1 VBOTTOM 4 M2 RB 1k V- 1166 * F03 1166 * F02 Figure 2. Constant Product Generator VO Q2 5 Q4 x 32 VBOTTOM M1 CEXT1 1k 3 Q8 x 10 1 V+ Q5 x1 Q6 x 32 8 RT 1k Figure 3. Input Stage Driving Gates 1166fa 6 For more information www.linear.com/LT1166 LT1166 APPLICATIONS INFORMATION as VIN. Similarly for VT, when positive voltage is applied to RIN, current that was flowing in R1 and Q1 is now supplied through RIN. This effect reduces the current in mirror Q5/ Q6. The reduced current has the effect of reducing the drop on RT, and VT rises to make VO track VIN. The open-loop voltage gain VO/(VIN - VPIN2) can be increased by replacing RT and RB with current sources. The effect of this is to increase the voltage gain VOUT/ VIN from approximately 0.8 to 1 (see Typical Performance Characteristics curves). The use of current sources instead of resistors greatly increases loop gain and this compensates for the nonlinearity of the output stage resulting in much lower distortion. Frequency Compensation and Stability The input transconductance is set by the input resistor RIN and the 32:1 current mirrors Q3/Q4 and Q5/Q6. The resistors R1 and R2 are small compared to the value of RIN. Current in RIN appears 32 times larger in Q4 or Q6, which drive external compensation capacitors CEXT1 and CEXT2. These two input signal paths appear in parallel to give an input transconductance of: gm = 16/RIN The gain bandwidth is: GBW = 16 2(RIN)(CEXT) Depending on the speed of the output devices, typical values are RIN = 4.3k and CEXT1 = CEXT2 = 500pF giving a - 3dB bandwidth of 1.2MHz (see Typical Performance Characteristics curves). To prevent instability it is important to provide good supply bypassing as shown in Figure 1. Large supply bypass capacitors (220F) and short power leads can eliminate instabilities at these high current levels. The 100 resistors (R2 and R3) in series with the gates of the output devices stop oscillations in the 100MHz region as do the 100 resistors R1 and R4 in Figure 1. Driving Capacitive Loads Ideally, amplifiers have enough phase margin that they don't oscillate but just slow down with capacitive loads. Practically, amplifiers that drive significant power require some isolation from heavy capacitive loads to prevent oscillation. This isolation is normally an inductor in series with the output of the amplifier. A 1H inductor in parallel with a 10 resistor is sufficient for many applications. Setting Output AB Bias Current Setting the output AB quiescent current requires no adjustments. The internal op amps force VAB = 20mV between each Sense (Pins 5 and 8) to the Output (Pin 3). At quiescent levels the output current is set by: IAB = 20mV/RSENSE The LT1166 does not require a heat sink or mounting on the heat sink for thermal tracking. The temperature coefficient of VAB is approximately 0.3%/C and is set by the junction temperature of the LT1166 and not the temperature of the power transistors. Output Offset Voltage and Input Bias Current The output offset voltage is a function of the value of RIN and the mismatch between external current sources ITOP and IBOTTOM (see the Typical Performance Characteristics curves). Any error in ITOP and IBOTTOM match is reduced by the 32:1 input current mirror, but is multiplied by the input resistor RIN. Current Limit The voltage to activate the current limit is 1.3V. The simplest way to protect the output transistors is to connect the Current Limit pins 6 and 7 to the Sense pins 5 and 8. A current limit of 1.3A can be set by using 1 sense resistors. To keep the current limit circuit from oscillating in hard limit, it is necessary to add an RC (1k and 1F) between the Sense pin and the ILIM as shown in Figure 1. The sense resistors can be tapped up or down to increase or decrease the current limit without changing AB bias current in the power transistors. Figure 4 demonstrates 1166fa For more information www.linear.com/LT1166 7 LT1166 APPLICATIONS INFORMATION how tapping the sense resistors gives twice the limit current or one half the limit current. Foldback current limit can be added to the normal or "square" current limit by including two resistors (30k typical) from the power supplies to the ILIM pins as shown in Figure 5. With square current limit the maximum output current is independent of the voltage across the power devices. Foldback limit simply makes the output current dependent on output voltage. This scheme puts dissipation limits on the output devices. The larger the voltage across the power device, the lower the available output current. This is represented in Figure 6, Output Voltage vs Output Current for the circuit of Figure 5. V+ 200 160 VTOP 8 SENSE + 7 ILIM + (2)(ILIM) 0.5 RIN VIN 0.5 2 3 VIN LT1166 VOUT ILIM VOUT (1/2)(ILIM) 1 5 SENSE - VBOTTOM 15V 20mA 30k 100 IRFR024 1 SENSE + ILIM + 5.1k 2 VIN LT1166 VOUT ILIM - SENSE - 8 1k 7 3 6 1F 10 mA 1F 1k VOUT 10 5 VBOTTOM 4 330pF 0 -40 FOLDBACK ILIM- -80 -160 SQUARE ILIM- -200 -10 -8 -6 -4 -2 0 2 4 6 OUTPUT VOLTAGE (V) 8 10 Driving the Shunt Regulator 1166 * F04 Figure 4. Tapping Current Limit Resistors VTOP FOLDBACK ILIM+ Figure 6. Output Current vs Output Voltage V- 330pF 40 LT1166 * F06 4 + SQUARE ILIM+ 80 -120 1 6 - OUTPUT CURRENT (mA) 120 1 100 20mA IRFR9024 30k It is possible to current drive the shunt regulator directly without driving the input transconductance stage. This has the advantage of higher speed and eliminates the need to compensate the gm stage. With Pin 2 floating, the LT1166 can be placed inside a feedback loop and driven through the biasing current sources. The input transconductance stage remains biased but has no effect on circuit operation. The RL in Figure 7 is used to modulate the op amp supply current with input signal. This op amp functions as a V-to-I with the supply leads acting as current source outputs. The load resistor and the positive input of the op amp are connected to the output of the LT1166 for feedback to set AV = 1V/V. The capacitor CF eliminates output VOS due to mismatch between ITOP and IBOTTOM, and it also forms a pole at DC and a zero at 1/RFCF. The zero frequency is selected to give a -1V/V gain in the op amp before the phase of the MOSFETs degenerate the stability of the loop. -15V 1166 * F05 Figure 5. Unity Gain Buffer Amp with Foldback Current Limit 1166fa 8 For more information www.linear.com/LT1166 LT1166 APPLICATIONS INFORMATION APPLICATION CIRCUITS Bipolar Buffer Similar to the unity gain buffer in Figure 1, the LT1166 can be used to bias bipolar transistors as shown in Figure 8. The minimum operating voltage for the LT1166 is 2V, so it is necessary to bias the part with adequate voltage from the output stage. The simplest way to do this is to use Darlington drivers and series diodes. There are no thermal tracking circuits or adjustments necessary and the LT1166 does not need to be mounted on the heat sink with the power devices. RTOP and RBOTTOM can be used to replace ITOP and IBOTTOM; see Typical Characteristics curves. 15V 2N2907 + 47 100 RTOP 2N2907 ITOP = 15mA V+ 500pF IT 100 M1 SENSE + RF VIN RIN SENSE + ILIM - 2 + + VIN LT1166 VOUT ILIM - RL ILIM 8 VIN 7 3 6 4.7k VIN LT1166 VOUT ILIM - SENSE - 5 VOUT 1 VOUT 150 500pF 2N2222 IB 2N2907 IBOT = 15mA 100 V- 10 IN4001 100 2N2222 M2 1 TIP30 VBOTTOM 5 1 3 6 1 VBOTTOM 4 7 150 2 4 SENSE - + RBOTTOM + VTOP IN4001 8 TIP29 1 CF 2N2222 1 VTOP 5.6k 220F 47 220F 1166 * F08 1166 * F07 Figure 7. Current Source Drive -15V Figure 8. Bipolar Buffer Amp 1166fa For more information www.linear.com/LT1166 9 LT1166 APPLICATIONS INFORMATION Adding Voltage Gain loop of the LT1360 so the gain error and the VOS are reduced and the closed-loop gain is 10V/V. The circuit in Figure 9 adds voltage gain to the circuit in Figure 1. At low frequency the LT1166 is in the feedback + 110 LT1004-2.5 15V 440F MPS2907 5.1k 15mA 100 300pF VT 0.1F 3 VIN 1k 2 SENSE + 7 LT1360 - 6 39k 2 LT1166 1k 1F 3 VOUT VIN 8 7 ILIM + + SENSE - 0.1F 1F 6 ILIM - 0.33 VOUT 4 CF 500pF IRF530 1 0.33 1 1k 5 VBOT 4 5.1k 100 IRF9530 15mA MPS2222 300pF LT1004 2.5 110 -15V 909 100 440F 1166 * F09 + 500pF Figure 9. Power Op Amp AV = 10 INPUT 0V OUTPUT 0V INPUT 0V OUTPUT 0V 1166 * F10 Figure 10. Power Amp Driving 1 Load 1166 * F11 Figure 11. Power Amp at 6A Current Limit 1166fa 10 For more information www.linear.com/LT1166 LT1166 APPLICATIONS INFORMATION 1A Adjustable Voltage Reference common mode voltage to its output. The following applications utilize amplifiers operating in suspended-supply operation (Figure 13). See "Linear Technology Magazine" Volume IV Number 2 for a discussion of suspended supplies. The gain setting resistors used in suspended-supply operation must be tight tolerance or the gain will be wrong. For example: with 1% resistors the gain can be as far off as 75%, but with 0.1% resistors that error is cut to less than 5%. Using the values shown in Figure 13, the formula for computing the gain is: The circuit in Figure 12 uses the LT1166 in a feedback loop with the LT1431 to make a voltage reference with an "attitude." This 5V reference can drive 1A and maintain 0.4% tolerance at the output. If other output voltages are desired, external resistors can be used instead of the LT1431's internal 5k resistors. HIGH VOLTAGE APPLICATION CIRCUITS In order to use op amps in high voltage applications it is necessary to use techniques that confine the amplifier's AV = R8(R9 + R10) = -11.22 (R8 * R9) - (R7 * R10) 12V 100 100 12V IRF530 1 VTOP 12V 1k 4 7 RTOP RMID 8 3 1 REF V+ COL 2k 2 5k 2.5V 8 ILIM + 7 VIN LT1166 VOUT - ILIM - 6 SENSE - VBOTTOM 5 GND FORCE 5 1F 1 1 + 5VOUT 220F 1k 100 4 LT1431 GND/SENSE- 3 1k 1F + 5k SENSE + IRF9530 100 6 1166 * F12 Figure 12. 1A, 5V Voltage Reference R8 1k IN R7 10k - OUT + R9 9.1k R10 1k 1166 * F13 Figure 13. Op Amp in Suspended-Supply Operation 1166fa For more information www.linear.com/LT1166 11 LT1166 APPLICATIONS INFORMATION Parallel Operation Parallel operation is an effective way to get more output power by connecting multiple power drivers. All that is required is a small ballast resistor to ensure current sharing between the drivers and an isolation inductor to keep the drivers apart at high frequency. In Figure 14 one power slice can deliver 6A at 100VPK, or 300W RMS into 16. The addition of another slice boosts the power output to 600W RMS into 8 and the addition of two or more drivers theoretically raises the power output to 1200W RMS into 4. Due to IR loss across the sense resistors, the FET RON resistance at 10A, and some sagging of the power supply, the circuit of Figure 14 actually delivers 350W RMS into 8. Performance photos and a THD vs frequency plot are included in Figure 15 through 18. Frequency compensation is provided by the 2k input resistor, 180H inductor and the 1nF compensation capacitors. The common node in the auxiliary power supplies is connected to amplifier output to generate the floating 15V supplies. POWER SLICE 15V + 10F R1 100 FB 2N3906 R15 390 1nF R9* 9.1k LT1004-2.5 VTOP SENSE + 8 + 7 12.5V C4 0.1F R14 1k 2 R7* 10k VIN ILIM 7 + 6 LT1360 - RIN 2k 180H VOUT VIN 3 - 6 SENSE - 5 ILIM R8* 1k VBOTTOM FB LT1004-2.5 R13 200 10F -15V C3 3300pF + DIODE BRIDGE ~ - + C7 1000F 35V + C8 1000F 35V 7815 7915 C1 1F R3 0.22 C2 R6 1F 1k R4 0.22 R17 0.22 L1** 0.4H IRF9240 1nF 2N3904 + R5 1k R11 100 4 R16 390 110V AC LT1166 4 -12.5V ~ 2 IRF230 1 R10* 1k 3 100V R2 100 -100V R12 100 POWER SLICE 15V + C5 220F 25V + C6 220F 25V -15V AUXILARY SUPPLIES 1 L3*** 1.5H 10A FAST-BLOW 1166 * F14 VOUT * 0.1% RESISTORS ** 4 TURNS T37-52 (MICROMETALS) *** 6 TURNS T80-52 (MICROMETALS) Figure 14. 350W Shaker Table Amplifier 12 For more information www.linear.com/LT1166 1166fa LT1166 APPLICATIONS INFORMATION 1166 * F15 1166 * F17 Figure 17. 2kHz Square-Wave, CL = 1F Figure 15. 0.3% THD at 10kHz, PO = 350W, RL = 8 TOTAL HARMONIC DISTORTION (%) 1.0 PO = 350W R L = 8 0.1 0.01 10 1166 * F16 100 10k 1k FREQUENCY (Hz) 100k LT1166 * F18 Figure 16. Clipping at 1kHz, RL = 8 Figure 18. THD vs Frequency 100W Audio Power Amplifier The details of a low distortion audio amplifier are shown in Figure 19. The LT1360, designated U1, was chosen for its good CMRR and is operated in suspended-supply mode at a closed-loop gain of - 26.5V/V. The 15V supplies of U1 are effectively bootstrapped by the output at point D and are generated as shown in Figure 14. A 3VP-P signal at VIN will cause an 80VPP output at point A. Resistors 7 to 10 set the gain of -26.5V/V of U1, while C1 compensates for the additional pole generated by the CMRR of U1. The rest of the circuit (point A to point D) is an ultralow distortion unity-gain buffer. The main component in the unity-gain buffer is U4 (LT1166). This controller performs two important functions, first it modifies the DC voltage between the gates of M1 and M2 by keeping the product of the voltage across R20 and R21 constant. Its secondary role is to perform current limit, protecting M1 and M2 during short-circuit. The function of U3 is to drive the gates of M1 and M2. This amplifier's real output is not point C as it appears, but rather the Power Supply pins. Current through R6 is used to modulate the supply current and thus provide drive to VTOP and VBOTTOM. Because the output impedance of U3 (through its supply pins) is very high, it is not able to drive the capacitive inputs of M1 and M2 with the combination of speed and accuracy needed to have very low distortion at 20kHz. The purposes of U2 are to drive the gate capacitance of M1 and M2 through its low output impedance and to reduce the nonlinearty of the M1 and M2 transconductance. R24, C4 set a frequency above which U2 no longer looks after U3 and U4, but just looks after itself as its gain goes through unity. R1/R2 and C2/C3 are compensation components for the CMRR feedthough. Curves showing the performance of the amplifier are shown in Figures 20 through 22. 1166fa For more information www.linear.com/LT1166 13 For more information www.linear.com/LT1166 R9* 9.6k R10* 1k 4 U1 LT1360 7 6 2 3 A * 0.1% RESISTORS ** SEE POWER SUPPLY OF FIGURE 13 C1 10pF 3 2 R7* 10k R8* 1k + VIN 7 - C4 20pF C2 470pF R2 100 6 C3 470pF 4 U2 LT1363 + R1 100 B R24 2.4k R4 1k R5 3.3k 3 2 C5 3300pF R12 100 2N3904 4 U3 LT1360 7 2N3906 R11 100 6 Figure 19. 100W Audio Amplifier LT1009-2.5 R3 10k + LT1009-2.5 - - 14 + 2 1 R17 500 15V ** ILIM + VTOP SENSE + - + - 15V ** + R14 500 4 SENSE - VBOTTOM ILIM - U4 V OUT LT1166 C7 0.01F VIN C9 0.01F C6 22F R13 30 R6 160 C R16 30 22F + C8 5 6 3 7 8 R19 1k R15 100 C11 R22 1F 1k C10 1F R18 100 -50V C14 0.1F M2 IRF9530 R21 0.22 R20 0.22 M1 IRF530 D C12 0.1F 1166 * F18 22F + C13 C15 22F R23 10 L1 1H + 50V VOUT LT1166 APPLICATIONS INFORMATION 1166fa LT1166 APPLICATIONS INFORMATION 1166 * F20 RL 8 f = 8kHz RL 8 f = 20kHz Figure 20. Square Wave Response Into 8 TOTAL HARMONIC DISTORTION (%) 0.1 1166 * F21 Figure 21. 100W 20kHz Sine Wave and Its Distortion RL = 8 POWER OUT = 100W 0.01 0.001 10 100 1k 10k FREQUENCY (Hz) 100k LT1166 * F22 Figure 22. THD vs Frequency 1166fa For more information www.linear.com/LT1166 15 LT1166 SIMPLIFIED SCHEMATIC 1 VTOP Q5 x1 Q6 x 32 IREF 8 SENSE+ - R1 200 Q11 + SHUNT REGULATOR Q1 VIN 2 IREF 10 7 ILIM+ Q7 x 10 Q9 x1 1k Q8 x 10 Q10 x1 1k 3 VOUT R2 200 Q12 6 ILIM- Q2 + - Q4 x 32 VAB + VAB - 5 SENSE- Q3 x1 4 VBOTTOM 1166 * SS 1166fa 16 For more information www.linear.com/LT1166 LT1166 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LT1166#packaging for the most recent package drawings. N Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510 Rev I) .400* (10.160) MAX 8 7 6 5 1 2 3 4 .255 .015* (6.477 0.381) .300 - .325 (7.620 - 8.255) .008 - .015 (0.203 - 0.381) ( +.035 .325 -.015 8.255 +0.889 -0.381 ) .045 - .065 (1.143 - 1.651) .065 (1.651) TYP .100 (2.54) BSC .130 .005 (3.302 0.127) .120 (3.048) .020 MIN (0.508) MIN .018 .003 (0.457 0.076) N8 REV I 0711 NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) 1166fa For more information www.linear.com/LT1166 17 LT1166 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LT1166#packaging for the most recent package drawings. S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G) .189 - .197 (4.801 - 5.004) NOTE 3 .045 .005 .050 BSC 8 .245 MIN .160 .005 .010 - .020 x 45 (0.254 - 0.508) 2 .053 - .069 (1.346 - 1.752) 0- 8 TYP .016 - .050 (0.406 - 1.270) 5 .150 - .157 (3.810 - 3.988) NOTE 3 1 RECOMMENDED SOLDER PAD LAYOUT .008 - .010 (0.203 - 0.254) 6 .228 - .244 (5.791 - 6.197) .030 .005 TYP NOTE: 1. DIMENSIONS IN 7 .014 - .019 (0.355 - 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 3 4 .004 - .010 (0.101 - 0.254) .050 (1.270) BSC SO8 REV G 0212 1166fa 18 For more information www.linear.com/LT1166 LT1166 REVISION HISTORY REV DATE DESCRIPTION A 06/17 Updated Order Information. PAGE NUMBER 2 Corrected pin numbers for U1 and U3. 14 1166fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT1166 19 LT1166 TYPICAL APPLICATION RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1010 Fast 150mA Power Buffer Ideal for Boosting Op Amp Output Current LT1105 Off-Line Switching Regulator Generate High Power Supplies LT1206 250mA/60MHz Current Feedback Amplifier C-LoadTM Op Amp with Shutdown and 900V/s Slew Rate LT1210 1A/40MHz Current Feedback Amplifier C-Load Op Amp with Shutdown and 700V/s Slew Rate LT1270A 10A High Efficiency Switching Regulator Use as Battery Boost Converter LT1360 50MHz, 800V/s Op Amp 15V, Ideal for Driving Capacitive Loads LT1363 70MHz, 800V/s Op Amp 15V, Very High Speed, C-Load 1166fa 20 LT 0617 REV A * PRINTED IN USA www.linear.com/LT1166 LINEAR TECHNOLOGY CORPORATION 1995