NS DM5446A/DM7446A DM5447A/DM7447A DM5448/DM7448 BCD-to-7-segment decoder/drivers general description This versatile series of 7-segment display drivers fulfills a wide variety of requirements for most active high (common cathode) and active low (common anode) Light Emitting Diodes (LED) or Jamp displays. Each device fully decodes a 4-bit BCD input into a number from 0 through 9 in the standard 7-segment display format, and BCD numbers above 9 inte unique patterns that verify operation. All circuits operate from a single 5.0V_ supply. The DM5446A/DM7446A has active-low, open- collector outputs that will drive segments requiring up to 40 mA of current. The outputs are capable of withstanding 30V at a maximum leakage current of 250uA. This configuration is particularly well suited for common anode L.ED displays or higher voltage lamp displays. The high sink current capability also allows this circuit to be used in the multiplex or nonmultiplex mode of display drive. In addition, the device may be used to drive logic circuits since its normalized fanout is 25. The DM5447A/DM7447A has tne same output characteristics as the DM5446A/DM7446A except that the outputs withstand 15V at a maximum Display Drivers leakage current of 250uA. Since its output configu- ration is the same as the DM5446A/DM7446A its applications will also be the same, the only restriction is that a lower voltage type display be used because of the reduced output voltage limit of 15V. The DM5448/DM7448 has active-high, passive- pull up outputs with a fanout of 4. Typical source current is 2.0 mA at an output voltage of 0.85V. The sink capability is 6.4 mA at a maximum voltage of 0.4V. It is normally used to drive logic circuits, operate high-voltage loads such as electro- luminescent displays through buffer transistors or SCR switches, and in low current common cathode Non-Multiplex LED applications. features m Lamp-test input Leading/trailing zero suppression (RBI and RBO) Blanking input that may be used to modulate Jamp intensity or inhibit output @ TTL and OTL compatible Input clamping diodes connection diagrams Dual-In-Line and Flat Package OUTPUTS Voc t a lie | 18 | 4 | ni | 2 " 0 omsa4ga/DM746A, M544 7A/0M7147A [| | 1 2 .? i | 6 7 [ c LAMP AB AB TEST OUTPUT INPUT INPUTS INPUTS: TOP VIEW Order Number DM5446AJ, DM7446AJ, DM5447AJ, DM7447AJ, DM5448J, or DM74483 See Package 17 Order Number DM5446AN, DM7446AN, DM5447AN, DM7447AN, DM5448N, or DM7448N See Package 23 Dual-In-Line and Flat Package OUTPUTS Voc f . c 16 15 14 cE) 12 u 10 0nn5408/0M7448 o o o 1 2 3 4 5 6 7 | 4 c LaMe RB RB 0 A GND stest soutrut input. | ~~ wweuTs {NPUTS TOP VIEW Order Number DM5446AW, DM7446AW, DM5447AW, DM7447AW, DM5448W or DM7448W See Package 28 6-5 SPVLNG/SPTSING VLZPVLNG/VLPVSING V9PPLWG/V9OrrSNGDM5446A/DM7446A, DM5447A/DM7447A, DM5448/DM7448 absolute maximum ratings (Note1) Operating conditions MIN MAX UNITS Supply Voltage 7.0V Supply Voltage (Vcc) Input Voltage 5.5V DM5446A, DM5447A, i 45 55 v Storage Temperature Range 65C to +150C DM5448 . Lead Temperature (Soldering, 10 seconds) 300C DM7446A, DM7447, DM7448 i 4.75 5.25 Vv Temperature (Ta) DM5446A, DM54474, DM5448 -ss +125 c OM7446A, DM7447A, DM7448 } o +70 c Output Voltage DM5446A, DM7446A 30 Vv DM5447A, DM7447A 15 Vv DM5448, DM7448 5.5 Vv Output Sink Current (per segment) DM5446A, DM7446A, 40 mA DM5447A, DM7447A 40 mA DM5448, DM7448 6.4 mA electrical characteristics (Note 2) The following is applicable to all parts. PARAMETER CONDITIONS MIN TYP MAX UNITS Logical 1" Input Voltage 2.0 Vv Logical 0 Input Votlage 0.8 Vv Logical 1 Output Voltage _ aa __ BI/RBO Node Veco = Min, lout = ~200UA 2.4 3.7 Vv Logical O Output Voltage at . = Min, lin = 8.0 mA 5 BI/RBO Node Veo = Min, lin = 8.0m 0.3 04 v Logical 1 Input Current at any Veco = Max, Vin = 2.4V 40 BA Input Except BI/RBO Node Veco = Max, Vin = 5.5V 1.0 mA Logical 0 Input Current =M Vin = 0.4 ~1.6 A (Except BI/RBO Node) Veo = Max, Vin = 0.4V m Logical 0 Input Current . = =0.4V ~4, A BI/RBO Node Vee = Max, Vin = 0 42 Output Short Circuit Current at = 4.0 A BI/RBO Node Voc = Max m Input Clamp Voltage Voc = 5.0V, Ta = 25C, ly = -12 MA 1.5 Vv output characteristics and supply current DM5446A/DM7446A, DM5447A/DM7447A (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS Logical 1 Output Voltage Outputs a through g DM5446A, DM7446A 30 Vv - = 1 = DM5447A, DM7447A Veo = Max, lout = 25084 15 Vv Logical 0 Output Voltage . = Min, | =4 A . 0.4 Vv Outputs a through g Vee 1M Tout Om o.3 Supply Current DOM5446A, DM5447A4 Ven = Max 60 85 mA DM7446A,:DM7447A4 ce 60 103 mA 6-6output characteristics and supply current DM5448/DM7448 (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS Logical 1 Output Voltage Outputs a through g DM5448, DM7448 Vec = Min, lout = 400A 2.4 3.2 Vv Logical 0 Output Voltage ona _ Outputs a through g Vec = Min, lout = 6.4 mA 0.25 0.4 v Logical 7 Load Current ona . \ _ _ Available, Outputs a through g Vee = Min, Vour = 0.85V 1.3 2.0 mA Output Short Circuit Current _ . Outputs a through g (Note 3) Veo = Max 3.0 4.0 mA Supply Current DM5448 Veo = Max 50 76 mA DM7448 eo =e 50 90 mA Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of Electrical Characteristics provides conditions for actual device operation. Note 2: Unless otherwise specified min/max limits apply across the 55C to +125C temperature range for DM5446A, DM5447A, and DM5448, and across the 0C to +70C range for DM7446A, DM7447A, and DM7448. Ali typicals are given for Voc = 5.0V and Tag = 28C. switching characteristics DM5446A/DM7446A, DM5447A/DM7447A, DM5448/DM7448 (Vcc = 5.0V, Ta = 25C) PARAMETER CONDITIONS MIN Tye MAX UNITS Propagation Delay to a Logical 0 from A Input to any Output (teag) DM5446A/DM7446A { C, = 15 pF 100 ns DM5447A/DM7447A R, = 1202 100 ns 0M5448 C_ = 15 pF, R, = 1k2 100 ns DM7448 C_ = 15 pF, Ry = 6672 100 ns Propagation Delay to a Logical 0 from RBI to any Output (tpgo} DM5446A/DM7446A C_ = 15 pF 100 ns DM5447A/DM7447A { R,_ = 1202 100 ns DM5448 CL = 15 pF, RL = 1kQ 100 ns DM7448 CL = 15 pF, R_ = 6672 : 100 ns Propagation Delay to a Logical 1 from A Input to any Output (t,,g7) DM54464/DM7446A C_ =15pF 100 ns DM5447A/DM7447A { Ry = 1202 100 ns DM5448 Cy = 15 pF, RL = 1k2 100 ns DM7448 Cy = 15 pF, Ry = 6672 100 ns Propagation Delay to a Logical 1 from RBI to any Output (tpar} DM5446A/0M7446A { C, = 15 pF 100 ns DM5447A/DM7447A R, = 1202 100 ns DM5448 C, = 15 pF, Ry = 1kQ 100 ns DM7448 CL = 15 pF, Ry = 6672 100 ns SVPLING/STPSWNG VZPPLING/VLPPrSING V9OVVLNG/V9PrPSWaDM5446A/DM7446A, DM5447A/DM7447A, DM5448/DM7448 truth tables DM5446A/DM7446A, DM5447A/DM7447A INPUTS | OUTPUTS DECIMAL OR FUNCTION LT RBI Bo Cc 8 Af BIRBO a bh e d e f g |NOTE 0 1 1 o o Go o 1 oO Q 0 0 0 QO 1 1 1 1 x 0 a o 1 1 1 oO Qo 1 1 1 1 1 z 1 x oO a 1 0 1 G o 1 QO 0 1 0 ot 1 x a 0 i 1 1 oO a o 9 1 1 0 4 1 x a 1 oO 0 1 1 oO 0 1 1 Oo o & t x 0 t 0 1 1 Qo 1 oO o 1 0 0 i 1 x 0 1 1 0 1 1 1 a Go Go Go o 7 1 x QO 1 1 1 1 0 6 o 1 1 1 1 & 1 x 1 oO 0 Q 1 0 0 o 9 o 0 oO 1 x 1 0 0 1 1 0 0 0 1 1 G Qo 10 1 x 1 Oo 1 0 1 1 1 4 G a t 0 at 1 x 1 0 1 1 1 r 1 0 0 1 1 o te 1 x 1 1 0 QO 1 1 a i 1 1 0 0 qs 1 x 1 1 oO 1 1 0 1 1 0 1 0 0 14 1 x 1 1 1 0 1 1 1 1 a 0 0 Oo 1 1 x 1 1 1 1 1 1 1 1 1 1 1 1 BI x x x x x x a 1 1 1 + 1 i 1 2 REF 1 0 0 o o 0 0 1 1 1 1 1 1 t 3 ur a x x x x x 1 oO 9 0 0 0 QO 0 4 Note 1: BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO). The blanking input (BI) must be open or held at a logical 1 when output functions 0 through 15 are desired, and the ripple-blanking input (RBI) must be open or at a logical 1 if blanking of a decimal 0 is not desired. X = input may be high or low. Note 2: When a logical 0 is applied directly to the bianking input (forced condition) all segment outputs go to a logical 1 regardless of the state of any other input condition. Note 3: When the ripple-blanking input (RBI) and inputs A, B, C, and D are at logical 0, with the lamp test input at logical 1, all segment outputs go to a logical 1 and the ripple-blanking output (RBO} goes to a logical O (response condition). Note 4: When the blanking input/ripple-blanking output (BI/RBO) is open or held at a logical 1, and a logical 0 is applied to the lamp-test input, all segment outputs go to a lagical 0. DM5448/0M7448 INPUTS OUTPUTS DECIMAL OR FUNCTION LT RBI dD c B A | BI/RBO a b c a e f g | NOTE o 1 1 oO 9 o QO 1 1 1 1 1 1 1 0 1 t 4 x 0 9 8 1 4 0 4 4 0 o 0 o 1 2 1 x 0 Qa 1 a 1 1 7 a 1 1 oO 1 3 1 x oO 0 1 1 1 1 1 1 t 0 0 1 4 1 x oO 1 oO 0 1 oO 1 1 0 Qo 1 1 5 1 x 0 1 0 1 1 t oO 1 1 0 1 i 6 1 x oO 1 1 0 1 a Qo T 1 1 1 1 7 1 x oO 1 1 1 1 1 1 1 a 0 0 QO 8 1 x 1 G o 0 1 1 1 1 1 1 1 1 9g t x 1 0 0 t 1 1 1 1 oO 0 1 1 10 1 x 1 Oo 1 QO i 0 0 O 1 1 QO 1 Ww 1 x 1 o 1 1 1 9 o 1 1 0 QO 1 42 1 x 1 1 o o 1 o 1 oO 0 oO 1 1 13, 1 x 1 1 Qa 1 1 1 0 Q 1 O 1 1 14 1 x 1 1 1 Oo 1 9 o QO 1 1 1 1 15 t x 1 1 1 1 1 0 o o 0 0 oO 0 BI x x x x x x o 0 9o oO Qa o oO 0 2 RBI 1 oO 0 o 90 0 QO oO 0 QO oO Qo 0 o 3 LT oO x x x x x 1 1 1 1 1 1 1 1 4 Note 1: BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO). The blanking input (BI) must be open or held at a logical 1 when output functions 0 through 15 are desired, and the ripple-blanking input (RBI) must be open or at a logical 1 if blanking of a decimal 0 is not desired. X = input may be high or low. Note 2: When a logical 0 is applied directly to the blanking input (forced condition) all segment outputs go to a logical 0 regardless of the state of any other input condition. Note 3: When the ripple-olanking input (RBI) and inputs A, B, C, and D are at togical 0, with the tamp test at logical 1 all segment outputs go to the logical 0 and the ripple blanking output (RBO) goes to a logical O {response condition}. Note 4: When the blanking input/ripple-blanking output (RI/RBO) is open or held at a logical 1, and a logical O is applied to the lamp-test input, alt segment outputs go to a logical 1. output display @ OUIeaS EEA EE SEGMENT vEwTineATION 9 10 " 2 3 1 15 NUMERICAL DESIGNATIONS ~ RESULTANT DISPLAYSoutput stage schematics Veo Veo OUTPUTS ouTPUTS a THROUGH g a THROUGH g AA a WV AAA DM54464/DM7446A DM5448/DM7448 DM5447,4/0M7447A ac test circuit INPUT Vcc Om I OUTPUT | [ [ 04-21 a : [ < | | Sa | TRUTH TABLE B ro oh +" GENERATOR c cho I tf 1N3064 13064 1N3064 1N3064 (SEE NOTE 1) I] wr bl o 4F-0 _ Ae 15v0 ur sf-o tl % PULSE a5y Rel V1 GENERATOR ow B/ROO a Il = (SEE NOTE 1) | LOAD CIRCUIT FOR DM5446/0M7448 Vin INPUT A TYPICAL ENPUT | emer eee View VOLTAGE WAVEFORMS (SEE MOTE 2) INPUTS B,C, OR D TYPICAL OUTPUT Vout ae tho A Input to Outputs DMS4460/0M5447A/DM5448 M7448a/DM74470/DM7448 INPUTS A, B.C, AND DMS446A/DM5447A/DM5+48 DM74464/DM7447A/0M7540 eI INFUT Vino Your OUTPUT a OMSA4BA/OMI4A6A a = Youre DMS447A/0M7447A fouTIOD 0M5448/0M7348 Your OUTPUT a Voutia foe trator ~ RBI Input to Outputs Note 4: The truth table genetator and pulse generator have the following characteristics: Vourin 2 24, Vourioy <04V, t, and ty < 10 ns, and PRR = 1.0 MHz. Note 2: inputs B, C, and D transitions occur simultaneously with or prior to input A transitions. RBI = 4.5V Note 3: C, includes probe and jig capacitance, 6-9 SPULING/8PTSING VLPPLNG/VLPTSING V9PPLING/V9PrTSIWNG