1. General description
The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A.
The 74AHC139; 74AHCT139 is a high-speed, dual 2-to-4 line decoder/demultiplexer. This
device has two independent decoders, each accepting two binary weighted inputs (nA0
and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each
decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced
HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer
application.
The 74AHC139; 74AHCT139 is identical to the HEF4556 of the HE4000B family.
2. Features
nBalanced propagation delays
nAll inputs have Schmitt-trigger actions
nInputs accept voltages higher than VCC
nInput levels:
uFor 74AHC139: CMOS level
uFor 74AHCT139: TTL level
nESD protection:
uHBM EIA/JESD22-A114E exceeds 2000 V
uMM EIA/JESD22-A115-A exceeds 200 V
uCDM EIA/JESD22-C101C exceeds 1000 V
nMultiple package options
nSpecified from 40 °C to +85 °C and from 40 °C to +125 °C
3. Ordering information
74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
Rev. 02 — 9 May 2008 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74AHC139
74AHC139D 40 °C to +125 °C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74AHC139PW 40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 2 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
4. Functional diagram
74AHCT139
74AHCT139D 40 °C to +125 °C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74AHCT139PW 40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
Table 1. Ordering information
…continued
Type number Package
Temperature range Name Description Version
a = demultiplexer and b = decoder
Fig 1. Logic symbol Fig 2. IEC logic symbol
mna779
1A0
1A1
2A0
2A1
2E
1E 1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
1
15
9
10
11
12
7
6
5
4
13
14
3
2
mna781
4
3
2
1
0
1
DX 5
6
7
0
1
2
3
G0
3
12
13
14
1
0
15
DX
(a) (b)
11
10
9
0
1
2
3
G0
3
4
3
2
2
EN
EN
1
1
X/Y 5
6
7
0
1
2
3
12
13
14
2
1
15
X/Y 11
10
9
0
1
2
3
Fig 3. Functional diagram
mna780
1Y0
1Y1
1Y2
1Y3 7
6
5
4
1A0
1A1
1E
1
3
2
2Y0
2Y1
2Y2
2Y3 9
10
11
12
2A0
2A1
2E
15
13
14
DECODER
DECODER
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 3 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 4. Pin configuration
139
1E VCC
1A0 2E
1A1 2A0
1Y0 2A1
1Y1 2Y0
1Y2 2Y1
1Y3 2Y2
GND 2Y3
001aad029
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Table 2. Pin description
Symbol Pin Description
1E 1 enable input (active LOW)
1A0 2 address input
1A1 3 address input
1Y0 4 output
1Y1 5 output
1Y2 6 output
1Y3 7 output
GND 8 ground (0 V)
2Y3 9 output
2Y2 10 output
2Y1 11 output
2Y0 12 output
2A1 13 address input
2A0 14 address input
2E 15 enable input (active LOW)
VCC 16 supply voltage
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 4 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.
For TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
Table 3. Function table[1]
Control Input Output
nE nA0 nA1 nY0 nY1 nY2 nY3
H XX HHHH
L LL LHHH
HL HLHH
LH HHLH
HH HHHL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
VIinput voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V [1] 20 - mA
IOK output clamping current VO <0.5 V or VO > VCC + 0.5 V [1] 20 +20 mA
IOoutput current VO =0.5 V to (VCC + 0.5 V) 25 +25 mA
ICC supply current - +75 mA
IGND ground current 75 - mA
Tstg storage temperature 65 +150 °C
Ptot total power dissipation Tamb =40 °C to +125 °C[2] - 500 mW
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 5 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
8. Recommended operating conditions
9. Static characteristics
Table 5. Operating conditions
Symbol Parameter Conditions Min Typ Max Unit
74AHC139
VCC supply voltage 2.0 5.0 5.5 V
VIinput voltage 0 - 5.5 V
VOoutput voltage 0 - VCC V
Tamb ambient temperature 40 +25 +125 °C
t/V input transition rise and fall rate VCC = 3.0 V to 3.6 V - - 100 ns/V
VCC = 4.5 V to 5.5 V - - 20 ns/V
74AHCT139
VCC supply voltage 4.5 5.0 5.5 V
VIinput voltage 0 - 5.5 V
VOoutput voltage 0 - VCC V
Tamb ambient temperature 40 +25 +125 °C
t/V input transition rise and fall rate VCC = 4.5 V to 5.5 V - - 20 ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C40 °Cto+85°C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74AHC139
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V
VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V
VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V
VIL LOW-level
input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V
VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V
VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V
VOH HIGH-level
output voltage VI=V
IH or VIL
IO=50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V
IO=50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V
IO=8.0 mA; VCC = 4.5 V 3.94 - - 3.80 - 3.70 - V
VOL LOW-level
output voltage VI=V
IH or VIL
IO=50µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO=50µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V
IO=50µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V
IO= 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 6 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
IIinput leakage
current VI= 5.5 Vor GND;
VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA
ICC supply current VI=V
CC or GND; IO=0A;
VCC = 5.5 V - - 4.0 - 40 - 80 µA
CIinput
capacitance VI=V
CC or GND - 3 10 - 10 - 10 pF
COoutput
capacitance -4-----pF
74AHCT139
VIH HIGH-level
input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
VIL LOW-level
input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL; VCC = 4.5 V
IO=50 µA 4.4 4.5 - 4.4 - 4.4 - V
IO=8.0 mA 3.94 - - 3.80 - 3.70 - V
VOL LOW-level
output voltage VI=V
IH or VIL; VCC = 4.5 V
IO=50µA - 0 0.1 - 0.1 - 0.1 V
IO= 8.0 mA - - 0.36 - 0.44 - 0.55 V
IIinput leakage
current VI= 5.5 Vor GND;
VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA
ICC supply current VI=V
CC or GND; IO=0A;
VCC = 5.5 V - - 4.0 - 40 - 80 µA
ICC additional
supply current per input pin;
VI=V
CC 2.1 V; other pins
at VCC or GND; IO=0A;
VCC = 4.5 V to 5.5 V
- - 1.35 - 1.5 - 1.5 mA
CIinput
capacitance VI=V
CC or GND - 3 10 - 10 - 10 pF
COoutput
capacitance -4-----pF
Table 6. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C40 °Cto+85°C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 7 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
10. Dynamic characteristics
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=C
PD ×VCC2×fi×N+Σ(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL×VCC2×fo) = sum of the outputs.
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ[1] Max Min Max Min Max
74AHC139
tpd propagation
delay nAn to nYn; see Figure 5 [2]
VCC = 3.0 V to 3.6 V
CL= 15 pF - 5.5 11.0 1.0 13.0 1.0 14.0 ns
CL= 50 pF - 7.9 14.5 1.0 16.5 1.0 18.5 ns
VCC = 4.5 V to 5.5 V
CL= 15 pF - 3.9 7.2 1.0 8.5 1.0 9.0 ns
CL= 50 pF - 5.6 9.2 1.0 10.5 1.0 11.5 ns
nEtonYn; see Figure 6 [2]
VCC = 3.0 V to 3.6 V
CL= 15 pF - 4.8 9.2 1.0 11.0 1.0 11.5 ns
CL= 50 pF - 6.9 12.7 1.0 14.5 1.0 16.0 ns
VCC = 4.5 V to 5.5 V
CL= 15 pF - 3.4 6.3 1.0 7.5 1.0 8.0 ns
CL= 50 pF - 4.9 8.3 1.0 9.5 1.0 10.5 ns
CPD power
dissipation
capacitance
fi= 1 MHz; VI= GND to VCC [3] -26- - - - -pF
74AHCT139; VCC = 4.5 V to 5.5 V
tpd propagation
delay nAn to nYn; see Figure 5 [2]
CL= 15 pF - 4.7 7.2 1.0 8.5 1.0 9.0 ns
CL= 50 pF - 6.5 9.2 1.0 10.5 1.0 11.5 ns
nEtonYn; see Figure 6 [2]
CL= 15 pF - 3.6 6.3 1.0 7.5 1.0 8.0 ns
CL= 50 pF - 5.2 8.3 1.0 9.5 1.0 10.5 ns
CPD power
dissipation
capacitance
fi= 1 MHz; VI= GND to VCC [3] -23- - - - -pF
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 8 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
11. Waveforms
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5. Address input to output propagation delays
mna782
tPHL tPLH
VM
VM
nAn input
nYn output
GND
VI
VOH
VOL
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. Enable input to output propagation delays
mna783
nE input
nYn output
tPHL tPLH
GND
VI
VM
VM
VOH
VOL
Table 8. Measurement points
Type Input Output
VMVM
74AHC139 0.5 ×VCC 0.5 ×VCC
74AHCT139 1.5 V 0.5 ×VCC
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 9 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
Test data is given in Table 9.
Definitions test circuit:
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Fig 7. Load circuitry for measuring switching times
001aah768
tW
tW
tr
tr
tf
VM
VI
negative
pulse
GND
VI
positive
pulse
GND
10 %
90 %
90 %
10 % VMVM
VM
tf
VCC
DUT
RT
VIVO
CL
G
Table 9. Test data
Type Input Load Test
VItr, tfCL
74AHC139 VCC 3.0 ns 15 pF, 50 pF tPLH, tPHL
74AHCT139 3.0 V 3.0 ns 15 pF, 50 pF tPLH, tPHL
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 10 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
12. Package outline
Fig 8. Package outline SOT109-1 (SO16)
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 10.0
9.8 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.39
0.38 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.020 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 11 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
Fig 9. Package outline SOT403-1 (TSSOP16)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.40
0.06 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 99-12-27
03-02-18
wM
bp
D
Z
e
0.25
18
16 9
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.1
pin 1 index
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 12 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
LSTTL Low-power Schottky Transistor-Transistor Logic
MM Machine Model
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74AHC_AHCT139_2 20080509 Product data sheet - 74AHC_AHCT139_1
Modifications: The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Table 6: the conditions for input leakage current have been changed.
74AHC_AHCT139_1 19990901 Product specification - -
74AHC_AHCT139_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 9 May 2008 13 of 14
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
15.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors 74AHC139; 74AHCT139
Dual 2-to-4 line decoder/demultiplexer
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 9 May 2008
Document identifier: 74AHC_AHCT139_2
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 4
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Recommended operating conditions. . . . . . . . 5
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
16 Contact information. . . . . . . . . . . . . . . . . . . . . 13
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14