1
®
FN7504.7
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004-2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL8178
Micropower Single Supply Rail-to-Rail
Input-Output (RRIO) Precision Op Amp
The EL8178 is a precision low power, operational amplifier.
The device is optimized for single supply operation between
2.4V to 5.5V. This enables operation from one lithium cell or
two Ni-Cd batteries. The input range includes both positive
and negative rail.
For power sensitive applications, the EL8178 has and EN
pin that will shut the device down and reduce the supply
current to 3µA typ. In the active state, the EL8178 draws
minimal supply current (55µA) while meeting excellent
DC-accuracy, noise, and output drive specifications.
Features
• Typical 55µA supply current
• 250µV max offset voltage
• Typical 1pA input bias current
• 266kHz gain-bandwidth product
• Single supply operation between 2.4V to 5.5V
• Rail-to-rail input and output
• Ground sensing
• Output sources and sinks 26mA load current
• Pb-free (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 20mA current loops
• Handheld consumer products
• Medical devices
• Thermocouple amplifiers
• Photodiode pre-amps
• pH probe amplifiers
Ordering Information
PART
NUMBER
(Note 1)
PART
MARKING
PACKAGE
(Pb-Free)
PKG.
DWG. #
EL8178FWZ-T7* BBWA 6 Ld SOT-23 MDP0038
EL8178FWZ-T7A* BBWA 6 Ld SOT-23 MDP0038
EL8178FSZ 8178FSZ 8 Ld SO MDP0027
EL8178FSZ-T7* 8178FSZ 8 Ld SO MDP0027
*Please refer to TB347 for details on reel specifications.
NOTE:
1. These Intersil Pb-free plastic packaged products employ special
Pb-free material sets; molding compounds/die attach materials
and 100% matte tin plate PLUS ANNEAL - e3 termination finish,
which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
EL8178
(6 LD SOT-23)
TOP VIEW
EL8178
(8 LD SO)
TOP VIEW
1
2
3
6
4
5
+-
OUT
V-
IN+
V+
EN
IN-
1
2
3
4
8
7
6
5
-
+
NC
IN-
IN+
EN
V+
OUT
V- NC
Data Sheet May 14, 2008
FOR A POSSIBLE SUBSTITUTE PRODUCT
contact our Technical Support Center at
1-888-INTERSIL or www.intersil.com/tsc
OBSOLETE PRODUCT
2FN7504.7
May 14, 2008
Absolute Maximum Ratings (TA = +25°C) Thermal Information
Supply Voltage (VS) and Pwr-up Ramp Rate . . . . . . . 5.75V, 1V/µs
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Current into IN+, IN-, and EN. . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Tolerance
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Resistance (Typical, Note 2) θJA (°C/W)
6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230
8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Ambient Operating Temperature Range . . . . . . . . -40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . -65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
2. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, VO = 2.5V, TA = +25°C unless otherwise specified. Boldface limits apply over
the operating temperature range, -40°C to +125°C.
PARAMETER DESCRIPTION TEST CONDITIONS
MIN
(Note 3) TYP
MAX
(Note 3) UNIT
VOS Input Offset Voltage -250 50 250 µV
-450 450 µV
Long Term Input Offset Voltage
Stability
3µV/Mo
Input Offset Drift vs Temperature 1.1 µV/°C
IBInput Bias Current -25 1 25 pA
-600 600 pA
IOS Input Offset Current -30 10 30 pA
-600 600 pA
eNInput Noise Voltage Peak-to-Peak f = 0.1Hz to 10Hz 2.8 µVP-P
Input Noise Voltage Density fO = 1kHz 48 nV/√Hz
iNInput Noise Current Density fO = 1kHz 0.15 pA/√Hz
CMIR Input Voltage Range Guaranteed by CMRR test 0 5 V
CMRR Common-Mode Rejection Ratio VCM = 0V to 5V 80 100 dB
75 dB
PSRR Power Supply Rejection Ratio VS = 2.4V to 5.5V 80 100 dB
80 dB
AVOL Large Signal Voltage Gain VO = 0.5V to 4.5V,
RL = 100kΩ to (V+ + V-)/2
100 400 V/mV
100 VmV
ΔVOS
ΔTime
------------------
ΔVOS
ΔT
----------------
EL8178
3FN7504.7
May 14, 2008
VOUT Maximum Output Voltage Swing
SOT-23/SO-8
VOL; Output low,
RL = 100kΩ to (V+ + V-)/2
310 mV
VOL; Output low,
RL = 1kΩ to (V+ + V-)/2
130 250 mV
350 mV
VOH; Output high,
RL = 100kΩ to (V+ + V-)/2
4.994 4.9975 V
VOH; Output high,
RL = 1kΩ to (V+ + V-)/2
4.750 4.875 V
4.7 V
SR Slew Rate 0.10 0.15 0.19 V/µs
0.07 0.25 V/µs
GBWP Gain Bandwidth Product fO = 100kHz 266 kHz
IS(ON) Supply Current, Enabled SOT-23/SO-8 35 55 75 µA
30 85 µA
IS(OFF) Supply Current, Disabled 35µA
ISC+ Short Circuit Output Sourcing Current RL = 10Ω to opposite supply 23 31 mA
18 mA
ISC- Short Circuit Output Sinking Current RL = 10Ω to opposite supply 20 26 mA
15 mA
VSSupply Voltage Guaranteed by PSRR 2.4 5.5 V
2.4 5.5 V
VINH EN Pin High Level 2 V
VINL EN Pin Low Level 0.8 V
IENH EN Pin Input Current VEN = 5V 0.25 0.8 2.5 µA
IENL EN Pin Input Current VEN = 0V -0.5 +0.5 µA
NOTE:
3. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, VO = 2.5V, TA = +25°C unless otherwise specified. Boldface limits apply over
the operating temperature range, -40°C to +125°C. (Continued)
PARAMETER DESCRIPTION TEST CONDITIONS
MIN
(Note 3) TYP
MAX
(Note 3) UNIT
EL8178
4FN7504.7
May 14, 2008
Typical Performance Curves VS = ±2.5V, TA = +25°C, Unless Otherwise Specified
FIGURE 1. UNITY GAIN FREQUENCY RESPONSE at
VARIOUS SUPPLY VOLTAGES
FIGURE 2. FREQUENCY RESPONSE at VARIOUS CLOSED
LOOP GAINS
FIGURE 3. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 4. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGE
FIGURE 5. INPUT OFFSET VOLTAGE vs COMMON-MODE
INPUT VOLTAGE
FIGURE 6. OPEN LOOP GAIN AND PHASE vs FREQUENCY
(RL = 1kΩ)
-3
-2
-1
0
1
1k 10k 100k 1M
VS = ±1.0V
VS = ±2.5V
VS = ±1.25
GAIN (dB)
FREQUENCY (Hz)
RL ≥ 10kΩ
VOUT = 0.2VP-P
-20
-10
0
10
20
30
40
50
60
70
80
1 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
GAIN (dB)
GAIN = 200
GAIN = 1k
GAIN = 500
GAIN = 100
GAIN = 10
GAIN = 1
GAIN = 5
GAIN = 2
RL ≥ 10kΩ
VOUT = 0.2VP-P
2.0 3 4.0 5.5
0
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
2.5
10
20
50
60
30
40
3.5 5.04.5 -0.5 5.5
-200
OUTPUT VOLTAGE (V)
INPUT OFFSET VOLTAGE (µV)
-100
0
200
100
0.5 1.5 2.5 3.5 4.5
AV = -1
VCM = VDD/2
-0.5 5.5
-250
COMMON-MODE INPUT VOLTAGE (V)
NORMALIZED INPUT OFFSET VOLTAGE (µV)
-150
-50
250
150
0.5 1.5 2.5 3.5 4.5
50
-20
GAIN (dB)
0
20
80
100
40
60
10 10k1M
FREQUENCY (Hz)
100
PHASE SHIFT (°)
0
45
90
135
180
100k1k
PHASE
GAIN
EL8178
5FN7504.7
May 14, 2008
FIGURE 7. OPEN LOOP GAIN AND PHASE vs FREQUENCY
(RL = 100kΩ)
FIGURE 8. CMRR vs FREQUENCY
FIGURE 9. PSRR vs FREQUENCY FIGURE 10. INPUT VOLTAGE AND CURRENT NOISE vs
FREQUENCY
FIGURE 11. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
Typical Performance Curves VS = ±2.5V, TA = +25°C, Unless Otherwise Specified (Continued)
-10
0
10
20
30
40
50
60
70
80
90
100
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
GAIN (dB)
180
135
90
GAIN
PHASE
PHASE SHIFT (°)
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
10
FREQUENCY (Hz)
CMRR (dB)
0ΔVCM = 1VP-P
RL = 100kΩ
10 100 1k 10k 100k 1M
AV = +1
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
10 100 1k 10k 100k
FREQUENCY (Hz)
PSRR (dB)
+PSRR
-PSRR
Δ
V
S
= 1V
P-P
R
L
= 100k
Ω
A
V
= +1
1M
1
10
100
1000
1 10 100 1k 10k 100k
FREQUENCY (Hz)
VOLTAGE NOISE (nV/√Hz)
0.1
1
10
100
CURRENT NOISE (pA/√Hz)
CURRENT
VOLTAGE
TIME (1s/DIV)
VOLTAGE NOISE (500nV/DIV)
2.8µVP-P
EL8178
6FN7504.7
May 14, 2008
FIGURE 12. VOS DRIFT (SOT-23 PACKAGE) vs TIME FIGURE 13. VOS DRIFT (SOIC PACKAGE) vs TIME
FIGURE 14. ENABLED SUPPLY CURRENT vs
TEMPERATURE, VS= ±2.5V
FIGURE 15. DISABLED SUPPLY CURRENT vs
TEMPERATURE, VS= ±2.5V
FIGURE 16. VOS vs TEMPERATURE, VS = ±2.5V FIGURE 17. VOS vs TEMPERATURE, VS = ±1.2V
Typical Performance Curves VS = ±2.5V, TA = +25°C, Unless Otherwise Specified (Continued)
-15
-10
-5
0
5
10
15
20
0 500 1000 1500
TIME (HOURS)
VOS DRIFT (µV)
1800 -12
-7
-2
3
8
13
18
0 500 1000 1500
VOS DRIFT (µV)
TIME (HOURS)
35
40
45
50
55
60
65
70
75
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
CURRENT (mA)
MEDIAN
MIN
MAX
n = 1500
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
CURRENT (mA)
MEDIAN
MIN
MAX
n = 1500
-400
-300
-200
-100
0
100
200
300
400
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
VOS (µV)
MEDIAN
MIN
MAX
n = 1500
-800
-600
-400
-200
0
200
400
600
800
VOS (µV)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
MEDIAN
MIN
MAX n = 1500
EL8178
7FN7504.7
May 14, 2008
FIGURE 18. IBIAS+ vs TEMPERATURE, VS = ±2.5V FIGURE 19. IBIAS- vs TEMPERATURE, VS = ±2.5V
FIGURE 20. IOS vs TEMPERATURE, VS = ±2.5V FIGURE 21. AVOL vs TEMPERATURE, RL = 100k, VO = ±2V @
VS = ±2.5V
FIGURE 22. CMRR vs TEMPERATURE, V+ = ±2.5V, ±1.5V FIGURE 23. PSRR vs TEMPERATURE ±1.5V TO ±2.5V
Typical Performance Curves VS = ±2.5V, TA = +25°C, Unless Otherwise Specified (Continued)
0
50
100
150
200
250
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
IBIAS+ (pA)
MEDIAN
MIN
MAX
n = 5000
0
50
100
150
200
250
300
350
400
450
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
MEDIAN
MIN
MAX
n = 5000
IBIAS- (pA)
-50
0
50
100
150
200
250
300
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
IOS (pA)
MEDIAN
MIN
MAX
n = 5000
160
210
260
310
360
410
460
510
AVOL (V/mV)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
MEDIAN
MIN
MAX
n = 1500
80
85
90
95
100
105
110
115
120
125
130
CMRR (dB)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
MEDIAN
MIN
MAX
n = 1500
85
90
95
100
105
110
115
120
125
130
PSRR (dB)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
MEDIAN
MIN
MAX
n = 1500
EL8178
8FN7504.7
May 14, 2008
FIGURE 24. VOUT HIGH vs TEMPERATURE, VS = ±2.5V,
RL=1k
FIGURE 25. VOUT HIGH vs TEMPERATURE, VS = ±2.5V,
RL=100k
FIGURE 26. VOUT LOW vs TEMPERATURE, VS = ±2.5V,
RL=1k
FIGURE 27. VOUT LOW vs TEMPERATURE, VS = ±2.5V,
RL=100k
Typical Performance Curves VS = ±2.5V, TA = +25°C, Unless Otherwise Specified (Continued)
4.84
4.85
4.86
4.87
4.88
4.89
4.90
VOUT (V)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
MEDIAN
MIN
MAX
n = 1500
4.9964
4.9966
4.9968
4.9970
4.9972
4.9974
4.9976
4.9978
4.9980
4.9982
4.9984
VOUT (V)
-40-200 20406080100120
TEMPERATURE (°C)
MEDIAN
MIN
MAX
n = 1500
100
110
120
130
140
150
160
170
180
190
VOUT (mV)
-40-200 20406080100120
TEMPERATURE (°C)
MEDIAN
MIN
MAX
n = 1500
3.0
3.2
3.4
3.6
3.8
4.0
4.2
4.4
4.6
4.8
5.0
VOUT (mV)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
MEDIAN
MIN
MAX
n = 1500
EL8178
9FN7504.7
May 14, 2008
Application Information
Introduction
The EL8178 is a rail-to-rail input and output (RRIO),
micropower, precision, single supply op amp with an enable
feature. This amplifier is designed to operate from single
supply (2.4V to 5.5V) or dual supply (±1.2V to ±2.75V) while
drawing only 55µA of supply current.The device achieves
rail-to-rail input and output operation while eliminating the
drawbacks of many conventional RRIO op amps.
Rail-to-Rail Input
The PFET input stage of the EL8178 has an input
common-mode voltage range that includes the negative and
positive supplies without introducing offset errors or
degrading performance like some existing rail-to-rail input
op amps. Many rail-to-rail input stages use two differential
input pairs: a long-tail PNP (or PFET) and an NPN (or
NFET). Severe penalties result from using this topology. As
the input signal moves from one supply rail to the other, the
op amp switches from one input pair to the other causing
changes in input offset voltage and an undesired change in
the input offset current’s magnitude and polarity.
The EL8178 achieves rail-to-rail input performance without
sacrificing important precision specifications and without
degrading distortion performance. The EL8178's input offset
voltage exhibits a smooth behavior throughout the entire
common-mode input range.
Rail-to-Rail Output
A pair of complementary MOSFET devices achieve rail-to-rail
output swing. The NMOS sinks current to swing the output in
the negative direction, while the PMOS sources current to
swing the output in the positive direction. The EL8178 with a
100kΩ load swings to within 3mV of the supply rails.
Results of Overdriving the Output
Caution should be used when overdriving the output for long
periods of time. Overdriving the output can occur in three ways:
1. The input voltage times the gain of the amplifier exceeds the
supply voltage by a large value.
2. The output current required is higher than the output stage
can deliver.
3. Operating the device in slew rate limit. These conditions can
result in a shift in the Input Offset Voltage (VOS) as much as
1µV/hr of exposure under these conditions.
Enable/Disable Feature
The EL8178 features an active low EN pin that when pulled
up to at least 2V, disables the output and drops the ICC to a
3µA. The EN pin has an internal pull-down, so an undriven
pin pulls to the negative rail, thereby enabling the op amp by
default. For applications where the EN pin is not being used,
it is recommended that the EN pin be permanently tyed to
ground.
The high impedance output during disable allows for
connecting multiple EL8178s together to implement a Mux
Amp. The outputs are connected together and activating the
appropriate EN pin selects the desired channel. If utilizing
non-unity gain op amp configurations, then the loading
Pin Descriptions
SO PIN
NUMBER
SOT-23 PIN
NUMBER PIN NAME
EQUIVALENT
CIRCUIT DESCRIPTION
1 NC No internal connection
2 4 IN- Circuit 1 Amplifier’s inverting input
3 3 IN+ Circuit 1 Amplifier’s non-inverting input
4 2 V- Circuit 4 Negative power supply
5 NC No internal connection
6 1 OUT Circuit 3 Amplifier’s output
7 6 V+ Circuit 4 Positive power supply
85EN
Circuit 2 Amplifier’s enable pin with internal pull-down; Logic “1” selects the disabled
state; Logic “0” selects the enabled state.
EN OUT
CIRCUIT 3CIRCUIT 2
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 4
V+
V+
V+
V-V-
V-
IN-
V+
V-
CIRCUIT 1
IN+
EL8178
10 FN7504.7
May 14, 2008
effects of the disabled amplifiers’ feedback networks must be
considered when evaluating the active amplifier’s
performance in Mux Amp configurations.
Note that feed through from the IN+ to IN- pins occurs on
any Mux Amp disabled channel where the input differential
voltage exceeds 0.5V (e.g., active channel VOUT = 1V, while
disabled channel VIN = GND), so the mux implementation is
best suited for small signal applications. In any application
where two or more amplifier outputs are muxed, use series
IN+ resistors, or large value RFs in each amplifier to keep
the feed through current low enough to minimize the impact
on the active channel. See “Usage Implications” on page 10
for more details.
IN+ and IN- Input Protection
In addition to ESD protection diodes to each supply rail, the
EL8178 has additional back-to-back protection diodes across
the differential input terminals. If the magnitude of the
differential input voltage exceeds the diode’s VF
, then one of
these diodes will conduct. For elevated temperatures, the
leakage of the protection diodes (see Circuit 1 in “Pin
Descriptions” on page 9) increases, resulting in the increase
in IBIAS, as seen in Figures 18 and 19.
USAGE IMPLICATIONS
If the input differential voltage is expected to exceed 0.5V, an
external current limiting resistor must be used to ensure the
input current never exceeds 5mA. For noninverting unity gain
applications, the current limiting can be via a series IN+ resistor,
or via a feedback resistor of appropriate value. For other gain
configurations, the series IN+ resistor is the best choice, unless
the feedback (RF) and gain setting (RG) resistors are both
sufficiently large to limit the input current to 5mA.
Large differential input voltages can arise from several
sources:
1. During open loop (comparator) operation. The IN+ and
IN- input voltages don’t track.
2. When the amplifier is disabled but an input signal is still
present. An RL or RG to GND keeps the IN- at GND, while
the varying IN+ signal creates a differential voltage. Mux
Amp applications are similar, except that the active
channel VOUT determines the voltage on the IN- terminal.
3. When the slew rate of the input pulse is considerably
faster than the op amp’s slew rate. If the VOUT can’t keep
up with the IN+ signal, a differential voltage results, and
visible distortion occurs on the input and output signals.
To avoid this issue, keep the input slew rate below
0.2V/µs, or use appropriate current limiting resistors.
Large (>2V) differential input voltages can also cause an
increase in disabled ICC.
EN Input Protection
The EN input has internal ESD protection diodes to both the
positive and negative supply rails, limiting the input voltage
range to within one diode beyond the supply rails
(see “Circuit 2” diagram on page 9). If the input voltage is
expected to exceed V+ or V-, then an external series resistor
should be added to limit the current to 5mA.
Output Current Limiting
The EL8178 has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the “Absolute
Maximum Rating” for “operating junction temperature”,
potentially resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperature (TJMAX) under certain load and power-supply
conditions. It is therefore important to calculate TJMAX for all
applications to determine if power supply voltages, load
conditions, or package type need to be modified to remain in
the safe operating area. These parameters are related in
Equation 1:
where PDMAX is calculated using Equation 2:
where:
•T
MAX = Maximum ambient temperature
•θJA = Thermal resistance of the package
•PD
MAX = Maximum power dissipation of the amplifier
•V
S = Supply voltage
•I
MAX = Maximum supply current of the amplifier
•V
OUTMAX = Maximum output voltage swing of the
application
•R
L = Load resistance
TJMAX TMAX θJAxPDMAX
()+= (EQ. 1)
PDMAX VSISMAX VS
( - VOUTMAX)VOUTMAX
RL
----------------------------
×+×=(EQ. 2)
EL8178
11 FN7504.7
May 14, 2008
Proper Layout Maximizes Precision
To achieve the optimum levels of high input impedance
(i.e., low input currents) and low offset voltage, care should
be taken in the circuit board layout. The PC board surface
must remain clean and free of moisture to avoid leakage
currents between adjacent traces. Surface coating of the
circuit board will reduce surface moisture and provide a
humidity barrier, reducing parasitic resistance on the board.
When input leakage current is a paramount concern, the use
of guard rings around the amplifier inputs will further reduce
leakage currents. Figure 28 shows a guard ring example for
a unity gain amplifier that uses the low impedance amplifier
output at the same voltage as the high impedance input to
eliminate surface leakage. The guard ring does not need to
be a specific width, but it should form a continuous loop
around both inputs. For further reduction of leakage
currents, mount components to the PC board using Teflon
standoffs..
Typical Applications
A general-purpose combination pH probe has extremely
high output impedance typically in the range of 10GΩ to
12GΩ. Low loss and expensive Teflon cables are often used
to connect the pH probe to the meter electronics. Figure 29
details a low-cost alternative solution using the EL8178 and
a low-cost coax cable. The EL8178 PMOS high impedance
input senses the pH probe output signal and buffers it to
drive the coax cable. Its rail-to-rail input nature also
eliminates the need for a bias resistor network required by
other amplifiers in the same application.
Thermocouples are the most popular temperature sensing
devices because of their low cost, interchangeability, and
ability to measure a wide range of temperatures. In
Figure 30, the EL8178 converts the differential thermocouple
voltage into single-ended signal with 10x gain. The EL8178's
rail-to-rail input characteristic allows the thermocouple to be
biased at ground and permits the op amp to operate from a
single 5V supply.
IN
V+
FIGURE 28. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
HIGH IMPEDANCE INPUT
-
+
3V
+
V+
V-
EL8178
COAXGENERAL
PURPOSE
COMBINATION
pH PROBE
FIGURE 29. pH PROBE AMPLIFIER
-
+
5V
+
V+
V-
EL8178
K TYPE
THERMOCOUPLE
10kΩR3
10kΩR2
R4
100kΩ
R1
100kΩ
410μV/°C
FIGURE 30. THERMOCOUPLE AMPLIFIER
EL8178
12 FN7504.7
May 14, 2008
EL8178
Small Outline Package Family (SO)
GAUGE
PLANE
A2
A1 L
L1
DETAIL X
4° ±4°
SEATING
PLANE
eH
b
C
0.010 BMCA
0.004 C
0.010 BMCA
B
D
(N/2)
1
E1
E
NN (N/2)+1
A
PIN #1
I.D. MARK
h X 45°
A
SEE DETAIL “X”
c
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
SYMBOL
INCHES
TOLERANCE NOTESSO-8 SO-14
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -
A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -
A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -
b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -
c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -
D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3
E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -
E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3
e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -
L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -
L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -
h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -
N 8 14 16 16 20 24 28 Reference -
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
13
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7504.7
May 14, 2008
EL8178
SOT-23 Package Family
e1
N
A
D
E
4
321
E1
0.15 DC
2X 0.20 C
2X
e
B0.20 MDC A-B
b
NX
6
2 3
5
SEATING
PLANE
0.10 C
NX
1 3
C
D
0.15 A-BC
2X
A2
A1
H
c
(L1)
L
0.25
0° +3°
-0°
GAUGE
PLANE
A
MDP0038
SOT-23 PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCESOT23-5 SOT23-6
A 1.45 1.45 MAX
A1 0.10 0.10 ±0.05
A2 1.14 1.14 ±0.15
b 0.40 0.40 ±0.05
c 0.14 0.14 ±0.06
D 2.90 2.90 Basic
E 2.80 2.80 Basic
E1 1.60 1.60 Basic
e 0.95 0.95 Basic
e1 1.90 1.90 Basic
L 0.45 0.45 ±0.10
L1 0.60 0.60 Reference
N 5 6 Reference
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
