HTSH5601ETK,118"" - NXP SEMICONDUCTORS

1. General description

The HITAG product line is well known and established in the contactless identification

market.

Due to the open mark eting strategy of NXP Sem icon d uc to rs th er e ar e var io us

manufacturers well established for both the transponders / cards as well as the

Read/Write Devices. All of them supporting HITAG 1 and HITAG 2 transponder IC's. With

the new HITAG S family, this existing infrastructure is extended with the next generation of

IC’s being substantially smaller in mechanical size, lower in cost, offering more operation

distance and speed, but still being operated with the same reader infrastructure and

transponder manufacturing equipment.

One Protocol - two memory options.

The protocol and command structure for HITAG S is based on HITAG 1, including

anticollision algorithm.

Two different memory sizes are offered and can be operated using exactly the same

protocol.

•HITAG S256 with 256 bit Total Memory Read/Write

•HITAG S2048 with 2048 bit Total Memory Read/Write

2. Features and benefits

2.1 Features

Integrated Circuit for Contactless Identification Transponders and Cards

Integrated resonance capacitor of 210 pF with 5 % tolerance over full production

Frequency range 100 kHz to 150 kHz.

2.2 Protocol

Modulation Read/Write Device  Transponder: 100 % ASK and Binary Pulse Length

Coding

Modulation Transponder  Read/Write Device: Strong ASK modulation with

Anticollision, Manchester and Bi-phase Coding

Fast Anticollision Protocol for inventory tracking: 100 Tags in 3.2 seconds

Cyclic Redundancy Check (CRC)

Optional Transponder Talks First Modes with user defined data length

Temporary switch from Transponder Talks First into Reader Talks First Mode

HTSICH56; HTSICH48

HITAG S transponder IC

Rev. 3.0 — 12 October 2011

210330 Product short data sheet

COMPANY PUBLIC

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 2 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

Data Rate Read/Write Device to Transponder: 5.2 kBit/s

Data Rates Transponder to Read/Write Device: 2 kBit/s, 4 kBit/s, 8 kBit/s

2.3 Memory

Two memory options (256 bit, 2048 bit)

Up to 100000 erase/write cycles

10 years non-volatile data retention

Secure Memory Lock functionality

2.4 Supported standards

Full compliant to ISO 11784/85 Animal ID

Targeted to operated on hardware infrastructure of new upcoming standards

ISO 14223 (Animal ID with anticollision and read/write functionality)

ISO 18000-2 (AIDC Techniques-RFID or Item Management)

Supports German Waste Management Standard and Pigeon Race Standard

2.5 Security features

32 bit Unique Identification Number (UID)

48 bit secret key based encrypted au thentication

2.6 Delivery types

Sawn, gold - bumped 8” Wafer

Sawn, gold - megabumped 8” Wafer

Contactless Chip Card Module MOA2

I – Connect (Low Cost Flip Chip Package)

HVSON2

3. Applications

Animal Identification

Laundry Automation

Beer keg and gas cylinder logistic

Pigeon Race Sports

Brand Protection Applications

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 3 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

4. Quick reference data

[1] Typical ratings are not guaranteed. Values are at 25 C.

[2] Measured with Qcoil = 20, Lcoil = 7.5 mH, optimal tuned to resonance circuit; VIN1-IN2 = 2 V (RMS)

5. Ordering information

[1] This package is also known as MOA2

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ[1] Max Unit

Wafer EEPROM characteristics

tret retention time Tamb  55 C 10 - - year

Nendu(W) write endurance 100000 cycle

Interface characteristics

Ciinput capacitance between IN1 and IN2 [2]

HTSICxxxxxEW/x7 199 210 221 pF

Tabl e 2. Orderi ng information

Type number Package

Name Memory siz e Description Version

HTSICH5601EW/V7 Wafer 256 bit Au-bumped die on sawn wafer, inkless -

HTSICH4801EW/V7 Wafer 2048 bit Au-bumped die on sawn wafer, inkless -

HTSICC5601EW/C7 Wafer 256 bit Au-megabumped di e on sawn wafer,

inkless -

HTSICC4801EW/C7 Wafer 2048 bit Au-megabumped die on sawn wafer,

inkless -

HTSMOH5601EV PLLMC[1] 256 bi t plastic leadless module carrier

package; 35 mm wide tape SOT500-3

HTSMOH4801EV PLLMC[1] 2048 bit plastic leadless module carrier

package; 35 mm wide tape SOT500-3

HTSFCH5601EV/DH FCP2 256 bit metal flip chip package; 2 leads;

35 mm wide tape SOT732-1

HTSFCH4801EV/DH FCP2 2048 bit metal flip chip package; 2 leads;

35 mm wide tape SOT732-1

HTSH5601ETK HVSON2 256 bit plastic thermal enhanced very thin

small outline package; no leads;

2 terminals; body 3  2  0.85 mm

SOT899-1

HTSH4801ETK HVSON2 2048 bit plastic thermal enhanced very thin

small outline package; no leads;

2 terminals; body 3  2  0.85 mm

SOT899-1

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 4 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

6. Block diagram

The HITAG S Transponder requires no external power supply. The contactless interface

generates the power supply and the system clock via the resonant circuitry by inductive

coupling to the Read /Write Device (RWD). The interface also demodulates data

transmitted from the R WD to the HITAG S T ransponder, and modulates the magnetic field

for data transmission from the HITAG S Transponder to the RWD.

Data are stored in a non-volatile memory (EEPROM). The EEPROM has a cap acity up to

2048 bit and is organized in 64 Pages consisting of 4 Bytes each (1 Page = 32 Bits).

Fig 1. Block diagram

001aak208

CLK

MOD

DEMOD

VREG

VDD

data

out

clock

R/W

ANALOGUE

RF INTERFACE

PAD

RECT

Cres

DIGITAL CONTROL

TRANSPONDER

ANTICOLLISION

READ/WRITE

CONTROL

ACCESS CONTROL

EEPROM INTERFACE

CONTROL

RF INTERFACE

CONTROL

EEPROM

SEQUENCER

CHARGE PUMP

256-bit

2048-bit

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 5 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7. Functional description

7.1 Memory organization

The EEPROM has a capacity up to 2048 bit and is organized in 16 Blocks, consisting of

4 Pages each, for commands with Block access. A Page consist s of 4 Bytes each (1 Page

= 32 Bits) and is the smallest access unit.

Addressing is done Page by Page (Page 0 to 63) and access is gained either Page by

Page or Block by Block entering the respective Page start address. In case of Block

Read/Write access, the transponder is processed from the start Page address with in one

block to the end of the corresponding block.

Two different types of HITAG S IC’s with different memor y sizes as shown in the figure

above are available.

7.2 HITAG S plain mode

Fig 2. Memory organization

0x00

0x01

0x02

0x03

0x04

0x05

0x06

0x07

0x08

0x09

0x0A

0x0B

0x0C

0x0D

0x0E

0x0F

0x10

0x3B

0x3C

0x3D

0x3E

0x3F

page 0

Page

Address

Block 0

Block 1

Block 2

Block 3

Block 15

32 bit H56

HITAG S Type

H48

page 1

page 2

page 3

page 4

page 5

page 6

page 7

page 8

page 9

page 10

page 11

page 12

page 13

page 14

page 15

page 16

page 59

page 60

page 61

page 62

page 63

aaa-000830

Table 3. Memory map for HITAG S in plain mode

MSByte LSByte

page address MSB LSB MSB LSB MSB LSB MSB LSB

0x00 UID3 UID2 UID1 UID0

Product short data sheet

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210330 6 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.3 HITAG S authentication mode

0x01 Reserved CON2 CON1 CON0

0x02 Data 3 Data 2 Data 1 Data 0

0x03 Data 3 Data 2 Data 1 Data 0

Table 3. Memory map for HITAG S in plain mode

MSByte LSByte

Table 4. Memory map for HITAG S in authentication mode

MSByte LSByte

page address MSB LSB MSB LSB MSB LSB MSB LSB

0x00 UID3 UID2 UID1 UID0

CON0

0x01 PWDH0 CON2 CON1

0x02 KEYH1 KEYH0 PWDL1 PWDL0

0x03 KEYL3 KEYL2 KEYL1 KEYL0

0x04 Data 3 Data 2 Data 1 Data 0

0x05 Data 3 Data 2 Data 1 Data 0

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 7 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.4 Sta te Diagram

7.4.1 General Description of States

Power Off

The powering magnetic field is switched off or the HITAG S Transponder is out of field.

Ready

After start up phase, the HITAG S Transponder is ready to receive the first command.

Init

The HITAG S T ransp onder enters this State af ter the first UID REQUEST xx command. In

this State the Response Protocol Mode (see Section 7.5) may be changed by further

UID REQUEST xx commands. If ther e ar e sev er al HITAG S Transponders in the field of

the RWD antenna at the same time, the AC SEQUENCE can be started to determine the

UID of every HITAG S Transponder.

Authenticate

The HITAG S Transponder enters this State after a valid SELECT (UID) co mmand when

configured in Authentication Mode. After an encrypted CHALLENGE Authentication the

HITAG S Transponder changes into the Selected State.

Selected

The HITAG S Transponder enters this State after a valid SELECT (UID) co mmand when

configured in Plain Mode or a SELECT (UID) and CHALLENGE sequence when

configured in Authentication Mode. Only one HITAG S Transponder in the field of the

RWD anten na can be Selected at the same time. In this S t at e, Read and W rite operation s

are possible. Data Transmission is not encrypted even if configured in Authentication

Mode.

Quiet

The HITAG S Transponder enters this State after a SELECT_QUIET (UID) command in

Init St a te or a QUIET comman d in Selected State. In this State, the HITAG S Transponder

will not answer to any command. Switching off the powering magnetic field or moving the

HITAG S Transponder out of field enters it into the Power Off State.

Transponder Talks First (TTF)

The HITAG S Transponder enters this State when configured in TTF Mode if no

UID REQUEST xx command is received within the Mode switch window. Once entered

this State, the HITAG S Transponder continuously transmits data with configurable data

coding, data rate and data length.

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 8 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.4.2 HITAG S256 and HITAG S2048

Remark: Switching off the powering magnetic field or moving the HITAG S Transponder

out of the RWD antenna field enters the HITAG S Transponder into the Power off state

independently of its actual state.

Fig 3. State diagram HITAG S256 and HITAG S2048

Power Off

Ready

Transponder

Talks First

Authenticate

lnit

QUIET

CHALLANGE

Transmission

error

In Field

SELECT (UID)

and

AUT = 0

SELECT (UID)

and

AUT = 1

Quiet

Selected

SELECT_QUIET (UID)

Any

command

Any

command

Any other command

or transmission error

Any other command,

transmission error

or wrong keys UID REQUESTxx

AC SEQUENCE

SELECT (UID) command with wrong UID

SELECT_QUIET (UID) command with wrong UID

Any other command

READ PAGE

READ BLOCK

WRITE PAGE

WRITE BLOCK

A : TTF Mode enabled and UID REQUESTxx

command not sent within switch window

B : TTF Mode enabled : UID REQUESTxx

command sent within switch window

TTF Mode disabled : UID REQUESTxx

Bit AUT : See chapter ‘Configuration’

aaa-000831

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 9 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.5 Command set

7.5.1 UID REQUEST xx

7.5.2 AC SEQUENCE

If more than one HITAG S Transponder is in the field of the antenna a special designed

RWD detects the first collision at the Bit position N = k of the UID response. As a result the

RWD starts an Anticollision Sequence (AC SEQUENCE).

After transmitting this command, all HITAG S Transponders which first k Bits of the own

UID match with the k received UID Bits, answer with the SOF and the rest of their own

UID.

If a collision occurs again the described cycle has to be repeated until one valid UID of the

transponders in the field is determined.

The complete response of the HITAG S Transponder is transmitted in Anticollision Coding

(AC).

Table 5. UID REQUEST xx

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

RWD: UID REQUEST xx EOF

Transponder: twresp SOF UID 0 UID 1 UID 2 UID 3

N= 1............8 9.....k.......16 17............24 25............32

Table 6. AC SEQUENCE

MSB LSB 1...............k MSB LSB

RWD: k4 k3 k3 k1 k0 k Bits of UID CRC 8 EOF

Transponder: twresp SOF (32-k) bits to UID

N= k+1............32

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 10 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.5.3 SELECT (UID)

The complete respon se of the HITAG S T r ansponder is tra nsmitted in Manchester Cod ing

(MC).

In Plain Mode the MSByte of Page 1 is a Reserved Byt e, in Auth entication Mode th is Byte

contains th e password high Byte PWDH 0. At the response on a SELECT (UID) command

of a HITAG S Transponder configured in Authentication Mode (Bit AUT = 1, keys and

password locked), this PWDH 0 Byte is dissolved by ‘1’ Bits.

Table 7. SELECT (UID)

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

RWD: 00000 UID 0 UID 1 UID 2 UID 3 CRC 8 EOF

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

Transponder: twresp SOF CON 0 CON 1 CON 2 Reserved CRC 8

Product short data sheet

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NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.5.4 CHALLENGE

By means of the response of the SELECT (UID) command the RWD detects that the

HITAG S Transponder is configured in Authentication Mode (Bit AUT = 1) and starts the

encrypted Challe ng e sequ e nc e.

The Read/Write Device sends a 32 bit Random Number (RND) and a 32 bit secret data

stream to the transponder. In order to perform the secret data stream, a security

co-processor is required on the read/write Device.

If the received secret data stream corresponds with the secret data stream calculated by

the HITAG S Tr ansponder, a 32 bit Secret Response (secret data stream encrypting the

configuration byte CON 2, p assword high byte PWDH 0 and password low Bytes PWDL 0

and PWDL 1) is transmitted af ter the SOF.

The response of the HITAG S Transponder is transmitted in Manchester Coding (MC).

Table 8. CHALLENGE

MSB LSB MSB LSB

RWD: 32 Bit RND 32 Bit Secret Data EOF MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

Transponder : twresp SOF CON 2 PWDH 0 PWDL 0 PWDL 1 CRC 8

32 Bit secret response

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 12 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.5.5 SELECT_QUITE (UID)

With this command a HITAG S Transponder in Init State can be directly entered into the

quiet state.

The Start Of Frame (SOF) pattern and the acknowledge (ACK) is transmitted in

Manchester Coding.

7.5.6 READ PAGE

After a HITAG S Transponder was selected by the co rr es po nd in g SELECT (UID)

command (or SELE CT (UID) and CHALLENGE for Authenticati on Mode) a read operation

of data stored on the EEPROM can be performed. After transmitting the READ PAGE

command, the Page address PADR (8 Bits) and the 8 bit Cyclic Redundancy Check

(CRC 8), the HITAG S Transponder responds with the SOF and 32 Bits data of the

correspond in g Pag e .

The highest Page address (PADR) is 0x3F, therefore the two highest Bits must be ‘0’.

Table 9. SELECT_QUITE (UID)

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

RWD: 00000 UID 0 UID 1 UID 2 UID 3 0CRC 8 EOF ACK

Transponder: twresp SOF 0 1

Table 10. READ PAGE

MSB LSB MSB LSB

RWD: 1 1 0 0 PADR CRC 8 EOF LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB

Transponder: twresp SOF DATA 0 DATA 1 DATA 2 DATA 3 CRC 8

Product short data sheet

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210330 13 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.5.7 READ BLOCK

After transmitting the READ BLOCK command, the Page address PADR (8 Bits) within a

block and the 8 bit Cyclic Redundancy Check (CRC 8), the HITAG S Transpond er

responds with the SOF and 32 up to 128 Bits of data beginn ing with the addressed Page

within a Block to the last Page of the corresponding Block.

Table 11. READ BLOCK

MSB LSB MSB LSB

RWD: 1 1 0 1 PADR CRC 8 EOF LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

Transponder: twresp SOF DATA 0 DATA 1 DATA 2 DATA 3 DATA 0 DATA 3 CRC 8

Product short data sheet

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NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.5.8 WRITE PAGE

After a HITAG S Transponder was selected by the co rr es po nd in g SELECT (UID)

command (or SELECT ( UID) and CHALLENGE for Authentication Mode) a write

operation of data onto the memory can be carried out. Least significant Byte is always

transmitted first. E.g. in order to change the con figuration page the byte CON0 would have

to be transmitted first.

After transmitting the WRITE PAGE command, the Page address PADR (8 Bits) and the

8 bit Cyclic Redundancy Check (CRC 8), the HITAG S Transponder responds with the

SOF and an acknowledge (ACK) to confirm the reception of a correct WRITE PAGE

command. After the waiting time twsc the RWD transmit s the write data with CRC 8. After

the programming time tprog the HITAG S Transponder responds with a SOF and an

acknowledge to confirm correct programming.

Table 12. WRITE PAGE

MSB LSB MSB LSB

RWD: 1 0 0 0 PADR CRC 8 EOF twsc

ACK

Transponder: twresp SOF 01

Table 13. WRITE PAGE

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

RWD: DATA 0 DATA 1 DATA 2 DATA 3 CRC 8 EOF ACK

Transponder: tprog SOF 01

Product short data sheet

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210330 15 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

7.5.9 WRITE BLOCK

After tr ansmitting th e WRITE BLOCK command , the Page ad dress PADR (8 Bit s) within a

Block and the 8 bit Cyclic Redundancy Check (CRC 8), the HITAG S Transponder

responds with the SOF and an acknowledge (ACK) to confirm the reception of a correct

WRITE BLOCK command. After the waiting time twsc the RWD transmits the write data

with CRC 8 Page b y Page (1 to 4 Pages depend ing on the Pa ge address PADR within th e

corresponding block). After the programming time tprog the HITAG S Tra nsponder

responds with a SOF and an acknowledge to confirm correct programming of each Page.

7.5.10 QUITE

With this command a Selected HITAG S Transponder can be enter ed into the Quie t State.

Table 14. WRITE BLOCK

MSB LSB MSB LSB

RWD: 1 0 0 1 PADR CRC 8 EOF twsc

ACK

Transponder twresp SOF 01

Table 15. Write data for page with page address: PADR

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

RWD: DATA 0 DATA 1 DATA 2 DATA 3 CRC 8 EOF twsc

ACK

Transponder: tprog SOF 01

Table 16. Write data for page with page address: PADR + 1

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

RWD: DATA 0 DATA 1 DATA 2 DATA 3 CRC 8 EOF twsc

ACK

Transponder tprog SOF 01

Table 17. Write data for page with page address: PADR + 2

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

RWD: DATA 0 DATA 1 DATA 2 DATA 3 CRC 8 EOF twsc

ACK

Transponder tprog SOF 01

Table 18. Write data for page with page address: PADR + 3

LSByte MSByte

MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB

RWD: DATA 0 DATA 1 DATA 2 DATA 3 CRC 8 EOF ACK

Transponder tprog SOF 01

Product short data sheet

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NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

A valid Page address PADR (8 Bits ) and Cyclic Redundancy Check (CRC 8) must be se nt

for command structure reasons only.

Table 19. QUITE

MSB LSB MSB LSB

RWD: 0 1 1 1 PADR CRC 8 EOF ACK

Transponder twresp SOF 01

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210330 17 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

8. Limiting values

[1] Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only

and functional operation of the device at these or any conditions other than those described in the Operating Conditions and Electrical

Characteristics section of this specification is not implied.

[2] This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive st atic

charge. Nonetheless, it is suggested that conventional precautions should be taken to avoid applying values greater than the rated

maxima

9. Characteristics

[1] Typical ratings are not guaranteed. Values are at 25 C.

[2] Measured with Qcoil = 20, Lcoil = 7.5 mH, optimal tuned to resonance circuit; VIN1-IN2 = 2 V (RMS)

Table 20. Limiting values[1][2]

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VESD electrostatic discharge voltage JEDEC JESD 22-A114-AB

Human Body Model 2- kV

Ii(max) maximum input current IN1-IN2 - 20 mA

Tjjunction temperature 25 +85 C

Table 21. Characteristics

Symbol Parameter Conditions Min Typ[1] Max Unit

fiinput frequency 100 125 150 kHz

VIinput voltage IN1-IN2

read - 3.5 4.5 V

write - 6.3 7.2 V

IIinput current IN1-IN2 - - 10 mA

Interface ch ar a c ter istics

Ciinput capacitance between IN1-IN2 [2]

HTSICxxxxxEW/x7 199 210 221 pF

Wafer EEPROM characteristics

tret retention time Tamb 55 C 10--year

Nendu(W) write endurance 100000 cycle

Product short data sheet

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210330 18 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

10. Abbreviations

11. Revision history

Table 22. Abbreviations

Acronym Description

ASK Amplitude Shift Keying

CRC Cyclic Redundancy Check

EEPROM Electrically Erasable Programmable Read-Only Memory

IC Integrated Circuit

RF Radio Frequency

RTF Reader Talks First

RWD Read Write Device

TTF Transponder Talks First

UID Unique Identification Number

Table 23. Revision history

Document ID Release date Data sheet status Change notice Supersedes

HTSICH56_48_SDS v.3.0 20111012 Product short data sheet - -

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 19 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

12. Legal information

12.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

12.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall pre vail.

Product specificatio n — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyond tho se described in the

Product data sheet.

12.3 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors doe s not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect , incidental,

punitive, special or consequ ential damages (including - wit hout limitatio n - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ ag gregate and cumulati ve liability toward s

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors product s are not designed,

authorized or warranted to be suit able for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in perso nal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty tha t such application s will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semiconductors product s, and NXP Semiconductors

accepts no liability for any assistance with applicati ons or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for th e customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanent ly and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the ter ms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or t he grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from competent authorities.

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] dat a sheet Production This document contains the product specification.

Product short data sheet

COMPANY PUBLIC Rev. 3.0 — 12 October 2011

210330 20 of 21

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It i s neit her qualif ied nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automot ive specifications and standard s, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

product for such automotive applications, use and specifi ca tions, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

use of the product for automotive appl ications beyond NXP Semiconductors’

standard warrant y and NXP Semiconductors’ product specifications.

12.4 Licenses

12.5 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

HITAG — is a trademark of NXP B.V.

13. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

ICs with HITAG functionality

NXP Semiconductors owns a worldwide perpetual license for the patents

US 5214409, US 5499017, US 5235326 and for any foreign counterparts

or equivalents of t hese patents. The license is granted for the Field-of-U se

covering: (a) all non-animal applicat ions, and (b) any application for animals

raised for human consumption (includin g but not limited to dairy animals),

including without limitation livestock and fish.

Please note that the license doe s not include rights outside the specified

Field-of-Use, and that NXP Semiconduc tors does not provide i ndemnity for

the foregoing patents outside the Field-of-Use.

NXP Semiconductors HTSICH56; HTSICH48

HITAG S transponder IC

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 12 October 2011

210330

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

14. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

2.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2.2 Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2.3 Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.4 Supported standards . . . . . . . . . . . . . . . . . . . . 2

2.5 Security features. . . . . . . . . . . . . . . . . . . . . . . . 2

2.6 Delivery types. . . . . . . . . . . . . . . . . . . . . . . . . . 2

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 3

5 Ordering information. . . . . . . . . . . . . . . . . . . . . 3

6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4

7 Functional description . . . . . . . . . . . . . . . . . . . 5

7.1 Memory organization . . . . . . . . . . . . . . . . . . . . 5

7.2 HITAG S plain mode. . . . . . . . . . . . . . . . . . . . . 5

7.3 HITAG S authentication mode . . . . . . . . . . . . . 6

7.4 State Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . 7

7.4.1 General Description of States. . . . . . . . . . . . . . 7

7.4.2 HITAG S256 and HITAG S2048 . . . . . . . . . . . . 8

7.5 Command set. . . . . . . . . . . . . . . . . . . . . . . . . . 9

7.5.1 UID REQUEST xx . . . . . . . . . . . . . . . . . . . . . . 9

7.5.2 AC SEQUENCE . . . . . . . . . . . . . . . . . . . . . . . . 9

7.5.3 SELECT (UID) . . . . . . . . . . . . . . . . . . . . . . . . 10

7.5.4 CHALLENGE . . . . . . . . . . . . . . . . . . . . . . . . . 11

7.5.5 SELECT_QUITE (UID). . . . . . . . . . . . . . . . . . 12

7.5.6 READ PAGE. . . . . . . . . . . . . . . . . . . . . . . . . . 12

7.5.7 READ BLOCK . . . . . . . . . . . . . . . . . . . . . . . . 13

7.5.8 WRITE PAGE . . . . . . . . . . . . . . . . . . . . . . . . . 14

7.5.9 WRITE BLOCK. . . . . . . . . . . . . . . . . . . . . . . . 15

7.5.10 QUITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 17

9 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 17

10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 18

11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18

12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19

12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19

12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 19

12.4 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

12.5 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20

13 Contact information. . . . . . . . . . . . . . . . . . . . . 20

14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21