© 2008 Microchip Technology Inc. DS22118A-page 1
24AA16H/24LC16BH
Device Selection Table
Features:
Single Supply with Operation Down to 1.7V for
24AA16H Devices, 2.5V for 24LC16BH Devices
Low-Power CMOS Technology:
- Read current 1 mA, max.
- Standby current 1 μA, max.
2-Wire Serial Inte rfac e, I2C™ Compatible
Schmitt Trigger Inputs for Noise Suppression
Output Slope Control to eliminate Ground Bounce
100 kHz and 400 kHz Clock Compatibility
Page Write Time 3 ms, typical
Self-Timed Erase/Write Cycle
16-Byte Page Write Buffer
Hardware Write-Protect for Half-Array (400h-7FFh)
ESD Protection >4,000V
More than 1 Million Erase/Write Cycles
Data Retention >200 years
Factory Programming available
Packages include 8-lead PDIP, SOIC, TSSOP,
TDFN, MSOP and 5-lead SOT-23
Pb-Free and RoHS Compliant
Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
Description:
The Microchip Technology Inc. 24AA16H/24LC16BH
(24XX16H *) is an 1 6 Kbit Ele ctricall y Erasable PROM.
The device is organized as eight blocks of 256 x 8-bit
memory with a 2-wire serial interface. Low-voltage
design permits operation down to 1.7V, with standby
and active currents of only 1 μA and 1 mA,
respectively. The 24XX16H also has a page write
capability for up to 16 by tes of data. The 24XX16H is
available in the standard 8-pin PDIP, surface mount
SOIC, TSSOP, 2x3 TDFN and MSOP packages, and
is also available in the 5-lead SOT-23 package. All
packages are Pb-free and RoHS compliant.
Block Diagram
Package Types
Part
Number VCC
Range Max. Clock
Frequency Temp.
Ranges
24AA16H 1.7-5.5 400 kHz(1) I
24LC16BH 2.5-5.5 400 kHz I, E
Note 1: 100 kHz for VCC <2.5V
HV
EEPROM
Array
Page
YDEC
XDEC
Sense Amp.
Memory
Control
Logic
I/O
Control
Logic
I/O
WP
SDA
SCL
VCC
VSS R/W Control
Latches
Generator
A0
A1
A2
VSS
VCC
WP
SCL
SDA
1
2
3
4
8
7
6
5
PDIP, MSOP SOIC, TSSOP
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
TDFN
A0
A1
A2
VSS
WP
SCL
SDA
VCC
SOT-23-5
15
4
3
SCL
Vss
SDA
WP
Vcc
2
Note: Pins A0, A1 and A2 are not used by the 24XX08. (No
intern al connect ions).
8
7
6
5
1
2
3
4
16K I2C Serial EEPROM with Half-Array Write-Protect
*24XX16H is used in this document as a generic part
number for the 24AA16H/24LC16BH devices.
24AA16H/24LC16BH
DS22118A-page 2 © 2008 Microchip Technology Inc.
1.0 ELECTRICAL CHARAC TERISTICS
Absolute Maximum Ratings (†)
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins......................................................................................................................................................≥ 4 kV
TABLE 1-1: DC CHARACTERISTICS
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above th ose indi cated in the opera tional li stings of this sp ecificati on is no t implie d. Exposu re to max imum rating
conditions for extended periods may affect device reliability.
DC CHARACTERISTICS VCC = +1.7V to +5.5V
Industrial (I): TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
No. Symbol Characteristic Min. Typ. Max. Units Conditions
D1 VIH WP, SCL and SDA pins ——
D2 High-level input voltage 0.7 VCC ——V
D3 VIL Low-level input voltage 0.3 VCC V—
D4 VHYS Hysteresis of Schmitt
Trigger inputs 0.05 VCC ——V(Note)
D5 VOL Low-level output voltage 0.40 V IOL = 3.0 mA, VCC = 2.5V
D6 ILI Input leakage current ——±1μAVIN = VSS or VCC
D7 ILO Output leakage current ——±1μAVOUT = VSS or VCC
D8 CIN,
COUT Pin capacitance
(all inputs/ou tpu t s) ——10pFVCC = 5. 0V (Note)
TA = 25°C, FCLK = 1 MHz
D9 ICC write Operating current —0.13mAVCC = 5.5V, SCL = 400 kHz
D10 ICC read 0.05 1 mA
D11 ICCS Standby current
0.01
1
5μA
μAIndustrial
Automotive
SDA = SCL = VCC
WP = VSS
Note: This parameter is periodically sampled and not 100% tested.
© 2008 Microchip Technology Inc. DS22118A-page 3
24AA16H/24LC16BH
TABLE 1-2: AC CHARACTERISTICS
AC CHARACTERISTICS Industrial (I): TA = -40°C to +85°C, VCC = +1.7V to +5.5V
Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V
Param.
No. Symbol Characteristic Min. Max. Units Conditions
1F
CLK Clock Frequency
400
100 kHz
kHz 2.5V VCC 5.5V
1.7V VCC < 2.5 V (24AA16H)
2THIGH Clock High Time 600
4000
ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
3T
LOW Clock Low Time 1300
4700
ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
4TRSDA and SCL Rise Time
(Note 1)
300
1000 ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
5TFSDA and SCL Fall Time 300 ns (Note 1)
6THD:STA Start Condition Hold Time 600
4000
ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
7T
SU:STA Start Condition Setup Time 600
4700
ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
8T
HD:DAT Data Input Hold Time 0 ns (Note 2)
9TSU:DAT Data Input Setup Time 100
250
ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
10 TSU:STO Stop Condition Setup Time 600
4000
ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
11 TSU:WP WP Setup Time 600
4000
ns
ns 2.5V VCC 5.5V
1.7V VCC < 2.5V (24AA16H)
12 THD:WP WP Hold Time 1300
4700
ns
ns 2.5V VCC 5.5V
1.7V VCC < 2.5V (24AA16H)
13 TAA Output Valid from Clock
(Note 2)
900
3500 ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
14 TBUF Bus free time: Time the bus
must be free before a new
transmission can star t
1300
4700
ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
15 TOF O utp ut Fall Time from V IH
Minimum to VIL Maximum
250
250 ns
ns 2.5V VCC 5.5 V
1.7V VCC < 2.5 V (24AA16H)
16 TSP Input Filter Spike Suppression
(SDA and SCL pins) —50ns(Notes 1 and 3)
17 TWC Write Cycle Time (byte or
page) —5ms
18 Endurance 1M cycles 25°C, (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The com bined TSP and VHYS specifi cation s are due to n ew Schm itt Trigger input s w hich provide i mpr oved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tes ted but ensured by characterization. For end urance estimates in a specif ic
applic ation, ple ase cons ult the Total En durance™ M odel whic h can be o btaine d on Micro chip’ s web site at
www.microchip.com.
24AA16H/24LC16BH
DS22118A-page 4 © 2008 Microchip Technology Inc.
FIGURE 1-1: BUS TIMING DATA
(unprotected)
(protected)
SCL
SDA
IN
SDA
OUT
WP
5
7
6
16
3
2
89
13
D4 4
10
11 12
14
© 2008 Microchip Technology Inc. DS22118A-page 5
24AA16H/24LC16BH
2.0 FUNCTIONAL DESCRIPTION
The 24XX16H supports a bidirectional, 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, while a device
receiving data is defined as a receiver. The bus has to
be controlled by a master device which generates the
Serial Clock (SCL), controls the bus access and
generates the Start and Stop conditions, while the
24XX16H works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is activated.
3.0 BUS CHARACTERISTICS
The following bus protocol has been defined:
Data transfer may be initiated only when the bus
is not busy.
During data transfer, the data line must remain
stab le when ever th e clock lin e is high . Change s in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 3-1).
3.1 Bus Not Busy (A)
Both data and clock lines remain high.
3.2 Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
3.3 S top Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
3.4 Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each dat a transf er is initiated w ith a S tart condition an d
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is
theoretically unlimited, although only the last sixteen
will be stored when doing a write operation. When an
overwri te does occur it will replace da ta in a firs t-in first-
out (FIFO) fashion.
3.5 Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. Th e mast er device mus t ge nera te a n ex tra c lock
pulse which is associated with this Acknowledge bit.
The device that acknowledges, has to pull down the
SDA line d uring th e ackn owledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must signal an end of
data to t he slave by no t gene rating a n Ack nowledg e bit
on the las t by te tha t has be en c locked out of th e sl av e.
In this case, the slave (24XX16H) will leave the data
line high to enable the master to generate the Stop
condition.
FIGURE 3-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS
Note: The 24XX16H does not generate any
Acknowledge bits if an internal program-
ming cycle is in prog res s.
SCL
SDA
(A) (B) (D) (D) (A)(C)
Start
Condition Address or
Acknowledge
Valid
Data
Allowed
to Change
Stop
Condition
24AA16H/24LC16BH
DS22118A-page 6 © 2008 Microchip Technology Inc.
3.6 Device Addressing
A control byte is the first byte received following the
Start condition from the master device (Figure 3-2).
The con trol by te co nsi sts of a four-bi t c ontro l c od e. For
the 24XX 16H, th is is se t as ‘1010 binary for read and
write op erat ions. The ne xt th ree bit s of th e co ntro l by te
are the bloc k-select bits (B2, B1, B0). They are used by
the master device to select which of the eight 256 word-
blocks of memory are t o be accessed. T hese bits are in
effect the three Most Significant bits of the word
address.
The last bit of the control byte defines the operation to
be performed. When set to ‘1’ a read operation is
selected. When set to ‘0’ a write operation is selected.
Following the Start condition, the 24XX16H monitors
the SDA bus, checking the device type identifier being
transmitted and, upon receiving a ‘1010 code, the
slave device outputs an Acknowledge signal on the
SDA line. Depending on the state of the R/W bit, the
24XX16H will select a read or write operation.
FIGU RE 3-2 : CONTROL BYTE
ALLOCATION
Operation Control
Code Block Select R/W
Read 1010 Block Addre ss 1
Write 1010 Block Address 0
1010B2 B1 B0 R/W ACK
Start Bit
Read/Write Bit
S
Slave Address
Acknowledge Bit
Control Code
Block
Select
Bits
© 2008 Microchip Technology Inc. DS22118A-page 7
24AA16H/24LC16BH
4.0 WRITE OPERATION
4.1 Byte Write
Following the Start condition from the master, the
dev ice code ( 4 bits), the block address ( 3 bits) and the
R/W bi t, which is a logic-low, is placed o nto t he bus by
the master transmitter. This indicates to the addressed
slave receiver that a byte with a word address will
follow once it has generated an Ack nowledge bit d uring
the nint h clock cycl e. Therefor e, the next byt e transmit-
ted by the master is the word address and will be
written into the Address Pointer of the 24XX16H. After
receiving another Acknowledge signal from the
24XX16H, the master device will transmit the data word
to be written into the addressed memory location. The
24XX16H acknowledges again and the master
generates a Stop condition. This initiates the internal
write cycle and, during this time, the 24XX16H will not
generate Ackno w led ge sig na ls (Fig ure 4-1).
4.2 Page Write
The write control byte, word address and the first data
byte are transmitted to the 24XX16H in the same way
as in a byte write. However, instead of generating a
S top condition, the master transmits u p to 16 data bytes
to the 24XX 16H, which are temporarily stored in the on-
chip page buffer and will be written into memory once
the master has transmitted a Stop condition. Upon
receipt of each word, the four lower-order Address
Pointer bits are internally incremented by ‘1’. The
higher-order 7 bits of the word address remain
constant. If the master should transmit more than 16
words prior to generating the Stop condition, the
address counter will roll over and the previously
receive d dat a will be overwri tten. As w ith the by te write
operation, once the Stop condition is received an
internal write cycle will begin (Figure 4-2).
FIGURE 4-1: BYTE WRITE
FIGURE 4-2: PAG E WRITE
Note: Page write opera tions are l imited to wri ting
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘pag e-siz e’) and end a t addre sses that a re
integer multiples of [page size – 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being w ritten to the next page, as migh t be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
S P
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
S
T
O
P
Control
Byte Word
Address Data
A
C
KA
C
KA
C
K
1010B2 B1B0 0
Block
Select
Bits
S P
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
Control
Byte Word
Address (n) Data (n) Data (n + 15)
S
T
O
P
A
C
KA
C
K
A
C
KA
C
KA
C
K
Data (n + 1)
Block
Select
Bits
11
00B2B1B00
24AA16H/24LC16BH
DS22118A-page 8 © 2008 Microchip Technology Inc.
5.0 ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
comma nd has been is sued from the master , the device
initiate s the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a S tart c ondition fo llowed by t he control
byte for a W rite command (R/W = 0). If the device is still
busy wi th the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next Read or
Write command. See Figure 5-1 for a flow diagram of
this operation.
FIGURE 5-1: ACKNOWLEDGE POLLING
FLOW
6.0 WRITE PROTECTION
The WP pin allows the user to write-protect half of the
array (400h -7FFh) when the pi n is tied to VCC. If the pin
is tied to VSS the write protection is disabled.
Send
Write Command
Send Stop
Condit ion to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
Next
Operation
No
Yes
© 2008 Microchip Technology Inc. DS22118A-page 9
24AA16H/24LC16BH
7.0 READ OPERATION
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to1’. There are three basic types
of read operat ions: current address read , rand om rea d
and sequential read.
7.1 Current Address Read
The 24XX16H contains an address counter that main-
tains the address of the last word accessed, internally
incremented by ‘1’. Therefore, if the previous access
(either a read or write operation) was to address n, the
next curren t addre ss read operati on would access da ta
from address n + 1. Upon receipt of the slave address
with R/W bit set to ‘1’, the 24X X16H issues an acknowl-
edge and tran smits the 8-bit dat a word. The maste r will
not acknowledge the transfer , but does gene rate a Stop
condition and the 24XX16H discontinues transmission
(Figure 7-1) .
7.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this typ e of re ad ope ratio n, the word add res s mus t firs t
be set. This is accomplished by sending the word
address to the 24XX16H as part of a write operation.
Once th e word address is s ent, the master ge nerates a
Start condition following the acknowledge. This
terminates the write operation, but not before the
internal Address Pointe r is se t. The m aster th en issue s
the control byte again, but with the R/W bit set to a ‘1’.
The 24XX16H will then issue an acknowledge and
transmit the 8-bit data word. The master will not
acknowledge the transfer, but does generate a Stop
condition and the 24XX16H will discontinue transmis-
sion (Fig ure 7 -2).
7.3 Sequentia l Read
Sequential reads are initiated in the same way as a
random read, exc ep t tha t once the 2 4XX1 6H tran sm its
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24XX16H to transmit the next sequentially-
addressed 8-bit word (Figure 7-3).
To provide sequen tia l rea ds , the 24 XX16H c ontains a n
internal Address Pointer that is incremented by one
upon completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation.
7.4 Noise Protection
The 24XX16 H employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 1.5V at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation, even on a noisy bus.
FIGURE 7-1: CURRENT ADDRESS READ
SP
Bus Activity
Master
SDA Line
Bus Activity
S
T
O
P
Control
Byte Data (n)
A
C
KN
o
A
C
K
S
T
A
R
T
1010B2 B1 B0 1
Block
Select
Bits
24AA16H/24LC16BH
DS22118A-page 10 © 2008 Microchip Technology Inc.
FIGURE 7-2: RANDOM READ
FIGU RE 7-3 : SEQU E NTI AL REA D
S P
S
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
S
T
O
P
Control
Byte
A
C
K
Word
Address (n) Control
Byte
S
T
A
R
TData (n)
A
C
KA
C
KN
o
A
C
K
1010 B1B001
1
001
B2
Block
Select
Bits
Block
Select
Bits
B2B1B0
P
Bus Activity
Master
SDA Line
Bus Activity
S
T
O
P
Control
Byte
A
C
KN
o
A
C
K
Data (n) Data (n + 1) Data (n + 2) Data (n + X)
A
C
KA
C
KA
C
K
1
© 2008 Microchip Technology Inc. DS22118A-page 11
24AA16H/24LC16BH
8.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 8-1.
TABLE 8-1: PIN FUNCTION TABLE
8.1 Serial Address/Data Input/Output
(SDA)
SDA is a bidirectional pin used to transfer addresses
and data into and out of the de vice . Sinc e it i s an open-
drain terminal, the SDA bus requires a pull-up resistor
to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
8.2 Serial Clock (SCL)
The SCL in pu t is u se d to s ynchro ni ze th e da t a tra ns fer
to and from the device.
8.3 Wr it e-Protect (WP)
The WP pin must be connected to either VSS or VCC.
If tied to VSS, normal memory operation is enabled
(read/wri te the ent ire memory 000h -7FFh ).
If tied to VCC, wri te op era t io n s are in hi b it e d, ha l f o f t he
memory will be write-protected (400h-7FFh). Read
operations are not af fec ted.
8.4 A0, A1, A2
The A0, A1 and A2 pins are not used by th e 24XX16H.
They may be left floating or tied to either VSS or VCC.
Name PDIP SOIC TSSOP TDFN MSOP SOT-23 Description
A0 1 1 1 1 1 Not Connected
A1 2 2 2 2 2 Not Connected
A2 3 3 3 3 3 Not Connected
VSS 4 4 4 4 4 2 Ground
SDA 5 5 5 5 5 3 Serial Address/Data I/O
SCL 6 6 6 6 6 1 Serial Clock
WP 7 7 7 7 7 5 Write-Protect Input
VCC 8 8 8 8 8 4 +1.7V to 5.5V Power Supply
24AA16H/24LC16BH
DS22118A-page 12 © 2008 Microchip Technology Inc.
9.0 PACKAGING INFORMATION
9.1 Package Marking Information
8-Lead SOIC (3.90 mm) Example:
XXXXXXXX
T/XXYYWW
NNN
24L16BHI
SN 0827
13F
5-Lead SOT-23 Example:
XXNN 5QNN
XXXXXXXX
T/XXXNNN
YYWW
8-Lead PDIP (300 mil) Example:
24LC16BH
I/P 13F
0827
8-Lead TSSOP Example:
8-Lead MSO P Example:
XXXX
TYWW
NNN
XXXXXT
YWWNNN
4L6H
I827
13F
4L16HI
82713F
3
e
3
e
8-Lead 2x3 TDFN
XXX
YWW
NN
AG4
827
13
Example:
© 2008 Microchip Technology Inc. DS22118A-page 13
24AA16H/24LC16BH
1st Line Marking
Part No. TSSOP MSOP SOT-23 TDFN
I-Temp E-Temp I-Temp E-Temp I-Temp E-Temp
24AA16H 4A6H 4A16HI BWNN AG1
24LC16BH 4L6H 4L16HI 4L16HE 5QNN 5RNN AG4 AS5
Legend: XX...X Part number or part number code
T Temperature (I, E)
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
Note: For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
Note: In the even t the full Microc hip p art num ber cann ot be marked on one lin e, it will
be carried over to the next line, thus limiting the number of available
characters f or customer- specific information.
3
e
3
e
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
24AA16H/24LC16BH
DS22118A-page 14 © 2008 Microchip Technology Inc.


  !"#$%&"' ()"&'"!&)&#*&&&#
 +%&,&!&
- '!!#.#&"#'#%!&"!!#%!&"!!!&$#/!#
 '!#&.0
1,21!'!&$& "!**&"&&!
 3&'!&"&4#*!(!!&4%&&#&
&&255***''54
6&! 7,8.
'!9'&! 7 7: ;
7"')%! 7 <
& 1,
&& = = 
##44!!   - 
1!&&   = =
"#&"#>#& .  - -
##4>#& .   <
: 9& -< -? 
&& 9  - 
9#4!! <  
69#>#& )  ? 
9*9#>#& )  < 
: *+ 1 = = -
N
E1
NOTE 1
D
12
3
A
A1
A2
L
b1
b
e
E
eB
c
  * ,<1
© 2008 Microchip Technology Inc. DS22118A-page 15
24AA16H/24LC16BH
 ! ""#$%& !'

  !"#$%&"' ()"&'"!&)&#*&&&#
 +%&,&!&
- '!!#.#&"#'#%!&"!!#%!&"!!!&$#''!#
 '!#&.0
1,2 1!'!&$& "!**&"&&!
.32 %'!("!"*&"&&(%%'&"!!
 3&'!&"&4#*!(!!&4%&&#&
&&255***''54
6&! 99..
'!9'&! 7 7: ;
7"')%! 7 <
& 1,
: 8& = = 
##44!!   = =
&#%%+  = 
: >#& . ?1,
##4>#& . -1,
: 9& 1,
,'%@&A  = 
3&9& 9  = 
3&& 9 .3
3& IB = <B
9#4!!  = 
9#>#& ) - = 
#%& DB = B
#%&1&&' EB = B
D
N
e
E
E1
NOTE 1
12 3
b
A
A1
A2
L
L1
c
h
h
φ
β
α
  * ,1
24AA16H/24LC16BH
DS22118A-page 16 © 2008 Microchip Technology Inc.
© 2008 Microchip Technology Inc. DS22118A-page 17
24AA16H/24LC16BH
() )"* ! (+%+( !

  !"#$%&"' ()"&'"!&)&#*&&&#
 '!!#.#&"#'#%!&"!!#%!&"!!!&$#''!#
- '!#&.0
1,2 1!'!&$& "!**&"&&!
.32 %'!("!"*&"&&(%%'&"!!
 3&'!&"&4#*!(!!&4%&&#&
&&255***''54
6&! 99..
'!9'&! 7 7: ;
7"')%! 7 <
& ?1,
: 8& = = 
##44!!  <  
&#%%   = 
: >#& . ?1,
##4>#& . -  
##49&  - -
3&9& 9  ? 
3&& 9 .3
3& IB = <B
9#4!!  = 
9#>#& )  = -
D
N
E
E1
NOTE 1
12
b
e
c
A
A1
A2
L1 L
φ
  * ,<?1
24AA16H/24LC16BH
DS22118A-page 18 © 2008 Microchip Technology Inc.
," !*-, , !

  !"#$%&"' ()"&'"!&)&#*&&&#
 '!!#.#&"#'#%!&"!!#%!&"!!!&$#''!#
- '!#&.0
1,2 1!'!&$& "!**&"&&!
.32 %'!("!"*&"&&(%%'&"!!
 3&'!&"&4#*!(!!&4%&&#&
&&255***''54
6&! 99..
'!9'&! 7 7: ;
7"')%! 7 <
& ?1,
: 8& = = 
##44!!   < 
&#%%   = 
: >#& . 1,
##4>#& . -1,
: 9& -1,
3&9& 9  ? <
3&& 9 .3
3& B = <B
9#4!! < = -
9#>#& )  = 
D
N
E
E1
NOTE 1
12
e
b
A
A1
A2
c
L1 L
φ
  * ,1
© 2008 Microchip Technology Inc. DS22118A-page 19
24AA16H/24LC16BH
. !(""!( !(/

 '!!#.#&"#'#%!&"!!#%!&"!!!&$#''!#
 '!#&.0
1,2 1!'!&$& "!**&"&&!
 3&'!&"&4#*!(!!&4%&&#&
&&255***''54
6&! 99..
'!9'&! 7 7: ;
7"')%! 7
9#& 1,
:"&!#9#&  1,
: 8&  = 
##44!!  < = -
&#%%   = 
: >#& .  = -
##4>#& . - = <
: 9&  = -
3&9& 9  = ?
3&& 9 - = <
3& B = -B
9#4!! < = ?
9#>#& )  = 
φ
N
b
E
E1
D
123
e
e1
A
A1
A2 c
L
L1
  * ,1
24AA16H/24LC16BH
DS22118A-page 20 © 2008 Microchip Technology Inc.
0$*-,/11%2.(0
 3&'!&"&4#*!(!!&4%&&#&
&&255***''54
© 2008 Microchip Technology Inc. DS22118A-page 21
24AA16H/24LC16BH
0$*-,/11%2.(0
 3&'!&"&4#*!(!!&4%&&#&
&&255***''54
24AA16H/24LC16BH
DS22118A-page 22 © 2008 Microchip Technology Inc.
APPENDIX A: REVISION HISTORY
Revision A (11/2008)
Original release.
© 2008 Microchip Technology Inc. DS22118A-page 23
24AA16H/24LC16BH
THE MICROCHIP WEB SITE
Microc hip pro vides onl ine s upport v ia our W WW site at
www.microchi p.c om . Thi s web si te i s us ed as a m ean s
to make files and information easily available to
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To register, access the Microchip web site at
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Notification and follow the registration instructions.
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Users of Microchip products can receive assistance
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Customers should contact their distributor,
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Technical s upport is a vailable through the web si te
at: http://support.microchip.com
24AA16H/24LC16BH
DS22118A-page 24 © 2008 Microchip Technology Inc.
READER RESP ONSE
It is ou r intentio n to provide you w it h th e b es t do cument ation po ss ib le to ensure suc c es sfu l u se of y ou r M ic roc hip prod-
uct. If you wi sh to prov ide you r comment s on org aniza tion, clar ity, subj ect matte r , and ways i n which o ur docum entatio n
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DS22118A24AA16H/24LC16BH
1. Wha t are the best featu res of this document ?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
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© 2008 Microchip Technology Inc. DS22118A-page 25
24AA16H/24LC16BH
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. X/XX
PackageTemperature
Range
Device
Device: 24AA16H = 1.7V, 16 Kbit I2C Serial EEPROM
24AA16HT = 1.7V, 16 Kbit I2C Serial EEPROM
(Tape and Reel)
24LC16BH = 2.5V, 16 Kbit I2C Serial EEPROM
24LC16BHT= 2.5V, 16 Kbit I2C Serial EEPROM
(Tape and Reel)
Temperature
Range: I = -40°C to +85°C
E = -40 °C to +125°C
Package: P = Plastic DIP (300 mil body), 8-lead
SN = Plastic SOIC (3.90 mm body), 8-lead
ST = Plastic TSSOP (4.4 mm), 8-lead
MNY(1) = Plastic Dual Flat (TDFN), No lead package,
2x3 mm body, 8-lead
MS = Plastic Micro Small Outline (MSOP), 8-lead
OT = SOT-23, 5-lead (Tape and Reel only)
Examples:
a) 24AA16H-I/P: Industrial Temper ature,1.7V,
PDIP package
b) 24AA16H-I/SN: Industrial Temper a-
ture,1.7V, SOIC package
c) 24AA16HT-I/OT: Industrial Temperature,
1.7V, SOT-23 package, Tape and Reel
d) 24LC16BH-I/P: Industrial Temperature,
2.5V, PDIP package
e) 24LC16BH-E/SN: Automotive Temp.,2.5V
SOIC package
f) 24LC16BHT-I/OT: Industrial Temperature,
2.5V, SOT-23 package, Tape and Reel
Note 1: “Y” indica tes a N ic ke l Pa lla diu m Go ld (N iPd Au) f ini sh.
24AA16H/24LC16BH
DS22118A-page 26 © 2008 Microchip Technology Inc.
NOTES:
© 2008 Microchip Technology Inc. DS22118A-page 27
Information contained in this publication regarding device
applications a nd the lik e is p ro vided on ly for yo ur con ve nien ce
and may be supers eded by updates . I t is you r r es ponsibil it y to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
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OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
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hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTA RT, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEV AL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Prog ra m ming , IC SP, ICEPIC , M i n di , MiWi , MPASM , MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail , PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, WiperLock and ZENA are trademarks of
Microchip Technology I ncorporat ed in the U.S.A. and other
countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporat ed, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that it s family of products is one of the most secure families of its kind on the market today, when used in t he
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such act s
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS22118A-page 28 © 2008 Microchip Technology Inc.
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WORLDWIDE SALES AND SERVICE
01/02/08