CD4007UBMS - Intersil Corporation

7-666

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

CD4007UBMS

CMOS Dual Complementary Pair Plus Inverter

Pinout

CD4007UBMS

TOP VIEW

Functional Diagram

Q2 (P) DRAIN

Q2 (P) SOURCE

Q2 GATES

Q2 (N) SOURCE

Q2 (N) DRAIN

Q1 GATES

VDD, Q1, Q2, Q3 (P)

Q1 (P) SOURCE

Q3 (N) DRAIN, Q3 (P) SOURCE

Q3 (P) DRAIN

Q3 GATES

Q3 (N) SOURCE

Q1 (N) DRAIN

VSS, Q1, Q2, Q3 (N)

SUBSTRATES Q1 (N)

SOURCE

SUBSTRATES, Q1(P) DRAIN

TERMINAL NO. 14 - VDD

TERMINAL NO. 7 - VSS

12310

74 9

13 1

14 2 11

Features

• High-Voltage Type (20V Rating)

• Standardized Symmetrical Output Characteristics

• Medium Speed Operation

- tPHL, tPLH = 30 ns (typ) at 10V

• 100% Tested for Maximum Quiescent Current at 20V

• Meets All Requirements of JEDEC Tentative Stan-

dards No. 13B, “Standard Speciﬁcations for Descrip-

tion of “B” Series CMOS Devices”

• Maximum Input Current of 1µA at 18V Over Full Pack-

age-Temperature Range; 100nA at 18V and +25oC

Applications

• Extremely High-Input Impedance Ampliﬁers

• Shapers

• Inverters

• Threshold Detector

• Linear Ampliﬁers

• Crystal Oscillators

Description

CD4007BMS types are comprised of three n-channel and

three p-channel enhancement-type MOS transistors. The

transistor elements are accessible through the package ter-

minals to provide a convenient means for constructing the

various typical circuits as shown in Figure 2.

More complex functions are possible using multiple pack-

ages. Numbers shown in parentheses indicate terminals that

are connected together to form the various conﬁgurations

listed.

The CD4007BMS is supplied in these 14 lead outline pack-

ages:

Braze Seal DIP H4Q

Frit Seal DIP H1B

Ceramic Flatpack H3W

November 1994

File Number 3291

7-667

Speciﬁcations CD4007UBMS

Absolute Maximum Ratings Reliability Information

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V

(Voltage Referenced to VSS Terminals)

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC

Package Types D, F, K, H

Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC

Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC

At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for

10s Maximum

Thermal Resistance . . . . . . . . . . . . . . . . θja θjc

Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W

Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W

Maximum Package Power Dissipation (PD) at +125oC

For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW

For TA = +100oC to +125oC (Package Type D, F, K). . . . . .Derate

Linearity at 12mW/oC to 200mW

Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW

For TA = Full Package Temperature Range (All Package Types)

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS (NOTE 1) GROUP A

SUBGROUPS TEMPERATURE

LIMITS

UNITSMIN MAX

Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC - 0.5 µA

2 +125oC-50µA

VDD = 18V, VIN = VDD or GND 3 -55oC - 0.5 µA

Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25oC -100 - nA

2 +125oC -1000 - nA

VDD = 18V 3 -55oC -100 - nA

Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA

2 +125oC - 1000 nA

VDD = 18V 3 -55oC - 100 nA

Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV

Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V

Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA

Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA

Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA

Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA

Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA

Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA

Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA

N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V

P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V

Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >

VDD/2 VOL <

VDD/2 V

VDD = 20V, VIN = VDD or GND 7 +25oC

VDD = 18V, VIN = VDD or GND 8A +125oC

VDD = 3V, VIN = VDD or GND 8B -55oC

Input Voltage Low

(Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.0 V

Input Voltage High

(Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 4.0 - V

Input Voltage Low

(Note 2) VIL VDD = 15V, VOH > 13.5V,

VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC - 2.5 V

Input Voltage High

(Note 2) VIH VDD = 15V, VOH > 13.5V,

VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC 12.5 - V

NOTES: 1. All voltages referenced to device GND, 100% testing being

implemented.

2. Go/No Go test with limits applied to inputs

3. For accuracy, voltage is measured differentially to VDD. Limit

is 0.050V max.

7-668

Speciﬁcations CD4007UBMS

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS (NOTE 1, 2) GROUP A

SUBGROUPS TEMPERATURE

LIMITS

UNITSMIN MAX

Propagation Delay TPHL

TPLH VDD = 5V, VIN = VDD or GND 9 +25oC - 110 ns

10, 11 +125oC, -55oC - 149 ns

Transition Time TTHL

TTLH VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns

10, 11 +125oC, -55oC - 270 ns

NOTES:

1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

2. 55oC and +125oC limits guaranteed, 100% testing being implemented.

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

LIMITS

UNITSMIN MAX

Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC - 0.25 µA

+125oC - 7.5 µA

VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC - 0.5 µA

+125oC-15µA

VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC - 0.5 µA

+125oC-30µA

Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,

-55oC-50mV

Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,

-55oC-50mV

Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,

-55oC4.95 - V

Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,

-55oC9.95 - V

Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA

-55oC 0.64 - mA

Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA

-55oC 1.6 - mA

Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA

-55oC 4.2 - mA

Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA

-55oC - -0.64 mA

Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA

-55oC - -2.0 mA

Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA

-55oC - -1.6 mA

Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA

-55oC - -4.2 mA

Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,

-55oC-2V

Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,

-55oC8-V

Propagation Delay TPHL

TPLH VDD = 10V 1, 2, 3 +25oC - 60 ns

VDD = 15V 1, 2, 3 +25oC - 50 ns

7-669

Speciﬁcations CD4007UBMS

Transition Time TTHL

TTLH VDD = 10V 1, 2, 3 +25oC - 100 ns

VDD = 15V 1, 2, 3 +25oC - 80 ns

Input Capacitance CIN Any Input 1, 2 +25oC - 15.0 pF

NOTES:

1. All voltages referenced to device GND.

2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized

on initial design release and upon design changes which would affect these characteristics.

3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

LIMITS

UNITSMIN MAX

Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC - 2.5 µA

N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V

N Threshold Voltage

Delta ∆VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC-±1V

P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V

P Threshold Voltage

Delta ∆VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC-±1V

Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH >

VDD/2 VOL <

VDD/2 V

VDD = 3V, VIN = VDD or GND

Propagation Delay Time TPHL

TPLH VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x

+25oC

Limit

NOTES: 1. All voltages referenced to device GND.

2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit.

4. Read and Record

TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC

PARAMETER SYMBOL DELTA LIMIT

Supply Current - SSI IDD ±0.1µA

Output Current (Sink) IOL5 ± 20% x Pre-Test Reading

Output Current (Source) IOH5A ± 20% x Pre-Test Reading

TABLE 6. APPLICABLE SUBGROUPS

CONFORMANCE GROUP MIL-STD-883

METHOD GROUP A SUBGROUPS READ AND RECORD

Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A

Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A

Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A

PDA (Note 1) 100% 5004 1, 7, 9, Deltas

Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A

PDA (Note 1) 100% 5004 1, 7, 9, Deltas

Final Test 100% 5004 2, 3, 8A, 8B, 10, 11

Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11

Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11

Subgroup B-6 Sample 5005 1, 7, 9

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

LIMITS

UNITSMIN MAX

7-670

Speciﬁcations CD4007UBMS

Schematic Diagram

FIGURE 1. DETAILED SCHEMATIC DIAGRAM OF CD4007UBMS SHOWING INPUT, OUTPUT, AND PARASITIC DIODES

Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3

NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.

TABLE 7. TOTAL DOSE IRRADIATION

CONFORMANCE GROUPS MIL-STD-883

METHOD

TEST READ AND RECORD

PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD

Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4

TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS

FUNCTION OPEN GROUND VDD 9V ± -0.5V

OSCILLATOR

50kHz 25kHz

Static Burn-In

1 Note 1 1, 5, 8, 12, 13 3, 4, 6, 7, 9, 10 2, 11, 14

Static Burn-In

2 Note 1 1, 5, 8, 12, 13 4, 7, 9 2, 3, 6, 10, 11, 14

Dynamic Burn-

In Note 1 - 4, 7, 9 2, 11, 14 1, 5, 8, 12, 13 3, 6, 10 -

Irradiation

Note 2 1, 5, 8, 12, 13 4, 7, 9 2, 3, 6, 10, 11, 14

NOTE:

1. Each pin except VDD and GND will have a series resistor of 10K ±5%, VDD = 18V ±0.5V

2. Each pin except VDD and GND will have a series resistor of 47K±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD

= 10V ±0.5V

TABLE 6. APPLICABLE SUBGROUPS (Continued)

CONFORMANCE GROUP MIL-STD-883

METHOD GROUP A SUBGROUPS READ AND RECORD

D2 D2

D1D1

68D1

D2 D2

D1D1

35D1

D2 D2

D1D1 D1

1Q2 10

*CMOS INPUT

PROTECTION

NETWORK PARASITIC AND

NETWORK COMPONENTS

D1 = N+ TO P WELL

D2 = P+ TO SUBSTRATE

R1 = 1 - 5 KΩ

R2 = 15 - 30Ω

**CMOS OUTPUT PROTECTION

NETWORK BETWEEN TERMINAL

NOS. 1, 2, 4, 5, 8, 9, 11, 12, 13

AND THE CORRESPONDING

DRAINS AND/OR SOURCES

** **

****

VDD

VSS

OUTPUT

TERMINAL

7-671

CD4007UBMS

Logic Circuits

FIGURE 2. SAMPLE CMOS LOGIC CIRCUIT ARRANGEMENTS USING TYPE CD4007UBMS

a) TRIPLE INVERTERS b) 3 - INPUT NOR GATE c) 3 - INPUT NAND GATE

d) TREE (RELAY) LOGIC

e) HIGH SINK-CURRENT DRIVER f) HIGH SOURCE-CURRENT DRIVER

g) HIGH SINK - AND SOURCE-CURRENT DRIVER h) DUAL BI-DIRECTIONAL TRANSMISSION GATING

6835

10 12

(14, 2, 11); (8, 13);

(1, 5); (7, 4, 9)

10 12

(13, 2); (1, 11);

(12, 5, 8); (7, 4, 9)

10 12

(1, 12, 13); (2, 14, 11);

(4, 8); (5, 9)

VSS

VDD

10 OUT

#ALL P- UNIT SUBSTRATES

ARE CONNECTED TO VDD

ALL N- UNIT SUBSTRATES

ARE CONNECTED TO VSS

VDD

OUT

VSS

OUT (VDD) = C + AB

OUT (VSS) = CA + CB

(13, 12, 5); (4, 9, 8);

(14, 2); (1, 11)

VDD

VSS

(OPTIONAL VDD PULL-UP)

(6, 3, 10); (8, 5, 12);

(11, 14); (7, 4, 9)

6 12

VDD

VSS

(OPTIONAL VSS PULL-DOWN)

(6, 3, 10); (13, 1, 12);

(14, 2, 11); (7, 9)

612

VDD

VSS

(6, 3, 10); (14, 2, 11);

(7, 4, 9); (13, 8, 1, 5, 12)

TG1

TG2

CLOCK

(OUT)

OUT1

(IN1)

OUT2

(IN2)

(1, 5, 12); (2, 9);

(11, 4); (8, 13, 10);

(6, 3)

7-672

CD4007UBMS

Typical Performance Characteristics

FIGURE 3. TYPICAL VOLTAGE-TRANSFER CHARACTERIS-

TICS FOR NAND GATE FIGURE 4. TYPICAL VOLTAGE-TRANSFER CHARACTERIS-

TICS FOR NOR GATE

FIGURE 5. TYPICAL OUTPUT LOW (SINK) CURRENT

CHARACTERISTICS FIGURE 6. MINIMUM AND MAXIMUM VOLTAGE-TRANSFER

CHARACTERISTICS FOR INVERTER

FIGURE 7. TYPICAL CURRENT AND VOLTAGE-TRANSFER

CHARACTERISTICS FOR INVERTER FIGURE 8. MINIMUM OUTPUT LOW (SINK) CURRENT

CHARACTERISTICS

VDD

A - SINGLE INPUT ONLY

B - TWO INPUTS ONLY

C - THREE INPUTS

*OTHER INPUT

SWITCHES TO VDD

AMBIENT TEMPERATURE (T A) = +25oC

SUPPLY VOLTAGE

(VDD) = 15V

10V

0 2.5 5.0 7.5 10 12.5 15

INPUT VOLTAGE (VI) (V)

OUTPUT VOLTAGE (VO) (V)

A - SINGLE INPUT ONLY

B - TWO INPUTS ONLY

C - THREE INPUTS

*OTHER INPUT

AMBIENT TEMPERATURE (T A) = +25oC

SUPPLY VOLTAGE

(VDD) = 15V

OUTPUT VOLTAGE (VO) (V)

0 2.5 5.0 7.5 10.0 12.5 15.0

INPUT VOLTAGE (VI) (V)

10V

AMBIENT TEMPERATURE (T A) = +25oC

GATE-TO-SOURCE VOLT AGE (VGS) = 15V

0 5 10 15

DRAIN-TO-SOURCE VOLT AGE (VDS) (V)

OUTPUT LOW (SINK) CURRENT (IOL) (mA)

AMBIENT TEMPERATURE (T A) = +25oC

VI VO

SUPPLY VOLTAGE

(VDD) = 15V

10V

OUTPUT VOLTAGE (VO) (V)

15.0

12.5

10.0

7.5

5.0

2.5

0 2.5 5.0 7.5 10.0 12.5 15.0

INPUT VOLTAGE (VI) (V)

ID VO

VDD

14 11

TERM 3 & 6 TO GND

SUPPLY MILLIAMPERES (ID)

AMBIENT TEMPERATURE (T A) = +25oC

SUPPLY VOLTAGE

(VDD) = 15V

OUTPUT VOLTAGE (VO) (V)

15.0

12.5

10.0

7.5

5.0

2.5

0 2.5 5.0 7.5 10.0 12.5 15.0

12.5

10.0

7.5

5.0

2.5

INPUT VOLTAGE (VI) (V)

10V

AMBIENT TEMPERATURE (T A) = +25oC

GATE-TO-SOURCE VOLT AGE (VGS) = 15V

0 5 10 15

7.5

5.0

2.5

10.0

12.5

15.0

DRAIN-TO-SOURCE VOLT AGE (VDS) (V)

OUTPUT LOW (SINK) CURRENT (IOL) (mA)

7-673

CD4007UBMS

FIGURE 9. TYPICAL OUTPUT HIGH (SOURCE) CURRENT

CHARACTERISTICS FIGURE 10. MINIMUM OUTPUT HIGH (SOURCE) CURRENT

CHARACTERISTICS

FIGURE 11. TYPICAL VOLTAGE-TRANSFER CHARACTERIS-

TICS AS A FUNCTION OF TEMPERATURE FIGURE 12. TYPICAL PROPAGATION DELAY TIME vs LOAD

CAPACITANCE

FIGURE 13. TYPICAL TRANSISTION TIME vs LOAD

CAPACITANCE FIGURE 14. TYPICAL DISSIPATION vs FREQUENCY

CHARACTERISTICS

Typical Performance Characteristics (Continued)

-10V

-15V

AMBIENT TEMPERATURE (T A) = +25oC

GATE-TO-SOURCE VOLT AGE (VGS) = -5V

-5

-10

-15

DRAIN-TO-SOURCE VOLT AGE (VDS) (V)

-20

-25

-30

0-5-10-15

OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)

-10V

-15V

AMBIENT TEMPERATURE (T A) = +25oC0

-5

-10

-15

DRAIN-TO-SOURCE VOLT AGE (VDS) (V) 0-5-10-15

OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)

GATE-TO-SOURCE VOLT AGE (VGS) = -5V

INPUT VOLTAGE (VI) (V)

SUPPLY VOLTAGE

(VDD) = 15V

OUTPUT VOLTAGE (VO) (V)

0 5 10 15

TA =125oC

10V

-55oC

125oC

0 20 40 60 80 100

100

PROPAGATION DELAY TIME (tPLH, tPHL) (ns)

AMBIENT TEMPERATURE (T A) = +25oC

LOAD CAPACITANCE (CL) (pF)

SUPPLY VOL TAGE (VDD) = 5V

15V

10V

AMBIENT TEMPERATURE (T A) = +25oC

LOAD CAPACITANCE (CL) (pF)

0 40 60 80 10020

100

150

200

SUPPLY VOL TAGE (VDD) = 5V

10V

TRANSITION TIME (fTHL, fTLH) (ns)

AMBIENT TEMPERATURE (T A) = +25oC

SUPPLY VOL TAGE (VDD) = 15V

10V

LOAD CAPACITANCE (CL) = 15pF

(CL) = 50pF

105

104

103

102

102103104105106107

2468 2468 2468 2468 2468 2468

INPUT FREQUENCY (ﬁ) (Hz)

DISSIPATION PER GATE (PD) (µW)

674

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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or speciﬁcations at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate

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FAX: (886) 2 2715 3029

CD4007UBMS

Chip Dimension and Pad Layout

Dimensions in parentheses are in millimeters

and are derived from the basic inch dimensions

as indicated. Grid graduations are in mils (10-3 inch)

METALLIZATION: Thickness: 11kÅ−14kÅ, AL.

PASSIVATION: 10.4kÅ - 15.6kÅ, Silane

BOND PADS: 0.004 inches X 0.004 inches MIN

DIE THICKNESS: 0.0198 inches - 0.0218 inches