SC1188 Programmable Synchronous DC/DC Converter, Dual Low Dropout Regulator Controller POWER MANAGEMENT Description Features u Synchronous design, enables no heatsink solution u 95% efficiency (switching section) u 4 bit DAC for output programmability u 1.8V, 2.5V short circuit protected linear controllers u VRM8.4 Compliant The SC1188 combines a synchronous voltage mode controller with two low-dropout linear regulators providing most of the circuitry necessary to implement three DC/ DC converters for powering advanced, low cost microprocessors. The SC1188 switching section features an integrated 4 bit D/A converter, latched drive output for enhanced noise immunity and pulse by pulse current limiting. The SC1188 switching section operates at a fixed frequency of 200kHz, providing an optimum compromise between size, efficiency and cost in the intended application areas. The integrated D/A converter provides programmability of output voltage from 1.30V to 2.05V in 50mV increments with no external components. Applications u Low Cost Motherboards u 1.3V to 2.05V microprocessor supplies u Programmable triple power supplies The SC1188 linear sections are low dropout regulators with short circuit protection, supplying 1.8V for Bridge and 2.5V for non-GTL I/O. Typical Application Circuit 12V IN + 5V IN 0.1uF Cin 1500uF x4 47uF 0.1uF + U5 5 SC1188CS LDOEN CS+ CS- VID0 16 VID1 15 VID2 14 VID3 13 VID0 VOSENSE VID1 BST VID2 DH DL VID3 GND 1 4 GATE2 LDOS2 GATE1 LDOS1 7 0.1uF 6 12 R4 11 1.00k R5 2.32k IRLR3103N 2R2 10 R8 5mOhm VCC_CORE 9 1.9uH 8 IRLR3103N 2R2 R15 R11 2 C8 1500uF x6 3 + C10 0.1uF R12 1k 3.3V IN + 1.8V OUT IRLR024N 330uF 2.5V OUT IRLR024N + 330uF Revision 11/3/2000 + 330uF 1 www.semtech.com SC1188 POWER MANAGEMENT Absolute Maximum Ratings Parameter Symbol Maximum Units BST to GND -0.3 to +15 V VOSENSE and LDOEN to GND -0.3 to +7 V -0.3 to +5.5 V -0.3 to BST+0.3 V VIDx to GND LDOSx Operating Temperature Range TA 0 to +70 C Junction Temperature Range TJ 0 to +125 C Storage Temperature Range TSTG -65 to +150 C Lead Temperature (Soldering) 10 Sec. TLEAD 300 C Thermal Resistance Junction to Ambient JA 130 C/W Thermal Impedance Junction to Case JC 30 C/W NOTE: (1) This device is ESD sensitive. Use of standard ESD handling precautions is required. Electrical Characteristics Unless otherwise specified: LDOEN = 3.3V; VOSENSE = VO; 0mV < (CS+-CS-) < 60mV; BST = 11.4V to 12.6V; TA = 0 to 70C Parameter Conditions Min Typ Max Units Switching Section Output Voltage IO = 2A in Application Circuit Load Regulation IO = 0.8A to 15A See Output Voltage Table Line Regulation 1 % 0.15 % Current Limit Voltage 60 70 85 mV Oscillator Frequency 175 200 225 kHz Oscillator Max Duty Cycle 90 95 % Peak DH Sink/Source Current BSTH - DH = 4.5V, DH- PGNDH = 3.1V DH- PGNDH = 1.5V 500 100 mA mA Peak DL Sink/Source Current BSTL - DL = 4.5V, DL - PGNDL= 3.1V DL- PGNDH = 1.5V 500 100 mA mA Gain (AOL) VOSENSE to VO VID Source Current VIDx < 2.4V VID Leakage VIDx = 3.3V 1 dB 10 A 10 Dead time 2000 Semtech Corp. 35 40 2 100 A ns www.semtech.com SC1188 POWER MANAGEMENT Electrical Characteristics (Cont.) Unless specified: LDOEN = 3.3V; VOSENSE = VO; 0mV < (CS+-CS-) < 60mV; BST = 11.4V to 12.6V; TA = 0 to 70C Parameter Conditions Min Typ Max Units 5 mA Linear Sections Quiescent Current BST=12V Output Voltage LDO1 2.493 2.525 2.556 V Output Voltage LDO2 1.795 1.818 1.841 V Gain (AOL) LDOS (1,2) to GATE (1,2) Load Regulation IO = 0 to 8A 90 Line Regulation Output Impedance VGATE = 6.5V 1 BST Undervoltage Lockout 1.3 LDOEN Sink Current LDOEN = 3.3V Overcurrent Trip Voltage % of VO Setpoint Power-Up Output Short Circuit Immunity Output Short Circuit Glitch Immunity GATE (1,2) - GND; VCC = BST = 0V VOSENSE Input Impedance 2000 Semtech Corp. 0.3 % 0.3 % 1.5 k 8.0 LDOEN Threshold Gate Pulldown Impedance dB 1.9 V 0.01 -200 1.0 -300 A A 20 40 60 % 1 5 60 ms 0.5 4 6 ms 80 300 750 k 10 3 V k www.semtech.com SC1188 POWER MANAGEMENT Pin Configuration Ordering Information TOP VIEW Device GATE2 1 16 VID0 GATE1 2 15 VID1 LDOS1 3 14 VID2 LDOS2 4 13 VID3 LDOEN 5 12 VOSENSE CS- 6 11 BST CS+ 7 10 DH GND 8 9 DL (1) SC1188CS P ackag e Linear Voltage Temp Range (TJ) SO-16 1.8V/2.5V 0 to 125C Note: (1) Add suffix TR for tape and reel. (SO-16) Pin Descriptions Pin # Pin Name Pin Function 1 GATE2 Gate Drive Output LDO2 2 GATE1 Gate Drive Output LDO1 3 LDOS1 Sense Input for LDO1 4 LDOS2 Sense Input for LDO2 5 LDOEN 3.3V Qualification for LDO1 & 2 6 CS - Current Sense Input (negative) 7 CS+ Current Sense Input (positive) 8 GND Power and Analog Ground 9 DL Low Side Driver Output 10 DH High Side Driver Output 11 BST Supply for all IC circuits 12 VOSENSE Top end of Internal Feedback Chain 13 VID3(1) Programming Input (MSB) 14 VID2(1) Programming Input 15 VID1(1) Programming Input 16 VID0(1) Programming Input (LSB) Note: (1) All logic level inputs and outputs are open collector TTL compatible. 2000 Semtech Corp. 4 www.semtech.com SC1188 POWER MANAGEMENT Block Diagram CS- CS+ CURRENT LIMIT COMPARATOR REFERENCE 70mV D/A VID1 + VID0 LEVEL SHIFT AND HIGH SIDE MOSFET DRIVE - - BST INTERNAL BIAS - VID3 VID2 REGULATOR + + DH ERROR AMP VOSENSE R Q OSCILLATOR SHOOT-THRU CONTROL S 1.265V REFERENCE LDOS1 SYNCHRONOUS MOSFET DRIVE GATE1 FET CONTROLLER 1.8V FET CONTROLLER 2.5V LDOEN GATE2 DL GND LDOS2 Applications Information - Output Voltage Table Unless specified: VCC = 3.13V to 3.47V; GND = PGND = 0V; VOSENSE = VO; 0mV < (CS+-CS-) < 60mV; BST = 11.4V to 12.6V; TA = 0 to 70C Parameter Output Voltage 2000 Semtech Corp. Conditions IO = 2A in Evaluation Board 5 VID 3210 Min. Typ. Max. Units 1111 1.287 1.300 1.313 V 1110 1.336 1.350 1.364 1101 1.386 1.400 1.414 1100 1.435 1.450 1.465 1011 1.485 1.500 1.515 1010 1.534 1.550 1.566 1001 1.584 1.600 1.616 1000 1.633 1.650 1.667 0111 1.683 1.700 1.717 0110 1.732 1.750 1.786 0101 1.782 1.800 1.818 0100 1.831 1.850 1.869 0011 1.881 1.900 1.919 0010 1.930 1.950 1.970 0001 1.980 2.000 2.020 0000 2.029 2.050 2.071 www.semtech.com SC1188 POWER MANAGEMENT Layout Guidelines transition switching. Connections should be as wide and as short as possible to minimize loop inductance. Minimizing this loop area will a) reduce EMI, b) lower ground injection currents, resulting in electrically cleaner grounds for the rest of the system and c) minimize source ringing, resulting in more reliable gate switching signals. Careful attention to layout requirements are necessary for successful implementation of the SC1188 PWM controller. High currents switching at 200kHz are present in the application and their effect on ground plane voltage differentials must be understood and minimized. 1). The high power parts of the circuit should be laid out first. A ground plane should be used, the number and position of ground plane interruptions should be such as to not unnecessarily compromise ground plane integrity. Isolated or semi-isolated areas of the ground plane may be deliberately introduced to constrain ground currents to particular areas, for example the input capacitor and bottom FET ground. 3). The connection between the junction of Q1, Q2 and the output inductor should be a wide trace or copper region. It should be as short as practical. Since this connection has fast voltage transitions, keeping this connection short will minimize EMI. The connection between the output inductor and the sense resistor should be a wide trace or copper area, there are no fast voltage or current transitions in this connection and length is not so important, however adding unnecessary impedance will reduce efficiency. 2). The loop formed by the Input Capacitor(s) (Cin), the Top FET (Q1) and the Bottom FET (Q2) must be kept as small as possible. This loop contains all the high current, fast 3.3V IN 12V IN 1 GATE2 2 3 4 5 5V GATE1 LDOS1 VID0 LDOS2 VID1 LDOEN VID2 16 2.32k 0.1uF 15 Cin Q1 + 1.00k 14 5mOhm Vout 13 VID3 L + Q2 0.1uF 7 6 CS+ VOSENSE CSBST 10 Cout 12 DH 11 9 DL GND 8 SC1188 Heavy lines indicate 3.3V Vo Lin1 Q3 high current paths. + + Cout Lin1 Cin Lin Layout Diagram SC1188 Vo Lin2 Q4 + Cout Lin2 2000 Semtech Corp. 6 www.semtech.com SC1188 POWER MANAGEMENT Layout Guidelines (Cont.) 4) The Output Capacitor(s) (Cout) should be located as close to the load as possible, fast transient load currents are supplied by Cout only, and connections between Cout and the load must be short, wide copper areas to minimize inductance and resistance. 6) BST for the SC1188 should be supplied from the 12V supply, the BST pin should be decoupled directly to GND by a 0.1mF ceramic capacitor, trace lengths should be as short as possible. The SC1188 Internal circuits are powered from this pin. 5) The SC1188 is best placed over a quiet ground plane area, avoid pulse currents in the Cin, Q1, Q2 loop flowing in this area. GND should be returned to the ground plane close to the package and close to the ground side of (one of) the output capacitor(s). If this is not possible, the GND pin may be connected to the ground path between the Output Capacitor(s) and the Cin, Q1, Q2 loop. Under no circumstances should GND be returned to a ground inside the Cin, Q1, Q2 loop. 7) The Current Sense resistor and the divider across it should form as small a loop as possible, the traces running back to CS+ and CS- on the SC1188 should run parallel and close to each other. The 0.1F capacitor should be mounted as close to the CS+ and CS- pins as possible. 8) Ideally, the grounds for the two LDO sections should be returned to the ground side of (one of) the output capacitor(s). 5V Currents in Power Section + Vout + 2000 Semtech Corp. 7 www.semtech.com SC1188 POWER MANAGEMENT Component Selection and 0% duty cycle capability, so some allowance must be made. Choosing an inductor value of 50 to 75% of the calculated maximum will guarantee that the inductor current will ramp fast enough to reduce the voltage dropped across the ESR at a faster rate than the capacitor sags, hence ensuring a good recovery from transient with no additional excursions. We must also be concerned with ripple current in the output inductor and a general rule of thumb has been to allow 10% of maximum output current as ripple current. Note that most of the output voltage ripple is produced by the inductor ripple current flowing in the output capacitor ESR. Ripple current can be calculated from: SWITCHING SECTION OUTPUT CAPACITORS - Selection begins with the most critical component. Because of fast transient load current requirements in modern microprocessor core supplies, the output capacitors must supply all transient load current requirements until the current in the output inductor ramps up to the new level. Output capacitor ESR is therefore one of the most important criteria. The maximum ESR can be simply calculated from: R ESR Vt It Where ILRIPPLE = Vt = Maximum transient voltage excursion It = Transient current step Ripple current allowance will define the minimum permitted inductor value. For example, to meet a 100mV transient limit with a 10A load step, the output capacitor ESR must be less than 10mW. To meet this kind of ESR level, there are three available capacitor technologies. Each Cap. Technology C (F) ESR (m) POWER FETS - The FETs are chosen based on several criteria, with probably the most important being power dissipation and power handling capability. TOP FET - The power dissipation in the top FET is a combination of conduction losses, switching losses and bottom FET body diode recovery losses. Total Qty. Rqd. C (F) VIN 4 L fOSC ESR (m) a) Conduction losses are simply calculated as: PCOND = IO2 RDS(on) Low ESR Tantalum 330 60 6 2000 10 OS-CON 330 25 3 990 8.3 where 1500 44 5 7500 8.3 = duty cycle Low ESR Aluminum The choice of which to use is simply a cost/performance issue, with Low ESR Aluminum being the cheapest, but taking up the most space. b) Switching losses can be estimated by assuming a switching time, if we assume 100ns then: PSW = IO VIN 10 -2 INDUCTOR - Having decided on a suitable type and value of output capacitor, the maximum allowable value of inductor can be calculated. Too large an inductor will produce a slow current ramp rate and will cause the output capacitor to supply more of the transient load current for longer - leading to an output voltage sag below the ESR excursion calculated above. The maximum inductor value may be calculated from: L or more generally, PSW = IO VIN ( t r + t f ) fOSC 4 c) Body diode recovery losses are more difficult to estimate, but to a first approximation, it is reasonable to assume that the stored charge on the bottom FET body diode will be moved through the top FET as it starts to turn on. The resulting power dissipation in the top FET will be: PRR = QRR VIN fOSC R ESR C VA It To a first order approximation, it is convenient to only consider conduction losses to determine FET suitability. For a 5V in; 2.8V out at 14.2A requirement, typical FET losses would be: where VA is the lesser of VO or (VIN - VO ) The calculated maximum inductor value assumes 100% 2000 Semtech Corp. VO VIN 8 www.semtech.com SC1188 POWER MANAGEMENT Component Selection (Cont.) Using 1.5X Room temp RDS(ON) to allow for temperature rise. FET type RDS(on) (m) PD (W) Package IRL34025 15 1.69 D2Pak IRL2203 10.5 1.19 D2Pak Si4410 20 2.26 S0-8 BOTTOM FET - Bottom FET losses are almost entirely due to conduction. The body diode is forced into conduction at the beginning and end of the bottom switch conduction period, so when the FET turns on and off, there is very little voltage across it, resulting in low switching losses. Conduction losses for the FET can be determined by: PCOND = IO2 RDS( on) (1 - ) For the example above: FET type RDS(on) (m) PD (W) Package IRL34025 15 1.33 D2Pak IRL2203 10.5 0.93 D2Pak Si4410 20 1.77 S0-8 Each of the package types has a characteristic thermal impedance. For the surface mount packages on double sided FR4, 2 oz printed circuit board material, thermal impedances of 40oC/W for the D2PAK and 80oC/W for the SO-8 are readily achievable. The corresponding temperature rise is detailed below: Temperature Rise (OC) FET type Top FET Bottom FET IRL34025 67.6 53.2 IRL2203 47.6 37.2 Si4410 180.8 141.6 position, power dissipation will be approximately halved and temperature rise reduced by a factor of 4. INPUT CAPACITORS - since the RMS ripple current in the input capacitors may be as high as 50% of the output current, suitable capacitors must be chosen accordingly. Also, during fast load transients, there may be restrictions on input di/dt. These restrictions require useable energy storage within the converter circuitry, either as extra output capacitance or, more usually, additional input capacitors. Choosing low ESR input capacitors will help maximize ripple rating for a given size. SHORT CIRCUIT PROTECTION - LINEARS The Short circuit feature on the linear controllers is implemented by using the Rds(on) of the FETs. As output current increases, the regulation loop maintains the output voltage by turning the FET on more and more. Eventually, as the Rds(on) limit is reached, the FET will be unably to turn on more fully, and output voltage will start to fall. When the output voltage falls to approximately 50% of nominal, the LDO controller is latched off, setting output voltage to 0. Power must be cycled to reset the latch. To prevent false latching due to capacitor inrush currents or low supply rails, the current limit latch is initially disabled. It is enabled at a preset time (nominally 2ms) after both the VCC and BST rails rise above their lockout points. To be most effective, the linear FET Rds(on) should not be selected artificially low, the FET should be chosen so that, at maximum required current, it is almost fully turned on. If, for example, a linear supply of 1.5V at 4A is required from a 3.3V 5% rail, max allowable Rds(on) would be. Rds(on)max = (0.95*3.3-1.5)/4 400m To allow for temperature effects 200m would be a suitable room temperature maximum, allowing a peak short circuit current of approximately 15A for a short time before shutdown. It is apparent that single SO-8 Si4410 are not adequate for this application, but by using parallel pairs in each 2000 Semtech Corp. 9 www.semtech.com SC1188 POWER MANAGEMENT Typical Characteristics 0.0% Vo=2.0V 85% Regulation (%) Efficiency (%) 90% Vo=1.6V 80% Vo=1.3V 75% 0.0 5.0 10.0 -0.5% -1.0% -1.5% 0.00 15.0 Io (A) 5.00 10.00 15.00 Io (A) Ripple Voltage, Vo=1.6V; Io=15A Transient Response Vo=2.0V, Io=300mA to 15A Transient Response Vo=2.0V, Io=300mA to 15A 2000 Semtech Corp. 10 www.semtech.com 2000 Semtech Corp. 12V 11 C11 330uF + J12 VINLIN + C12 330uF 5 6 7 8 13 VID3 C14 330uF Q5 IRLR024N 4 1 14 VID2 5 LDOS2 GATE2 VID3 VID2 VID1 VID0 + + CS- CS+ + J23 C15 330uF 1.5V VLIN2 J13 LDOS1 GATE1 GND DL DH BST VOSENSE C19 1500uF LDOEN U5 + SC1188CS C18 1500uF 15 + VID1 C3 1500uF 16 SW1 SW DIP-4 J22 + 4 3 2 1 C2 1500uF 5V VID0 CON4 1 2 3 4 J16 J21 J1 3 2 8 9 10 11 12 6 7 C16 330uF Q6 IRLR024N 0.1uF C5 + C4 1uF C17 330uF R9 R6 + + 2.5V VLIN1 J24 J14 Q3 IRLR3103N 2R2 Q1 IRLR3103N 2R2 C24 47uF 2R2 R10 2R2 R7 C1 0.1uF Q4 IRLR3103N Q2 IRLR3103N VID 3210 1111 1110 1101 1100 1011 1010 1001 1000 0111 0110 0101 0100 0011 0010 0001 0000 1.9uH 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05 VOUT L1 R8 1.00k C8 + C6 + C9 DROOP mV/A 0 1 2 5 1 2 5 1 2 5 OFFSET mV/V 0 2 2 2 5 5 5 10 10 10 R11 (Ohm) 0 2.5 3.3 EMPTY 6.3 8.3 EMPTY 12.5 16.7 EMPTY + C7 + R15 (Ohm) EMPTY 10 5 2 25 12.5 5 50 25 10 C23 + 1500uF 1500uF 1500uF 1500uF C22 + C21 + C10 0.1uF VCC_CORE C20 + 1500uF 1500uF 1500uF 1500uF 2.32k R11 See Table 2 5mOhm R5 TABLE VALID FOR 1x5mOhm SENSE RESISTOR R12 1k R15 See Table 2 R4 J18 SCOPE TP CON4 1 2 3 4 J17 SC1188 POWER MANAGEMENT Evaluation Board Schematic www.semtech.com SC1188 POWER MANAGEMENT Evaluation Board Bill of Materials Qty. Reference Value 1 4 C1, C5, C10 0.1F 2 12 C2, C3, C6, C7, C8, C9, C18, C19, C20, C21, C22, C23 1500F Low ESR Sanyo MV-GX or equivalent 1 C4 1F Ceramic 6 C11, C12, C14, C15, C16, C17 330F 1 C24 47F 4 1 L1 1.9H 5 4 Q1, Q2, Q3, Q4 IRLR3103N 6 2 Q5, Q6 IRLR024N 7 1 R4 1.00k 1% 8 1 R5 2.32k 1% 9 4 R6, R7, R9 R10 2R2 10 1 R8 5mOhm 11 2 R15, R11 See Table 12 1 R12 1k 13 1 SW1 SW DIP-4 14 1 U4 SC1188CS 3 2000 Semtech Corp. 12 Notes IRC OAR1 SEMTECH www.semtech.com SC1188 POWER MANAGEMENT Evaluation Board Gerber Plots 2000 Semtech Corp. 13 www.semtech.com SC1188 POWER MANAGEMENT Outline Drawing - SO-16 Land Pattern - SO-16 Contact Information Semtech Corporation Power Management Products Division 652 Mitchell Rd., Newbury Park, CA 91320 Phone: (805)498-2111 FAX (805)498-3804 2000 Semtech Corp. 14 www.semtech.com