1
Features
•Power Amplifier with High Power Added Efficient (PAE),
Pout Typically 29 dBm
•Contr ol led Output Po wer
•Low-noise Preamplifier (NF Typically 1.7 dB)
•Few External Components
•PSSO16 Plastic Package with Down Set Paddle
Description
The T0980 is a monolithic IC manufactured with Atmel’s advanced SiGe technology.
The IC performs a transmit and receive front-end dedicated for a frequency range of
400 MHz to 5 00 MHz. It cons ists of a Low- Noise Amp lifier (LN A) and a Power Ampli-
fier (PA) with good Power Efficiency (PAE).
Electr ostati c sen si ti ve device.
Observe precautions for handling.
Figure 1. Block Diagram
16 13 11 9
1358
Bias
SiGe Transm it/
Receive Front-
end IC
T0980
Rev. 4584A–SIGE–01/03
2T0980 4584A–SIGE–01/03
Pin Configuration
Figure 2. Pinning PSSOP16
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
POUT_
CONTROL
GND
LNA_IN
GND
BIAS_LNA
V2_PA_OUT
V2_PA_OUT
V1_PA
GND
PA_IN
GND
LNA_OUT
VS_CTRL
V2_PA_OUT
GND
T0980
Pin Description
Pin Symbol Function
1 V2_PA_OUT Inductor to power supply and matching network for power amplifier output
2 V2_PA_OUT Inductor to power supply and matching network for power amplifier output
3 GND Ground
4 POUT_CONTROL Power amplifier control input
5 GND Ground
6 LNA_IN Low-n oise amplifier input
7 GND Ground
8 BIAS_LNA Resistor to VS sets the LNA current
9 VS_CTRL Supply voltage for control of power amplifier
10 LNA _OUT Low-noise ampl ifie r output and supply voltage
11 GND Ground
12 PA_IN Power amplifier input
13 GND Ground
14 V1_PA Supply voltage for power amplifier
15 GND Ground
16 V2_PA_OUT Matching network for power amplifier output
3
T0980
4584A–SIGE–01/03
Absolute Maxim u m Ratings
All voltages are refe rred to GND
Parameters Symbol Min. Max. Unit
Supply voltage PA, TX Pins 1, 2, 9 and 14 VS_PA 4.8 V
Supply voltage LNA, RX Pin 10 VS_LNA 2.8 V
Junction temperature Tjmax 150 °C
Storage temperature TStg -55 +125 °C
Electrostatic handling HMB; Pins 1, 2, 6, 10, 12 and 16 VESD 200 V
Electrostatic handling HMB; Pins 3, 4, 5, 7, 8, 9, 11, 13, 14 and 15 VESD 2000 V
Operating Range
All voltages are referred to GND. The following table represents the sum of all supply currents.
P a rame ter s Test Conditions/Pins Symbol Min. Typ. Max. Unit
Supply voltage PA TX, Pins 1, 2, 9 and 14 VS_PA 3.6 4.5 V
Supply voltage LNA RX, Pin 10 VS_LNA 2.5 2.6 V
Supply current PA TX, Pins 1, 2, 9 and 14 IS_PA 400 mA
Supply current LNA Pins 10 and 8 IS_LNA 2.5 mA
Ambient tem per a ture Tamb -25 25 60 °C
Thermal Resistance
Parameters Symbol Value Unit
Junction ambient RthJA 25 K/W
4T0980 4584A–SIGE–01/03
Note: 1. Power amplifier should be unconditional stable, maximum duty cycle 100%, true cw-operation, maximum load mismatch
10:1 for 5 s at 3.6 V
Electrical Characteristics
Test conditions (unless otherwise specified) : VS_PA = 3.6 V, Tamb = 25°C.
P a rame ter s Test Conditions/Pins Symbol Min. Typ. Max. Unit
Power Amplifier (1)
Supply voltage TX, Pins 1, 2, 9 and 14 VS_PA 3.6 V
Supply current TX, Pins 1, 2, 9 and 14 IS_PA 400 mA
Frequency range TX f 400 500 MHz
Power gain TX Gp 33 dB
Control v o lta ge TX, output power (maximum ), Pin 4 2.5 V
TX, output power (minim um), Pin 4 0.7 V
Control cu rrent Pin 4 0 400 µA
Shut down mode Control voltage £ 0.1 V,
Pins 1, 2, 9 and 14 IS_PA 10 µA
Power added efficiency TX at 450 MHz PAE 50 %
Saturated output power TX, input power 3 dBm Psat 29 dBm
Harmonics TX, input power 3 dBm 2 fo -20 dBc
TX, input power 3 dBm 3 fo -20 dBc
Low-noise Amplifier
Supply voltage RX, Pins 8 and 10 VS_LNA 2.5 V
Supply current RX at R1 = 5.6 kW, Pins 8 and 10 IS_LNA 2.5 mA
Frequency range RX f 400 500 MHz
Power gain RX at R1 = 5.6 kW, Is = 2.5 mA Gp 19 dB
Noise figure RX at R1 = 5.6 kW, Is = 2.5 mA NF 1.7 2.5 dB
Isolation RX at R1 = 5.6 kW, Is = 2.5 mA ISO 20 dB
3rd-order input interception point RX at R1 = 5.6 kW, Is = 2.5 mA IIP3 -10 dBm
5
T0980
4584A–SIGE–01/03
Typical Characteristics
Figure 3. Power Sweep
Figure 4. Ramp Sweep
Figure 5. VCC Sweep
-20.0
-10.0
0.0
10.0
20.0
30.0
40.0
50.0
60.0
70.0
-50.0 -40.0 -30.0 -20.0 -10.0 0.0 10.0 20.0
Pin (dBm)
PAE (%)
Pout (dBm)
Gain (dB)
Pout
Gain
PAE
0
10
20
30
40
50
60
70
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50
Vramp (V)
PAE (%)
Pout (dBm)
Pout
PAE
0.0
10.0
20.0
30.0
40.0
50.0
60.0
70.0
0.0 1.0 2.0 3.0 4.0 5.0
VCC (V)
PAE (%)
Pout (dBm)
PAE
Pout
6T0980 4584A–SIGE–01/03
Figure 6. Typical Application Circuit (460 MHz)
1
Bias
2
3
4
5
6
7
8
10
11
12
13
14
15
16
9
L4
6.8nH
C8
2.7pF
C1
1nF
C3
100pF
R3
39 L2
39nH
L5
22nH
L6
4.7nH
L1
1.5nH
C10
12pF
C11
100pF
PA_OUT
C9
100pF
POUT_CTRL
LNA_IN
BIAS_LNA
C13
100pF
R1
5.6k
C14
8.2pF
C16
NC
L7
22nH
PA_IN
LNA_OUT
C4
NC
C5
3.9pF
L3
22nH
C6
100pF
C18
10nF
R2
0
VS_CTRL
C7
100pF
C17
NC
VS_PA
C15
100pF
GND
C2
1uF
C12
1uF
VS_LNA
T0980
7
T0980
4584A–SIGE–01/03
Package Information
Ordering Information
Extended Type Number Package Remarks
T0980-TJS PSSO16 Tube
T0980-TJQ PSSO16 Taped and reeled
Printed on recycled paper.
© Atmel Corporation 2003.
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which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors
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not make any com mitment to update the infor mation contained herein. No licenses to patents or o ther intellectual proper ty of Atmel are granted
by the Company in connection with the s ale of A tmel products, expressly or by implication. Atm el’s produc ts are not aut hor ized for use as critical
components in life suppor t devices or systems.
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4584A–SIGE–01/03 xM
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