To learn more about ON Semiconductor, please visit our website at
www.onsemi.com
Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers
will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor
product management systems do not have the ability to manage part nomenclature that utilizes an underscore
(_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain
device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated
device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please
email any questions regarding the system integration to Fairchild_questions@onsemi.com.
Is Now Part of
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right
to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out
of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor
is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
HUF76407D3S
N-Channel Logic Level UltraFET Power MOSFET
60 V, 11 A, 107 mΩ
Packaging
Symbol
Features
• Ultra Low On-Resistance
-r
DS(ON) = 0.092Ω, VGS = 10V
-r
DS(ON) = 0.107Ω, VGS = 5V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Switching Time vs RGS Curves
Ordering Information
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
For severe environments, see our Automotive HUFA series.
JEDEC TO-252AA
GATE
SOURCE
DRAIN
(FLANGE)
D
G
SPART NUMBER PACKAGE BRAND
HUF76407D3ST TO-252AA 76407D
HUF76407D3STUNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 60 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 60 V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±16 V
Drain Current
Continuous (TC = 25oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TC = 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TC = 135oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TC = 135oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
11
12
6
6
Figure 4
A
A
A
A
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS Figures 6, 14, 15
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
38
0.25
W
W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 175 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
300
260
oC
oC
NOTE:
1. TJ = 25oC to 150oC.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Data Sheet October 2013
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 12) 60 - - V
ID = 250µA, VGS = 0V , TC = -40oC (Figure 12) 55 - - V
Zero Gate Voltage Drain Current IDSS VDS = 55V, VGS = 0V - - 1 µA
VDS = 50V, VGS = 0V, TC = 150oC - - 250 µA
Gate to Source Leakage Current IGSS VGS = ±16V - - ±100 nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 11) 1 - 3 V
Drain to Source On Resistance rDS(ON) ID = 13A, VGS = 10V (Figures 9, 10) - 0.077 0.092 Ω
ID = 8A, VGS = 5V (Figure 9) - 0.095 0.107 Ω
ID = 8A, VGS = 4.5V (Figure 9) - 0.107 0.117 Ω
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case RθJC TO-252 - - 3.94 oC/W
Thermal Resistance Junction to
Ambient
RθJA - - 100 oC/W
SWITCHING SPECIFICATIONS (VGS = 4.5V)
Turn-On Time tON VDD = 30V, ID = 8A
VGS = 4.5V, RGS = 32Ω
(Figures 15, 21, 22)
- - 170 ns
Turn-On Delay Time td(ON) -8-ns
Rise Time tr- 105 - ns
Turn-Off Delay Time td(OFF) -22-ns
Fall Time tf-39-ns
Turn-Off Time tOFF - - 92 ns
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time tON VDD = 30V, ID = 13A
VGS = 10V,
RGS = 32Ω
(Figures 16, 21, 22)
- - 56 ns
Turn-On Delay Time td(ON) -5-ns
Rise Time tr-32-ns
Turn-Off Delay Time td(OFF) -43-ns
Fall Time tf- 45 - ns
Turn-Off Time tOFF - - 132 ns
GATE CHARGE SPECIFICATIONS
Total Gate Charge Qg(TOT) VGS = 0V to 10V VDD = 30V,
ID = 8A,
Ig(REF) = 1.0mA
(Figures 14, 19, 20)
- 9.4 11.3 nC
Gate Charge at 5V Qg(5) VGS = 0V to 5V - 5.2 6.2 nC
Threshold Gate Charge Qg(TH) VGS = 0V to 1V - 0.36 0.43 nC
Gate to Source Gate Charge Qgs - 1.2 - nC
Reverse Transfer Capacitance Qgd - 2.5 - nC
CAPACITANCE SPECIFICATIONS
Input Capacitance CISS VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 13)
- 350 - pF
Output Capacitance COSS - 105 - pF
Reverse Transfer Capacitance CRSS -23-pF
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage VSD ISD =8A - - 1.25 V
ISD = 3A - - 1.0 V
Reverse Recovery Time trr ISD = 8A, dISD/dt = 100A/µs--66ns
Reverse Recovered Charge QRR ISD = 8A, dISD/dt = 100A/µs - - 159 nC
HUF76407D3S
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
Typical Performance Curves
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. PEAK CURRENT CAPABILITY
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 175
0.2
0.4
0.6
0.8
1.0
1.2
125 150
5
10
15
25 50 75 100 125 150 175
0
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
VGS = 10V
VGS = 4.5V
0.1
1
10-5 10-4 10-3 10-2 10-1 100101
0.01
2
t, RECTANGULAR PULSE DURATION (s)
ZθJC, NORMALIZED
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
PDM
t1
t2
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.01
0.02
THERMAL IMPEDANCE
100
10-5 10-4 10-3 10-2 10-1 100101
200
10
IDM, PEAK CURRENT (A)
t, PULSE WIDTH (s)
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
TC = 25oC
I = I25 175 - TC
150
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
VGS = 5V
HUF76407D3S
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
FIGURE 7. TRANSFER CHARACTERISTICS FIGURE 8. SATURATION CHARACTERISTICS
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves (Continued)
1
10
100
1 10 100
0.1
200
100µs
10ms
1ms
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
LIMITED BY rDS(ON)
AREA MAY BE
OPERATION IN THIS
TJ = MAX RATED TC = 25oC
SINGLE PULSE
10
100
0.001 0.01 0.1 1 10
1
IAS, AVALANCHE CURRENT (A)
tAV, TIME IN AVALANCHE (ms)
STARTING TJ = 25oC
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R = 0
If R ≠ 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
STARTING TJ = 150oC
3
6
9
12
15
2345
0
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDD = 15V
TJ = 175oC
TJ = 25oC
TJ = -55oC
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 3V
VGS = 5V
VGS = 10V
VGS = 4V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
3
6
9
12
15
01234
0
VGS = 3.5V
Tc = 25oC
90
120
150
246810
60
ID = 3A
VGS, GATE TO SOURCE VOLTAGE (V)
rDS(ON), DRAIN TO SOURCE
ON RESISTANCE (mΩ)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TC = 25oC
ID = 12A
ID = 5A
1.0
1.5
2.0
2.5
-80 -40 0 40 80 120 160 200
0.5
NORMALIZED DRAIN TO SOURCE
TJ, JUNCTION TEMPERATURE (oC)
ON RESISTANCE
VGS = 10V, ID = 12A
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
HUF76407D3S
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
0.8
1.0
1.2
-80 -40 0 40 80 120 160 200
0.6
NORMALIZED GATE
TJ, JUNCTION TEMPERATURE (oC)
VGS = VDS, ID = 250µA
THRESHOLD VOLTAGE
1.0
1.1
1.2
-80 -40 0 40 80 120 160 200
0.9
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
ID = 250µA
100
1000
0.1 1.0 10 60
10
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 0V, f = 1MHz
CISS = CGS + CGD
COSS ≅ CDS + CGD
CRSS = CGD
2
4
6
8
10
0246810
0
V
GS
, GATE TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
V
DD
= 30V
I
D
= 12A
I
D
= 5A
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 3A
50
100
150
0 1020304050
0
SWITCHING TIME (ns)
RGS, GATE TO SOURCE RESISTANCE (Ω)
VGS = 4.5V, VDD = 30V, ID = 6A
tr
tf
td(ON)
td(OFF)
20
40
60
80
0 1020304050
0
SWITCHING TIME (ns)
RGS, GATE TO SOURCE RESISTANCE (Ω)
VGS = 10V, VDD = 30V, ID = 12A
tr
td(ON)
tf
td(OFF)
Typical Performance Curves (Continued)
HUF76407D3S
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
Test Circuits and Waveforms
FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 18. UNCLAMPED ENERGY WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
FIGURE 21. SWITCHING TIME TEST CIRCUIT FIGURE 22. SWITCHING TIME WAVEFORM
tP
VGS
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
RL
VGS +
-
VDS
VDD
DUT
Ig(REF)
VDD
Qg(TH)
VGS = 1V
Qg(5)
VGS = 5V
Qg(TOT)
VGS = 10V
VDS
VGS
Ig(REF)
0
0
Qgs Qgd
VGS
RL
RGS
DUT
+
-
VDD
VDS
VGS
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
HUF76407D3S
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
PSPICE Electrical Model
.SUBCKT HUF76407 2 1 3 ; rev 28June 1999
CA 12 8 3.9e-9
CB 15 14 4.9e-9
CIN 6 8 3.25e-10
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 67.8
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1.0e-9
LGATE 1 9 5.42e-9
LSOURCE 3 7 2.57e-9
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 3.7e-2
RGATE 9 20 3.37
RLDRAIN 2 5 10
RLGATE 1 9 54.2
RLSOURCE 3 7 25.7
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 2.50e-2
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*30),3))}
.MODEL DBODYMOD D (IS = 1.75e-13 RS = 1.75e-2 TRS1 = 1e-4 TRS2 = 5e-6 CJO = 5.9e-10 TT = 5.45e-8 N = 1.03 M = 0.6)
.MODEL DBREAKMOD D (RS = 6.50e-1 TRS1 = 1.25e-4 TRS2 = 1.34e-6)
.MODEL DPLCAPMOD D (CJO = 3.21e-10 IS = 1e-30 N = 10 M = 0.81)
.MODEL MMEDMOD NMOS (VTO = 2.02 KP = .83 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.37)
.MODEL MSTROMOD NMOS (VTO = 2.39 KP = 14 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 1.78 KP = 0.02 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 33.7 RS = 0.1)
.MODEL RBREAKMOD RES (TC1 = 1.06e-3 TC2 = 0)
.MODEL RDRAINMOD RES (TC1 = 1.23e-2 TC2 = 2.58e-5)
.MODEL RSLCMOD RES (TC1 = 0 TC2 = 0)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 0)
.MODEL RVTHRESMOD RES (TC1 = -2.19e-3 TC2 = -4.97e-6)
.MODEL RVTEMPMOD RES (TC1 = -1.6e-3 TC2 = 1e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4 VOFF= -2.5)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.5 VOFF= -4)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.5 VOFF= 0)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0 VOFF= -0.5)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
18
22
+-
6
8
+
-
5
51
+
-
19
8
+-
17
18
6
8
+
-
5
8+
-
RBREAK
RVTEMP
VBAT
RVTHRES
IT
17 18
19
22
12
13
15
S1A
S1B
S2A
S2B
CA CB
EGS EDS
14
8
13
8
14
13
MWEAK
EBREAK DBODY
RSOURCE
SOURCE
11
73
LSOURCE
RLSOURCE
CIN
RDRAIN
EVTHRES 16
21
8
MMED
MSTRO
DRAIN
2
LDRAIN
RLDRAIN
DBREAK
DPLCAP
ESLC
RSLC1
10
5
51
50
RSLC2
1
GATE RGATE
EVTEMP
9
ESG
LGATE
RLGATE
20
+
-
+
-
+
-
6
HUF76407D3S
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
SABER Electrical Model
REV 28 June 1999
template huf76407 n2,n1,n3
electrical n2,n1,n3
{
var i iscl
d..model dbodymod = (is = 1.75e-13, cjo = 5.9e-10, tt = 5.45e-8, n=1.03, m = 0.6)
d..model dbreakmod = ()
d..model dplcapmod = (cjo = 3.21e-10, is = 1e-30, m = 0.81 )
m..model mmedmod = (type=_n, vto = 2.02, kp = .83, is = 1e-30, tox = 1)
m..model mstrongmod = (type=_n, vto = 2.39, kp = 14, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 1.78, kp = 0.02, is = 1e-30, tox = 1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -4, voff = -2.5)
sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = -2.5, voff = -4)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -0.5, voff = 0)
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0, voff = -0.5)
c.ca n12 n8 = 3.9e-10
c.cb n15 n14 = 4.9e-10
c.cin n6 n8 = 3.25e-10
d.dbody n7 n71 = model=dbodymod
d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod
i.it n8 n17 = 1
l.ldrain n2 n5 = 1.0e-9
l.lgate n1 n9 = 5.42e-9
l.lsource n3 n7 = 2.57e-9
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
res.rbreak n17 n18 = 1, tc1 = 1.06e-3, tc2 = 0
res.rdbody n71 n5 = 1.75e-2, tc1 = 1e-4, tc2 = 5e-6
res.rdbreak n72 n5 = 6.50e-1, tc1 = 1.25e-4, tc2 = 1.34e-6
res.rdrain n50 n16 = 3.7e-2, tc1 = 1.23e-2, tc2 = 2.58e-5
res.rgate n9 n20 = 3.37
res.rldrain n2 n5 = 10
res.rlgate n1 n9 = 54.2
res.rlsource n3 n7 = 25.7
res.rslc1 n5 n51 = 1e-6, tc1 = 0, tc2 =0
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 2.50e-2, tc1 = 1e-3, tc2 =0
res.rvtemp n18 n19 = 1, tc1 = -1.6e-3, tc2 = 1.0e-7
res.rvthres n22 n8 = 1, tc1 = -2.19e-3, tc2 = -4.97e-6
spe.ebreak n11 n7 n17 n18 = 67.8
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc=1
equations {
i (n51->n50) +=iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/30))** 3))
}
}
18
22
+-
6
8
+
-
19
8
+-
17
18
6
8
+
-
5
8+
-
RBREAK
RVTEMP
VBAT
RVTHRES
IT
17 18
19
22
12
13
15
S1A
S1B
S2A
S2B
CA CB
EGS EDS
14
8
13
8
14
13
MWEAK
EBREAK
DBODY
RSOURCE
SOURCE
11
73
LSOURCE
RLSOURCE
CIN
RDRAIN
EVTHRES 16
21
8
MMED
MSTRO
DRAIN
2
LDRAIN
RLDRAIN
DBREAK
DPLCAP
ISCL
RSLC1
10
5
51
50
RSLC2
1
GATE RGATE
EVTEMP
9
ESG
LGATE
RLGATE
20
+
-
+
-
+
-
6
RDBODY
RDBREAK
72
71
HUF76407D3S
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
SPICE Thermal Model
REV 28June 1999
HUF76407T
CTHERM1 th 6 4.5e-4
CTHERM2 6 5 2.5e-3
CTHERM3 5 4 1.9e-3
CTHERM4 4 3 2.6e-3
CTHERM5 3 2 5.5e-3
CTHERM6 2 tl 1.8e-2
RTHERM1 th 6 3.1e-2
RTHERM2 6 5 15.1e-2
RTHERM3 5 4 4.2e-1
RTHERM4 4 3 8.4e-1
RTHERM5 3 2 8.7e-1
RTHERM6 2 tl 1.5
SABER Thermal Model
SABER thermal model HUF76407T
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 6 = 4.5e-4
ctherm.ctherm2 6 5 = 2.5e-3
ctherm.ctherm3 5 4 = 1.9e-3
ctherm.ctherm4 4 3 = 2.6e-3
ctherm.ctherm5 3 2 = 5.5e-3
ctherm.ctherm6 2 tl = 1.8e-2
rtherm.rtherm1 th 6 = 3.1e-2
rtherm.rtherm2 6 5 = 15.1e-2
rtherm.rtherm3 5 4 = 4.2e-1
rtherm.rtherm4 4 3 = 8.4e-1
rtherm.rtherm5 3 2 = 8.7e-1
rtherm.rtherm6 2 tl = 1.5
}
RTHERM4
RTHERM6
RTHERM5
RTHERM3
RTHERM2
RTHERM1
CTHERM4
CTHERM6
CTHERM5
CTHERM3
CTHERM2
CTHERM1
tl
2
3
4
5
6
th JUNCTION
CASE
HUF76407D3S
©2001 Fairchild Semiconductor Corporation HUF76407D3S Rev. C0
HUF76407D3S
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
AccuPower™
AX-CAP®*
BitSiC™
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT™
CTL™
Current Transfer Logic™
DEUXPEED®
Dual Cool™
EcoSPARK®
EfficentMax™
ESBC™
Fairchild®
Fairchild Semiconductor®
FACT Quiet Series™
FACT®
FAST®
FastvCore™
FETBench™
FPS™
F-PFS™
FRFET®
Global Power ResourceSM
GreenBridge™
Green FPS™
Green FPS™ e-Series™
Gmax™
GTO™
IntelliMAX™
ISOPLANAR™
Marking Small Speakers Sound Louder
and Better™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MicroPak2™
MillerDrive™
MotionMax™
mWSaver®
OptoHiT™
OPTOLOGIC®
OPTOPLANAR®
PowerTrench®
PowerXS™
Programmable Active Droop™
QFET®
QS™
Quiet Series™
RapidConfigure™
Saving our world, 1mW/W/kW at a time™
SignalWise™
SmartMax™
SMART START™
Solutions for Your Success™
SPM®
STEALTH™
SuperFET®
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SupreMOS®
SyncFET™
Sync-Lock™
®*
TinyBoost®
TinyBuck®
TinyCalc™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
TranSiC™
TriFault Detect™
TRUECURRENT®*
SerDes™
UHC®
Ultra FRFET™
UniFET™
VCX™
VisualMax™
VoltagePlus™
XS™
®
™
Datasheet Identification Product Status Definition
Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
ANTI-COUNTERFEITING POLICY
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
www.Fairchildsemi.com, under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed
application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild
Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of
up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and
warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is
committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
Rev. I66
tm
®
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
www.onsemi.com
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
© Semiconductor Components Industries, LLC
