FEATURES
DCOMPLETE CURRENT SENSE SOLUTION
D0.6V INTERNAL VOLTAGE REFERENCE
DINTERNAL OPEN-DRAIN COMPARATOR
DLATCHING CAPABILITY ON COMPARATOR
DCOMMON-MODE RANGE: −16V to +80V
DHIGH ACCURACY: 3.5% MAX ERROR OVER
TEMPERATURE
DBANDWIDTH: 500kHz (INA200)
DQUIESCENT CURRENT: 1800µA (max)
DPACKAGES: SO-8, MSOP-8
APPLICATIONS
DNOTEBOOK COMPUTERS
DCELL PHONES
DTELECOM EQUIPMENT
DAUTOMOTIVE
DPOWER MANAGEMENT
DBATTERY CHARGERS
DWELDING EQUIPMENT
DESCRIPTION
The INA200, INA201, and INA202 are high-side
current-shunt monitors with voltage output. The
INA200−INA202 can sense drops across shunts at
common-mode voltages from −16V to 80V. The
INA200−INA202 are available with three output voltage
scales: 20V/V, 50V/V, and 100V/V, with up to 500kHz
bandwidth.
The INA200, INA201, and INA202 also incorporate an
open-drain comparator and internal reference providing a
0.6V threshold. External dividers are used to set the
current trip point. The comparator includes a latching
capability, which can be made transparent by grounding
(or leaving open) the RESET pin.
The INA200, INA201, and INA202 operate from a single
+2.7V to +18V supply, drawing a maximum of 1800µA of
supply current. Package options include the very small
MSOP-8 and the SO-8. All versions are specified over the
extended operating temperature range of −40°C to
+125°C.
G
0.6V
Reference
Comparator
OUT
CMPIN CMPOUT
VIN−
VIN+
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
RESET
GND
V+
2
3
4
6
5
7
8
1
INA200
INA201
INA202
SBOS374B − NOVEMBER 2006 − REVISED OCTOBER 2007
High-Side Measurement Current-Shunt Monitor
with Comparator and Reference
IN A200
! !
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Copyright 2006−2007, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
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ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ 18V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current-Shunt Monitor Analog Inputs, VIN+, VIN−
Differential (VIN+) − (VIN−) −18V to +18V. . . . . . . . . . . . . . . . . .
Common Mode(2) −16V to +80V. . . . . . . . . . . . . . . . . . . . . . . .
Comparator Analog Input and Reset Pins(2) . . . . . . . . . . . . . . . . .
GND − 0.3V to (V+) + 0.3V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog Output, Out(2) GND − 0.3V to (V+) + 0.3V. . . . . . . . . . . . .
Comparator Output, Out Pin(2) GND − 0.3V to 18V. . . . . . . . . . . . .
Input Current Into Any Pin(2) 5mA. . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature −55°C to +150°C. . . . . . . . . . . . . . . . . . . . .
Storage Temperature −65°C to +150°C. . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Ratings:
Human Body Model (HBM) 4000V. . . . . . . . . . . . . . . . . . . . . . .
Charged Device Model (CDM) 1000V. . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, a n d
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) This voltage may exceed the ratings shown if the current at that
pin is limited to 5mA.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PRODUCT GAIN PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
INA200
20V/V
MSOP-8 DGK BQH
INA200
20V/V
SO-8 D INA200A
INA201
50V/V
MSOP-8 DGK BQJ
INA201
50V/V
SO-8 D INA201A
INA202
100V/V
MSOP-8 DGK BQL
INA202
100V/V
SO-8 D INA202A
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
PIN CONFIGURATIONS
1
2
3
4
8
7
6
5
VIN+
VIN−
CMPOUT
RESET
V+
OUT
CMPIN
GND
INA200−INA202
MSOP−8 (DGK)
SO−8 (D)
T OP VIEW
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ELECTRICAL CHARACTERISTICS: CURRENT-SHUNT MONITOR
Boldface limits apply over the specified temperature range: TA = −40°C to +125°C.
At TA = +25°C, VS = +12V, VCM = +12V , VSENSE = 100mV, RL = 10kΩ to GND, RPULL-UP = 5.1kΩ connected from CMPOUT to VS, and CMPIN = GND,
unless otherwise noted. INA200, INA201, INA202
CURRENT-SHUNT MONITOR
PARAMETERS CONDITIONS MIN TYP MAX UNITS
INPUT
Full-Scale Sense Input Voltage VSENSE VSENSE = VIN+ − VIN− 0.15 (VS − 0.25)/Gain V
Common-Mode Input Range VCM −16 80 V
Common-Mode Rejection CMR VIN+ = −16V to +80V 80 100 dB
Over Temperature VIN+ = +12V to +80V 100 123 dB
Offset Voltage, RTI(1) VOS ±0.5 ±2.5 mV
+25°C to +125°C±3 mV
−40°C to +25°C±3.5 mV
vs Temperature dVOS/dT TMIN to TMAX 5µV/°C
vs Power Supply PSR VOUT = 2V, VIN+ = +18V, 2.7V 2.5 100 µV/V
Input Bias Current, VIN− Pin IB±9±16 µA
OUTPUT (VSENSE ≥ 20mV)
Gain: G
INA200 20 V/V
INA201 50 V/V
INA202 100 V/V
Gain Error VSENSE = 20mV to 100mV ±0.2 ±1 %
Over Temperature VSENSE = 20mV to 100mV ±2 %
Total Output Error(2) VSENSE = 120mV, VS = +16V ±0.75 ±2.2 %
Over Temperature VSENSE = 120mV, VS = +16V ±3.5 %
Nonlinearity Error(3) VSENSE = 20mV to 100mV ±0.002 %
Output Impedance RO1.5 Ω
Maximum Capacitive Load No Sustained Oscillation 10 nF
OUTPUT (VSENSE < 20mV)(4)
INA200, INA201, INA202 −16V ≤ VCM < 0V 300 mV
INA200 0V ≤ VCM ≤ VS, VS = 5V 0.4 V
INA201 0V ≤ VCM ≤ VS, VS = 5V 1 V
INA202 0V ≤ VCM ≤ VS, VS = 5V 2 V
INA200, INA201, INA202 VS < VCM ≤ 80V 300 mV
VOLTAGE OUTPUT(5)
Output Swing to the Positive Rail VIN− = 11V, VIN+ = 12V (V+) − 0.15 (V+) − 0.25 V
Output Swing to GND(6) VIN− = 0V, VIN+ = −0.5V (VGND) + 0.004 (VGND) + 0.05 V
FREQUENCY RESPONSE
Bandwidth: BW
INA200 CLOAD = 5pF 500 kHz
INA201 CLOAD = 5pF 300 kHz
INA202 CLOAD = 5pF 200 kHz
Phase Margin CLOAD < 10nF 40 Degrees
Slew Rate SR 1 V/µs
Settling T ime (1%) VSENSE = 10mVPP to 100mVPP,
CLOAD = 5pF 2µs
NOISE, RTI
Voltage Noise Density 40 nV/√Hz
(1) Of fset is extrapolated from measurements of the output at 20mV and 100mV VSENSE.
(2) Total output error includes effects of gain error and VOS.
(3) Linearity is best fit to a straight line.
(4) For details on this region of operation, see the Accuracy Variations as a Result of VSENSE and Common-Mode Voltage section in the Applications Information.
(5) See Typical Characteristic curve Output Swing vs Output Current.
(6) Specified by design.
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ELECTRICAL CHARACTERISTICS: COMPARATOR
Boldface limits apply over the specified temperature range: TA = −40°C to +125°C.
At TA = +25°C, VS = +12V, VCM = +12V , VSENSE = 100mV, RL = 10kΩ to GND, and RPULL-UP = 5.1kΩ connected from CMPOUT to VS, unless otherwise
noted. INA200, INA201, INA202
COMPARATOR PARAMETERS CONDITIONS MIN TYP MAX UNITS
OFFSET VOL TAGE
Threshold TA = +25°C 590 608 620 mV
Over Temperature 586 625 mV
Hysteresis(1) TA = −40°C to +85°C −8 mV
INPUT BIAS CURRENT(2)
CMPIN Pin 0.005 10 nA
vs Temperature 15 nA
INPUT VOLTAGE RANGE
CMPIN Pin 0V to VS − 1.5V V
OUTPUT (O PEN-DRAIN)
Large-Signal Differential Voltage Gain CMP VOUT 1V to 4V, RL ≥ 15kΩ Connected to 5V 200 V/mV
High-Level Leakage Current(3)(4) ILKG VID = 0.4V, VOH = VS0.0001 1µA
Low-Level Output Voltage(3) VOL VID = −0.6V, IOL = 2.35mA 220 300 mV
RESPONSE TIME
Response Time(5) RL to 5V, CL = 15pF, 100mV Input Step with 5mV Overdrive 1.3 µs
RESET
RESET Threshold(6) 1.1 V
Logic Input Impedance 2 MΩ
Minimum RESET Pulse Width 1.5 µs
RESET Propagation Delay 3µs
(1) Hysteresis refers to the threshold (the threshold specification applies to a rising edge of a noninverting input) of a falling edge on the noninverting input of the
comparator; refer to Figure 1.
(2) Specified by design.
(3) VID refers to the differential voltage at the comparator inputs.
(4) Open-drain output can be pulled to the range of +2.7V to +18V, regardless of VS.
(5) The comparator response time specified is the interval between the input step function and the instant when the output crosses 1.4V.
(6) The RESET input has an internal 2MΩ (typical) pull-down. Leaving RESET open results in a LOW state, with transparent comparator operation.
Hysteresis = VTHRESHOLD −8mV
VTHRESHOLD
Input Voltage
0.6V0.592V
Figure 1. Typical Comparator Hysteresis
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ELECTRICAL CHARACTERISTICS: GENERAL
Boldface limits apply over the specified temperature range: TA = −40°C to +125°C.
At TA = +25°C, VS = +12V, VCM = +12V, VSENSE = 100mV, RL = 10kΩ to GND, RPULL-UP = 5.1kΩ connected from CMPOUT to VS, and CMPIN = 1V ,
unless otherwise noted. INA200, INA201, INA202
GENERAL PARAMETERS CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
Operating Power Supply VS+2.7 +18 V
Quiescent Current IQVOUT = 2V 1350 1800 µA
Over Temperature VSENSE = 0mV 1850 µA
Comparator Power-On Reset Threshold(1) 1.5 V
TEMPERATURE
Specified Temperature Range −40 +125 °C
Operating Temperature Range −55 +150 °C
Storage Temperature Range −65 +150 °C
Thermal Resistance qJA
MSOP-8 Surface-Mount 200 °C/W
SO-8 150 °C/W
(1) The INA200, INA201, and INA202 are designed to power-up with the comparator in a defined reset state as long as RESET is open or grounded. The comparator
is in reset as long as the power supply is below the voltage shown here. The comparator assumes a state based on the comparator input above this supply voltage.
If RESET is high at power-up, the comparator output comes up high and requires a reset to assume a low state, if appropriate.
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TYPICAL CHARACTERISTICS
At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
45
40
35
30
25
20
15
10
510k 100k
Gain (dB)
Frequency (Hz)
GAIN vs FREQUENCY
1M
G = 100 CLOAD = 1000pF
G=50
G=20
45
40
35
30
25
20
15
10
510k 100k
Gain (dB)
Frequency (Hz)
GAIN vs FREQUENCY
1M
G=100
G=50
G=20
20
18
16
14
12
10
8
6
4
2
020 100 200 300 400 500 600 700
VOUT (V)
VDIFFERENTIAL (mV)
GAIN PLOT
800 900
50V/V
20V/V
100V/V
140
130
120
110
100
90
80
70
60
50
40 10 100 1k 10k
Common−Mode and
Power−Supply Rejection (dB)
Frequency (Hz)
COMMON−MODE AND POWER−SUPPLY REJECTION
vs FREQUENCY
100k
CMR
PSR
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0050 100 150 200 250 300 350
Output Error
(% error of the ideal output value)
VSENSE (mV)
OUTPUT ERROR vs VSENSE
400 450 500
0.1
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0−16 −12 −8−40 4 1282016
Output Error (% )
Common−Mode Voltage (V)
OUTPUT ERROR vs COMMON−MODE VOLTAGE
... 76 80
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
12
11
10
9
8
7
6
5
4
3
2
1
00510
15 20
Output Voltage (V)
Output Current (mA)
POSITIVE OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
25 30
VS=12V
+25_C
+25_C
−40_C
−40_C
+125_C
+125_C
Sourcing Current
VS=3V
Sourcing Current Output stage is designed
to source current. Current
sinking capability is
approximately 400µA.
3.5
3.0
2.5
2.0
1.5
1.0
0.5
001234567
IQ(mA)
Output Voltage (V)
QUIESCENT CURRENT vs OUTPUT VOLTAGE
8910
2.00
1.75
1.50
1.25
1.00
0.75
0.50−16 −12 −8−40 4 81216
20 24 28
IQ(mA)
VCM (V)
QUIESCENT CURRENT
vs COMMON−MODE VOLTAGE
32 36
VSENSE =0mV
VS= 12V
VS=2.7V
VSENSE =100mV
VS=12V VS=2.7V
34
30
26
22
18
14
10
62.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5
Output Short−Circuit Current (mA)
Supply Voltage (V)
OUTPUT SHORT−CIRCUIT CURRENT
vs SUPPLY VOLTAGE
11.5 17 18
−40_C
+25_C
+125_C
STEP RESPONSE
Output Voltage (50mV/div)
Time (2µs/div)
G=20
VSENSE = 10mV to 20mV
Time (2µs/div)
G=20
STEP RESPONSE
Output Voltage (500mV/div)
VSENSE =10mVto100mV
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
Time (2µs/div)
G=20
STEP RESPONSE
Output Voltage (50mV/div)
VSENSE = 90mV to 100mV
Time (5µs/div)
G=50
STEP RESPONSE
Output Voltage (100mV/div)
VSENSE = 10mV to 20mV
Time (5µs/div)
G=50
STEP RESPONSE
Output Voltage (1V/div)
VSENSE = 10mV to 100mV
Time (5µs/div)
G=50
STEP RESPONSE
Output Voltage (100mV/div)
VSENSE = 90mV to 100mV
Time (10µs/div)
G=100
STEP RESPONSE
Output Voltage (2V/div)
VSENSE = 10mV to 100mV
600
500
400
300
200
100
0012345
VOL (mV)
ISINK (mA)
COMPARATOR VOL vs ISINK
6
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +12V, VIN+ = 12V, and VSENSE = 100mV, unless otherwise noted.
600
599
598
597
596
595
594
593
592
591
590 246 8 10 12 14 16
Reset Voltage (mV)
Supply Voltage (V)
COMPARATOR TRIP POINT vs SUPPLY VOLTAGE
18
602
601
600
599
598
597
596−50 −25 0255075100
Comparator Trip Point (mV)
Temperature (_C)
COMPARATOR TRIP POINT vs TEMPERATURE
125
200
175
150
125
100
75
50 020 40 60 80 100 120 140 160 180
Propagation Delay (ns)
Overdrive Voltage (mV)
COMPARATOR PROPAGATION DELAY
vs OVERDRIVE VOLTAGE
200
1.2
1.0
0.8
0.6
0.4
0.2
0246 8 10 12 14 16
Reset Voltage (V)
Supply Voltage (V)
COMPARATOR RESET VOLTAGE vs
SUPPLY VOLTAGE
18
300
275
250
225
200
175
150
125−50 −25 0255075100
Propagation Delay (ns)
Temperature (_C)
COMPARATOR PROPAGATION DELAY vs
TEMPERATURE
125
COMPARATOR PROPAGATION DELAY
Input
200mV/div
Output
2V/div
2µs/div
VOD =5mV
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APPLICATIONS INFORMATION
BASIC CONNECTIONS
Figure 2 shows the basic connections of the INA200,
INA201, and INA202. The input pins, VIN+ and VIN−, should
be connected as closely as possible to the shunt resistor
to minimize any resistance in series with the shunt
resistance.
Power-supply bypass capacitors are required for stability.
Applications with noisy or high-impedance power supplies
may require additional decoupling capacitors to reject
power-supply noise. Connect bypass capacitors close to
the device pins.
POWER SUPPLY
The input circuitry of the INA200, INA201, and INA202 can
accurately measure beyond the power-supply voltage, V+.
For example, the V+ power supply can be 5V, whereas the
load power-supply voltage is up to +80V. The output
voltage range of the OUT terminal, however, is limited by
the voltages on the power-supply pin.
ACCURACY VARIATIONS AS A RESULT OF
VSENSE AND COMMON-MODE VOLTAGE
The accuracy of the INA200, INA201, and INA202 current
shunt monitors is a function of two main variables: VSENSE
(VIN+ − VIN−) and common-mode voltage, VCM, relative to
the supply voltage, VS. VCM is expressed as (VIN+ + VIN−)/2;
however, in practice, VCM is seen as the voltage at VIN+
because the voltage drop across VSENSE is usually small.
This section addresses the accuracy of these specific
operating regions:
Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS
Normal Case 2: VSENSE ≥ 20mV, VCM < VS
Low VSENSE Case 1: VSENSE < 20mV, −16V ≤ VCM < 0
Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS
Low VSENSE Case 3: VSENSE < 20mV, VS < VCM ≤ 80V
Normal Case 1: VSENSE ≥ 20mV, VCM ≥ VS
This region of operation provides the highest accuracy.
Here, the input offset voltage is characterized and
measured using a two-step method. First, the gain is
determined by Equation 1.
G+VOUT1 *VOUT2
100mV *20mV
where:
VOUT1 = Output Voltage with VSENSE = 100mV
VOUT2 = Output Voltage with VSENSE = 20mV
Then the offset voltage is measured at VSENSE = 100mV
and referred to the input (RTI) of the current shunt monitor,
as shown in Equation 2.
VOSRTI (Referred−To−Input)+ǒVOUT1
GǓ*100mV
G
0.6V
Reference
Comparator
OUT
CMPIN CMPOUT
RESET
VIN−
VIN+
INA200
(G = 20)
GND
V+
2
3
4
6
5
7
8
1
RPULL−UP
4.7kΩ
Latch
Transparent/Reset
CBYPASS
0.01µF
RSHUNT
3mΩ
Load Supply
−18V to +80V Load
5V Supply
R1
R2
Figure 2. INA200 Basic Connections
(1)
(2)
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In the Typical Characteristics, the Output Error vs
Common-Mode Voltage curve shows the highest
accuracy for the this region of operation. In this plot,
VS= 12V; for VCM ≥ 12V, the output error is at its minimum.
This cas e i s a l s o u s e d t o create the VSENSE ≥ 20mV output
specifications in the Electrical Characteristics table.
Normal Case 2: VSENSE ≥ 20mV, VCM < VS
This region of operation has slightly less accuracy than
Normal Case 1 as a result of the common-mode operating
area i n which the part functions, as seen in the Output Error
vs Common-Mode Voltage curve. As noted, for this graph
VS = 12V ; for VCM < 1 2 V, the Output Error increases as VCM
becomes less than 12V, with a typical maximum error of
0.005% at the most negative VCM = −16V.
Low VSENSE Case 1:
VSENSE < 20mV, −16V ≤ VCM < 0; and
Low VSENSE Case 3:
VSENSE < 20mV, VS < VCM ≤ 80V
Although the INA200 family of devices are not designed for
accurate operation in either of these regions, some
applications are exposed to these conditions. For
example, when monitoring power supplies that are
switched on and of f while VS is still applied to the INA200,
INA201, or INA202, it is important to know what the
behavior of the devices will be in these regions.
As VSENSE approaches 0mV, in these VCM regions, the
device output accuracy degrades. A larger-than-normal
offset can appear at the current shunt monitor output with
a typical maximum value of VOUT = 300mV for
VSENSE = 0mV. As VSENSE approaches 20mV, VOUT
returns to the expected output value with accuracy as
specified in the Electrical Characteristics. Figure 3
illustrates this effect using the INA202 (Gain = 100).
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0024 6 8 1012141618
VOUT (V)
VSENSE (mV)
20
Actual
Ideal
Figure 3. Example for Low VSENSE Cases 1 and 3
(INA202, Gain = 100)
Low VSENSE Case 2: VSENSE < 20mV, 0V ≤ VCM ≤ VS
This region of operation is the least accurate for the
INA200 family. To achieve the wide input common-mode
voltage range, these devices use two op amp front ends in
parallel. One op amp front end operates in the positive
input common-mode voltage range, and the other in the
negative input region. For this case, neither of these two
internal amplifiers dominates and overall loop gain is very
low. Within this region, VOUT approaches voltages close to
linear operation levels for Normal Case 2. This deviation
from linear operation becomes greatest the closer VSENSE
approaches 0V. Within this region, as VSENSE approaches
20mV, device operation is closer to that described by
Normal Case 2. Figure 4 illustrates this behavior for the
INA202. The VOUT maximum peak for this case is tested
by maintaining a constant VS, setting VSENSE = 0mV and
sweeping VCM from 0V to V S. The exact VCM at which VOUT
peaks during this test varies from part to part, but the VOUT
maximum peak is tested to be less than the specified VOUT
tested limit.
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
00 2 4 6 8 10 12 14 16 18 20 22
VOUT (V)
VSENSE (mV)
24
INA202 VOUT Tested Limit(1)
VCM2
VCM1
VCM3
VCM4
VCM2,V
CM3,andV
CM4 illustrate the variance
frompart to part of theVCM that can cause
maximumVOUT with VSENSE < 20mV.
VOUT tested limit at
VSENSE =0mV,0≤VCM1 ≤VS.
NOTE: (1) INA200VOUT Tested Limit = 0.4V. INA201 VOUT Tested Limit = 1V.
Ideal
Figure 4. Example for Low VSENSE Case 2
(INA202, Gain = 100)
SELECTING RS
The value chosen for the shunt resistor, RS, depends on
the application and is a compromise between small-signal
accuracy and maximum permissible voltage loss in the
measurement line. High values of RS provide better
accuracy at lower currents by minimizing the effects of
offset, while low values of RS minimize voltage loss in the
supply line. For most applications, best performance is
attained with an RS value that provides a full-scale shunt
voltage range of 50mV to 100mV. Maximum input voltage
for accurate measurements is 500mV.
TRANSIENT PROTECTION
The −16V to +80V common-mode range of the INA200,
INA201, and INA202 is ideal for withstanding automotive
fault conditions ranging from 12V battery reversal up to
+80V transients, since no additional protective
components are needed up to those levels. In the event
that the INA200, INA201, and INA202 are exposed to
transients on the inputs in excess of their ratings, then
external transient absorption with semiconductor transient
absorbers (such as zeners) will be necessary. Use of
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SBOS374B − NOVEMBER 2006 − REVISED OCTOBER 2007
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12
MOVs or VDRs is not recommended except when they a r e
used in addition to a semiconductor transient absorber.
Select the transient absorber such that it will never allow
the INA200, INA201, and INA202 to be exposed to
transients greater than +80V (that is, allow for transient
absorber tolerance, as well as additional voltage due to
transient absorber dynamic impedance). Despite the use
of internal zener-type ESD protection, the INA200,
INA201, and INA202 do not lend themselves to using
external resistors in series with the inputs since the internal
gain resistors can vary up to ±30%. (If gain accuracy is not
important, then resistors can be added in series with the
INA200, INA201, and INA202 inputs with two equal
resistors on each input.)
OUTPUT VOLTAGE RANGE
The output of the INA200, INA201, and INA202 is accurate
within the output voltage swing range set by the power
supply pin, V+. This performance is best illustrated when
using the INA202 (a gain of 100 version), where a 100mV
full-scale input from the shunt resistor requires an output
voltage swing of +10V, and a power-supply voltage
sufficient to achieve +10V on the output.
INPUT FILTERING
An obvious and straightforward location for filtering is at
the output of the INA200, INA201, and INA202 series;
however, this location negates the advantage of the low
output impedance of the internal buffer. The only other
option for filtering is at the input pins of the INA200,
INA201, and INA202, which is complicated by the internal
5kΩ + 30% input impedance; this is shown in Figure 5.
Using the lowest possible resistor values minimizes both
the initial shift in gain and effects of tolerance. The effect
on initial gain is given by Equation 3:
Gain Error % +100 *ǒ100 5kW
5kW)RFILTǓ
Total e f fect on gain error can be calculated by replacing the
5kΩ term with 5kΩ − 30%, (or 3.5kΩ) or 5kΩ + 30% (or
6.5kΩ). The tolerance extremes of RFILT can also be
inserted into the equation. If a pair of 100. 1% resistors are
used on the inputs, the initial gain error will be 1.96%.
Worst-case tolerance conditions will always occur at the
lower excursion of the internal 5kΩ resistor (3.5kΩ), and
the higher excursion of RFILT − 3% in this case.
Note that the specified accuracy of the INA200, INA201,
and INA202 must then be combined in addition to these
tolerances. While this discussion treated accuracy
worst-case conditions by combining the extremes of the
resistor values, it is appropriate to use geometric mean or
root sum square calculations to total the effects of
accuracy variations.
COMPARATOR
The INA200, INA201, and INA202 devices incorporate an
open-drain comparator. This comparator typically has
2mV of offset and a 1.3µs (typical) response time. The
output of the comparator latches and is reset through the
RESET pin, see Figure 6.
RSHUNT << RFILTER
3mΩ
VSUPPLY Load
RFILTER <100
ΩRFILTER <100Ω
CFILTER
1
2
3
4
8
7
6
5
CMPOUT
RESET
VIN+
VIN−
V+
OUT
CMPIN
GND
INA200−INA202
SO−14, TSSOP−14
f−3dB =1
2π(2RFILTER)CFILTER
f−3dB
G
0.6V
Reference
Comparator
Figure 5. Input Filter (Gain Error — 1.5% to −2.2%)
(3)
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SBOS374B − NOVEMBER 2006 − REVISED OCTOBER 2007
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13
0V
0.6V
VIN
CMPOUT
RESET
Figure 6. Comparator Latching Capability
G
0.6V
Reference
Comparator
OUT
CMPIN CMPOUT
RESET
VIN−
VIN+
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
GND
V+
2
3
4
6
5
7
8
1
Shunt
Option 3
Shunt
Option 1
R3
R4
Supply
To VIN−
To VIN+
To VIN−
To VIN+
R1
R2
From
Shunt Option
1, 2, or 3
RESET
4.5V to 5.5V
Q1
2N3904
Shunt
Option 2
Load
To VIN−
To VIN+
NOTE: Q1cascodes the comparator output to drive a high−side FET (the 2N3904 shown is good up to 60V). The shunt could be located in
any one of the three locations shown. The latching capability should be used in shutdown applications to prevent oscillation at the trip point.
Figure 7. High-Side Switch Over-Current Shutdown
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SBOS374B − NOVEMBER 2006 − REVISED OCTOBER 2007
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14
G
0.6V
Reference
Comparator
OUT
CMPIN CMPOUT
RESET
VIN−
VIN+
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
GND
V+
2
3
4
6
5
7
8
1
Shunt
Option 3
R4
2.2kΩ
R1
22kΩ
Shunt
Option 1
Supply
To VIN−
To VIN+
R1
R2
From
Shunt Option
1, 2, or 3
RESET
4.5V to 5.5V Load
To VIN−
To VIN+
Shunt
Option 2
To VIN−
To VIN+
Q1
2N3904
NOTE: In this case, Q1is used to invert the comparator output.
Figure 8. Low-Side Switch Over-Current Shutdown
"##
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"#"
SBOS374B − NOVEMBER 2006 − REVISED OCTOBER 2007
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15
G
0.6V
Reference
Comparator
OUT
CMPIN CMPOUT
RESET
VIN−
VIN+
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
GND
V+
2
3
4
6
5
7
8
1
R5
2.2kΩ
RSHUNT
Supply
R1
R2
RESET
4.5V to 5.5V
G
0.6V
Reference
Comparator
OUT
CMPIN CMPOUT
RESET
VIN−
VIN+
INA200 (G = 20)
INA201 (G = 50)
INA202 (G = 100)
GND
V+
2
3
4
6
5
7
8
1R6
2.2kΩ
R3
R4
R7
200kΩ
RESET
CMPOUT
NOTE: It is possible to set different limits for each direction.
Figure 9. Bidirectional Over-Current Comparator
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
INA200AID ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA200AIDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA200AIDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA200AIDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA200AIDGKT ACTIVE MSOP DGK 8 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA200AIDGKTG4 ACTIVE MSOP DGK 8 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA200AIDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA200AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA201AID ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA201AIDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA201AIDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA201AIDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA201AIDGKT ACTIVE MSOP DGK 8 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA201AIDGKTG4 ACTIVE MSOP DGK 8 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA201AIDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA201AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA202AID ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA202AIDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA202AIDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA202AIDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA202AIDGKT ACTIVE MSOP DGK 8 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA202AIDGKTG4 ACTIVE MSOP DGK 8 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA202AIDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
INA202AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
PACKAGE OPTION ADDENDUM
www.ti.com 30-Apr-2009
Addendum-Page 1
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 30-Apr-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
INA200AIDGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA200AIDGKT MSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA200AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
INA201AIDGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA201AIDGKT MSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA201AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
INA202AIDGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA202AIDGKT MSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA202AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 1-May-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA200AIDGKR MSOP DGK 8 2500 346.0 346.0 29.0
INA200AIDGKT MSOP DGK 8 250 190.5 212.7 31.8
INA200AIDR SOIC D 8 2500 346.0 346.0 29.0
INA201AIDGKR MSOP DGK 8 2500 346.0 346.0 29.0
INA201AIDGKT MSOP DGK 8 250 190.5 212.7 31.8
INA201AIDR SOIC D 8 2500 346.0 346.0 29.0
INA202AIDGKR MSOP DGK 8 2500 346.0 346.0 29.0
INA202AIDGKT MSOP DGK 8 250 190.5 212.7 31.8
INA202AIDR SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 1-May-2009
Pack Materials-Page 2
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