1
®
FN6262.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006, 2007. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL55190, ISL55290
Single and Dual Ultra-Low Noise, Ultra-Low
Distortion, Low Power Op Amp
The ISL55190 and ISL55290 are single and dual high speed
operational amplifiers featuring low noise, low distortion, and
rail-to-rail output drive capability. They are designed to
operate with single and dual supplies from +5VDC
(±2.5VDC) down to +3VDC (±1.5VDC). These amplifiers
draw 16mA of quiescent supply current per amplifier. For
power conservation, this family offers a low-power shutdown
mode that reduces supply current to 21µA and places the
amplifiers' output into a high impedance state. The ISL55190
ENABLE logic places the device in the shutdown mode with
EN = 0 and the ISL55290 is placed in the shutdown mode
with EN = 1.
These amplifiers have excellent input and output overload
recovery times and outputs that swing rail-to-rail. Their input
common mode voltage range includes ground. The
ISL55190 and ISL55290 are stable at gains as low as 5 with
an input referred noise voltage of 1.2nV/Hz and harmonic
distortion products -95dBc (2nd) and -92dBc (3rd) below a
4MHz 2VP-P signal.
The ISL55190 is available in space-saving 8 Ld DFN and 8 Ld
SOIC packages. The ISL55290 is available in a 10 Ld MSOP
package.
Features
1.2nV/Hz input voltage noise, fO = 1kHz
Harmonic Distortion -95dBc, -92dBc, fO = 4MHz
Stable at gains as low as 5
800MHz gain bandwidth product (AV = 5)
268V/µs typica l sle w rat e
16mA typical supply current (21µA in disable mode)
300µV typical offset voltage
25µA typical input bias current
3V to 5V single supply vol tage range
Rail-to-rail output
Enable pin
Pb-free plus anneal available (RoHS compliant)
Applications
High speed pulse applications
Low noise signal processing
ADC buffers
DAC output amplifiers
Radio systems
Portable equipment
Ordering Information
PART
NUMBER
(Note) PART
MARKING
TAPE
AND
REEL PACKAGE
(Pb-Free) PKG.
DWG. #
ISL55190IBZ 55190 IBZ - 8 Ld SOIC MDP0027
ISL55190IBZ-T13 55190 IBZ 13”
(2,500 pcs) 8 Ld SOIC
Tape and Reel MDP0027
ISL55190IRZ 190Z - 8 Ld DFN L8.3x3D
ISL55190IRZ-T13 190Z 13”
(2,500 pcs) 8 Ld DFN
Tape and Reel L8.3x3D
ISL55290IUZ 5290Z - 10 Ld MSOP MDP0043
ISL55290IUZ-T13 5290Z 13”
(2500 pcs) 10 Ld MSOP
Tape and Reel MDP0043
Coming Soon
ISL55190EVAL1Z Evaluation Board
Coming Soon
ISL55290EVAL1Z Evaluation Board
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
TABLE 1. ENABLE LOGIC
ENABLE DISABLE
ISL55190 EN = 1 EN = 0
ISL55290 EN = 0 EN = 1
Data Sheet March 30, 2007
2FN6262.1
March 30, 2007
ISL55190, ISL55290
Pinouts ISL55190
(8 LD SOIC)
TOP VIEW
ISL55190
(8 LD DFN)
TOP VIEW
ISL55290
(10 LD MSOP)
TOP VIEW
1
2
3
4
8
7
6
5
-
+
FEEDBACK
IN-
IN+
V-
EN
VS+
OUT
NC
2
3
4
1
7
6
5
8
EN
FEEDBACK
IN-
IN+
V +
OUT
NC
V-
-
+
1
2
3
4
10
9
8
7
5 6
OUT_A
IN-_A
IN+_A
V-
V+
OUT_B
IN-_B
IN+_B
EN_A EN_B
-
+
7
-
+
3FN6262.1
March 30, 2007
Absolute Maximum Ratings (TA = +25°C) Thermal Information
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7). . . . .3kV
Machine Model (Per EIAJ ED-4701 Method C-111). . . . . . . .300V
Thermal Resistance θJA (°C/W)
8 Ld DFN Package . . . . . . . . . . . . . . . . . . . . . . . . . 65.75
8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . . 110
10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . 115
Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . .+125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications V+ = 5V, V -= GND, RL = 1kΩ, RG = 30Ω, RF = 120Ω. unless otherwise specified. Parameters are per amplifier.
All values are at V+ = 5V, TA = +25°C
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
DC SPECIFICATIONS
VOS Input Offset Voltage -1100 -300 500 µV
Input Offset Drift vs Temperature -40°C to +85°C 0.43 µV/°C
IOS Input Offset Current -1.3 -0.3 0.7 µA
IBInput Bias Current -25 -40 µA
VCM Common-Mode Voltage Range 0 3.8 V
CMRR Common-Mode Rejection Ratio VCM = 0V to 3.8V 80 95 dB
PSRR Power Supply Rejection Ratio V+ = 3V to 5V 80 100 dB
AVOL Large Signal Voltage Gain VO = 0.5V to 4V, RL = 1kΩ85 115 dB
VOUT Maximum Output Voltage Swing Output low, RL = 1kΩ39 100 mV
Output high, RL = 1kΩ, V+= 5V 4.960 4.978 V
IS,ON Supply Current, Enabled ISL55190 16 20 mA
ISL55290 30 38 mA
IS,OFF Supply Current, Disabled 21 49 µA
IO+ Short-Circuit Output Current RL = 10Ω110 130 mA
IO- Short-Circuit Output Current RL = 10Ω110 130 mA
VSUPPLY Supply Operating Range V+ to V- 3 5 V
VINH ENABLE High Level Referred to -V 2 V
VINL ENABLE Low Level Referred to -V 0.8 V
IENH ENABLE Input High Current
VEN = V+ ISL55190 (EN) 20 80 nA
ISL55290 (EN)0.81.5µA
IENL ENABLE Input Low Current
VEN = V- ISL55190 (EN) 5 6.2 µA
ISL55290 (EN)2080nA
ΔVOS
ΔT
----------------
ISL55190, ISL55290
4FN6262.1
March 30, 2007
AC SPECIFICATIONS
GBW Gain Bandwidth Product AV = +5; VOUT = 100mVP-P; Rf/Rg = 402Ω/100Ω800 MHz
HD
(4 MHz) 2nd Harmonic Distortion AV = 5; VOUT = 2VP-P; Rf/Rg = 402Ω/100Ω-95 dBc
3rd Harmonic Distortion -92 dBc
ISO Off-state Isolation; EN = 1 ISL55290;
EN = 0 ISL55190 fO = 10MHz; AV = 5; VIN = 640mVP-P;
Rf/Rg = 402Ω/100Ω; CL = 1.2pF -65 dB
X-TALK
ISL55290 Channel-to-Channel Crosstalk fO = 10MHz; AV = 5; VOUT (Driven Channel) =
640mVP-P; Rf/Rg = 402Ω/100Ω; CL = 1.2pF -75 dB
PSRR Power Supply Rejection Ratio
fO = 10MHz; VS = ±2.5V; AV = 5; VSOURCE = 640mVP-P;
Rf/Rg = 402Ω/100Ω; CL = 1.2pF -45 dB
CMRR Input Common Mode Rejection
Ratio; fO = 10MHz; VS = ±2.5V; AV = 5; VCM = 640mVP-P;
Rf/Rg = 402Ω/100Ω; CL = 1.2pF -38 dB
VNInput Referred Voltage Noise fO = 1kHz 1.2 nV/Hz
IN Input Referred Current Noise fO = 10kHz 6 pA/Hz
TRANSIENT RESPONSE
SR Slew Rate 163 268 V/uS
tr, tf Large
Signal Rise Time, tr 10% to 90% AV = 5; VOUT = 3.5VP-P; Rf/Rg = 402Ω/100Ω
CL = 1.2pF 11.2 ns
Fall Time, tf 10% to 90% 9.8 ns
Rise Time, tr 10% to 90% AV = 5; VOUT = 1VP-P; Rf/Rg = 402Ω/100Ω
CL = 1.2pF 4.4 ns
Fall Time, tf 10% to 90% 4.0 ns
tr, tf, Small
Signal Rise Time, tr 10% to 90% AV = 5; VOUT = 1VP-P; Rf/Rg = 402Ω/100Ω
CL = 1.2pF 2.2 ns
Fall Time, tf 10% to 90% 2.0 ns
tpd Propagation Delay
10% VIN to 10% VOUT AV = 5; VOUT = 100mVP-P; Rf/Rg = 402Ω/100Ω
CL = 1.2pF 1.6 ns
tIOL Positive Input Overload Recovery
Time, tIOL+; 10% VIN to 10% VOUT VS = ±2.5V; AV = 5; VIN = +VCM +0.1V;
Rf/Rg = 402Ω/100Ω; CL = 1.2pF 15 ns
Negative Input Overload Recovery
Time, tIOL-; 10% VIN to 10% VOUT VS = ±2.5V; AV = 5; VIN = -V -0.5V;
Rf/Rg = 402Ω/100Ω; CL = 1.2pF 18 ns
tOOL Positive Output Overload Recovery
Time, tOOL+; 10% VIN to 10% VOUT VS = ±2.5V; AV = 5; VIN = 1.1VP-P;
Rf/Rg = 402Ω/100Ω; CL = 1.2pF 17 ns
Negative Output Overload Recovery
Time, tOOL-; 10% VIN to 10% VOUT VS = ±2.5V; AV = 5; VIN = 1.1VP-P;
Rf/Rg = 402Ω/100Ω; CL = 1.2pF 17 ns
tEN
ISL55190 ENABLE to Output Turn-on Delay
Time; 10% EN to 10% VOUT AV = 5; VIN = 500mVP-P; Rf/Rg = 402Ω/100Ω
CL = 1.2pF 420 ns
ENABLE to Output Turn-off Delay
Time; 10% EN to 10% VOUT AV = 5; VIN = 500mVP-P; Rf/Rg = 402Ω/100Ω
CL = 1.2pF 240 ns
tEN
ISL55290 ENABLE to Output Turn-on Delay
Time; 10% EN to 10% VOUT AV = 5; VIN = 500mVP-P; Rf/Rg = 402Ω/100Ω
CL = 1.2pF 160 ns
ENABLE to Output Turn-off Delay
Time;10% EN to 10% VOUT AV = 5; VIN = 500mVP-P; Rf/Rg = 402Ω/100Ω
CL = 1.2pF 32 ns
Electrical Specifications V+ = 5V, V -= GND, RL = 1kΩ, RG = 30Ω, RF = 120Ω. unless otherwise specified. Parameters are per amplifier.
All values are at V+ = 5V, TA = +25°C
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
ISL55190, ISL55290
5FN6262.1
March 30, 2007
Typical Performance Curves
FIGURE 1. GAIN vs FREQUENCY vs Rf AND RgFIGURE 2. GAIN vs FREQUENCY vs VOUT
FIGURE 3. ISL55290 GAIN vs FREQUENCY vs RLFIGURE 4. CLOSED LOOP GAIN vs FREQUENCY
FIGURE 5. GAIN vs FREQUENCY vs VS FIGURE 6. ISL55190 GAIN vs FREQUENCY vs CL
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
FREQUENCY (MHz)
Rf = 402, RG = 100
Rf = 100, RG = 24.9
AV = 5
RL = 1k
VOUT = 100mVP-P
Rf = 604, RG = 150
.01 0.1 1.0 10 100 1k
Rf = 1.21k, RG = 301
NORMALIZED GAIN (dB)
-8
-7
-6
-5
-4
-3
-2
-1
0
1
NORMALIZED GAIN (dB)
VOUT = 1V
VOUT = 100mV
VOUT = 200mV
FREQUENCY (MHz)
AV = 5
Rf = 402
Rg = 100
RL = 1k
0.1 1.0 10 100 1k
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
.01 0.1 1.0 10 100 1k
FREQUENCY (MHz)
AV = 5
CL = 1.2pF
VP-P = 100mV
Cg = 0.8pF
Rg = 100
Rf = 402
RL= 249
RL= 499
RL= 1000
RL= 100
NORMALIZED GAIN (dB)
0
10
20
30
40
50
60
70
CLOSED LOOP GAIN (dB)
AV = 1000 Rf/Rg = 100k/100
AV = 100 Rf/Rg = 10k/100
AV = 10 Rf/Rg = 909/100
AV = 5 Rf/Rg = 402/100
FREQUENCY (MHz)
RL = 1k
CL = 2.2pF
Cg = 2.5pF
VP-P = 100mV
0.1 1.0 10 100 1k
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
FREQUENCY (MHz)
AV = 5
RL = 1k
VP-P = 100mV
CG = 1.6pF
RG = 100
RF = 402
VS= 5.0V
AV = 5
RL = 1k
VOUT = 100mVP-P
Cg = 1.6pF
Rg = 100
Rf = 402
VS = 5.0V
.01 0.1 1.0 10 100 1k
NORMALIZED GAIN (dB)
VS = 2.4V
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
CL = 13.2pF
CL = 8.0pF
CL = 4.5pF
CL = 2.2pF
CL = 1.2pF
AV = 5
RL = 1k
Rf = 402
Rg = 100
VOUT = 100mVP-P
.01 0.1 1.0 10 100 1k
-3
-1
0
1
2
3
-2
4
-4
-5
-6
ISL55190, ISL55290
6FN6262.1
March 30, 2007
FIGURE 7. ISL55290 GAIN vs FREQUENCY vs CLFIGURE 8. ISL55190 GAIN vs FREQUENCY vs Cg
FIGURE 9. ISL55290 GAIN vs FREQUENCY vs CgFIGURE 10. DISABLED INPUT IMPEDANCE vs FREQUENCY
FIGURE 11. ENABLED INPUT IMPEDANCE vs FREQUENCY FIGURE 12. DISABLED OUTPUT IMPEDANCE vs
FREQUENCY
Typical Performance Curves (Continued)
-5
-4
-3
-2
-1
0
1
2
3
4
5
NORMALIZED GAIN (dB)
CL = 13.2pF
CL = 8.0pF
CL = 1.2pF
CL = 2.2pF
CL = 2.2pF
AV = 5
RL = 1k
Rf = 402
Rg = 100
VOUT = 100mVpp
FREQUENCY (MHz)
.01 0.1 1.0 10 100 1k
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
AV = 5
RL = 1k
VOUT = 100mVP-P
Rg = 100
Rf = 402
Cg = 9.0pF
Cg = 7.6pF
Cg = 5.5pF
Cg = 4.1pF
Cg = 3.0pF
Cg = 2.3pF
Cg = 1.8pF
Cg = 0.8pF
.01 0.1 1.0 10 100 1k
-5
-4
-3
-2
-1
0
1
2
3
4
5
-5
-4
-3
-2
-1
0
1
2
3
4
5
FREQUENCY (MHz)
AV = 5
RL = 1k
VOUT = 100mVP-P
Rg = 100
Rf = 402
Cg = 10.5pF
Cg = 8.7pF
Cg = 5.2pF
Cg = 3.8pF
Cg = 2.7pF
Cg = 2.0pF
Cg = 1.6pF
Cg = 0.5pF
.01 0.1 1.0 10 100 1k
NORMALIZED GAIN (dB)
1
10
100
1k
10k
100k
1M
10M
DISABLED INPUT IMPEDANCE (Ω)
AV = 5
RL = 1k
Cg = 1.6pF
Rf = 402
Rg = 100
CL = 1.2pF
FREQUENCY (MHz)
.01 0.1 1.0 10 100 1k
VSOURCE = 500mVP-P
1
10
100
1k
10k
100k
ENABLED INPUT IMPEDANCE (Ω)
AV = 5
RL = 1k
Cg = 1.6pF
Rf = 402
Ri = 100
CL = 1.2pF
FREQUENCY (MHz)
ENABLED INPUT IMPEDANCE (Ω)
AV = 5
RL = 1k
VSOURCE = 500mVP-P
Rf = 402
Ri = 100
.01 0.1 1.0 10 100 1k 10
100
1000
FREQUENCY (MHz)
OUTPUT IMPEDANCE (Ω)
OUTPUT DISABLED
AV = 5
VSOURCE = 1VP-P
Rf = 402
Rg = 100
.01 0.1 1.0 10 100 1k
ISL55190, ISL55290
7FN6262.1
March 30, 2007
FIGURE 13. ENABLED OUTPUT IMPEDANCE vs FREQUENCY FIGURE 14. CMRR vs FREQUENCY
FIGURE 15. PSRR vs FREQUENCY FIGURE 16. OFF ISOLATION vs FREQUENCY
FIGURE 17. ISL55290 CHANNEL TO CHANNEL CROSST ALK
vs FREQUENCY FIGURE 18. INPUT VOLTAGE NOISE vs FREQUENCY
Typical Performance Curves (Continued)
0.01
0.1
1
10
100
FREQUENCY (MHz)
OUTPUT IMPEDANCE (Ω)
AV = 5
Rg = 100
VSOURCE =1VP-P
Rf = 402
OUTPUT ENABLED
.01 0.1 1.0 10 100 1k -90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
GAIN (dB)
FREQUENCY (MHz)
AV = 5
Cg = 0.8pF
RL = 1k
Rg = 100
Rf = 402
VCM = 1VP-P
.01 0.1 1.0 10 100 1k
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
PSRR (dB)
FREQUENCY (MHz)
PSRR-
PSRR+
AV = 5
Cg = 0.8pF
RL = 1k
Rg = 100
Rf = 402
VSOURCE = 1VP-P
.01 0.1 1.0 10 100 1k
-120
-100
-80
-60
-40
-20
0
FREQUENCY (MHz)
OFF ISOLATION (dB)
AV = 5
Cg = 1.6pF
CL = 1.2pF
RL = 1k
Rf = 402
Ri = 100
VIN = 640mVP-P
.01 0.1 1.0 10 100 1k
-120
-100
-80
-60
-40
-20
0
FREQUENCY (MHz)
CROSSTALK (dB)
AV = 5
Cg = 1.6pF
CL = 1.2pF
RL = 1k
Rf = 402
Ri = 100
VOUT (DRIVEN CHANNEL) = 640mVP-P
.01 0.1 1.0 10 100 1k 1
10
100
0.1 1 10 100 1k 10k 100k
FREQUENCY (Hz)
INPUT NOISE VOLTAGE (nVHz)
AV = 100
Cg = 1.6pF
Rf = 330
Rg = 3.3
Ri = 1k
ISL55190, ISL55290
8FN6262.1
March 30, 2007
FIGURE 19. INPUT NOISE CURRENT vs FREQUENCY FIGURE 20. LARGE SIGNAL STEP RESPONSE
FIGURE 21. SMALL SIGNAL STEP RESPONSE FIGURE 22. ISL55290 PERCENT OVERSHOOT vs VOUT, CL
FIGURE 23. POSITIVE INPUT OVERLOAD RECOVERY TIME FIGURE 24. NEGATIVE INPUT OVERLOAD RECOVERY TIME
Typical Performance Curves (Continued)
1
10
100
1000
FREQUENCY (Hz)
INPUT NOISE CURRENT (pAHz)
AV = 100
Cg = 1.6pF
Rf = 330
Rg = 3.3
Ri = 1k
0.1 1 10 100 1k 10k 100k -0.6
-0.4
-0.2
0
0.2
0.4
0.6
TIME (µs)
LARGE SIGNAL (V)
0 102030405060708090100
AV = 5
VS = ±2.5V
RL = 1k
CL = 1.3pF
VOUT = 1VP-P
-0.06
-0.04
-0.02
0
0.02
0.04
0.06
0 102030405060708090100
TIME (µs)
SMALL SIGNAL (V)
AV = 5
VS = ±2.5V
RL = 1k
CL = 1.3pF
VOUT =100mVP-P
0
5
10
15
20
25
30
35
40
45
50
0 5 10 15 20 25
CL (pF)
OVERSHOOT (%)
VOUT = 0.5V
AV = 5
RL = 1k
Rg = 100
Rf = 402
VOUT = 1V
VOUT = 3.5V
VOUT = 0.1V
OUTPUT (V)
-2.0
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
0 1020304050607080
TIME (ns)
OUTPUT (V)
AV = 5
RL = 10k
Rg = 100
Rf = 402
INPUT
OUTPUT
VS = ±2.5V
VIN = VCM +0.1V
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
INPUT (V)
TIME (ns)
INPUT (V)
-4.0
-3.5
-3.0
-2.5
-2.0
-1.5
-1.0
OUTPUT (V)
OUTPUT
INPUT
0 1020304050607080
AV = 5
RL = 10k
Rg = 100
Rf = 402
VS = ±2.5V
VIN = -V-0.5V -3
-2
-1
0
1
2
3
ISL55190, ISL55290
-3
-2
-1
0
1
2
3
9FN6262.1
March 30, 2007
FIGURE 25. OUTPUT OVERLOAD RECOVERY TIME FIGURE 26. ISL55290 ENABLE TO OUTPUT DELAY
FIGURE 27. ISL55290 POSITIVE SLEW RATE vs VS FIGURE 28. ISL55290 NEGATIVE SLEW RATE vs VS
FIGURE 29. SUPPL Y CURRENT ENABLED vs TEMPERA TURE
VS= ±2.5V FIGURE 30. SUPPL Y CURRENT DISAB LED vs TEMPERA TURE
VS = ±2.5V
Typical Performance Curves (Continued)
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0 102030405060708090100
TIME (nS)
-3
-2
-1
0
1
2
3
OUTPUT (V)
OUTPUT
INPUT
INPUT(V)
AV = 5
RL = 10k
Rg = 100
Rf = 402
VS = +2.5V
VIN = 1.1VP-P -0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
TIME (µs)
OUTPUT (V)
A
V
= 5
R
L
= 1k
R
g
= 100
Rf = 402 OUTPUT
ENABLE
-1.0
0
1.0
2.0
3.0
4.0
5.0
6.0
ENABLE (V)
VIN = 0.5V
215
225
235
245
255
265
3.0 3.5 4.0 4.5 5.0 5.5
VS (V)
SLEW RATE (V/µs)
AV = 5
RL = 10k
Ri = 100
Rf = 402
-290
-280
-270
-260
-250
-240
-230
-220
3.0 3.5 4.0 4.5 5.0 5.5
VS (V)
SLEW RATE (V/µs)
AV = 5
RL = 10k
Ri = 100
Rf = 402
10
12
14
16
18
20
22
24
-40-200 20406080
TEMPERATURE (°C)
CURRENT (mA)
n = 100
MEDIAN
MIN
MAX
ISL55190
16
18
20
22
24
26
28
30
32
34
-40-200 20406080
TEMPERATURE (°C)
CURRENT(µA)
n = 100
MEDIAN
MIN
MAX
ISL55190, ISL55290
10 FN6262.1
March 30, 2007
FIGURE 31. SUPPL Y CURRENT ENABLED vs TEMPERA TURE
VS = ±1.5V FIGURE 32. SUPPLY CURRENT DISABLED vs
TEMPERATURE VS = ±1.5V
FIGURE 33. VIO vs TEMPERATURE VS = ±2.5V FIGURE 34. VIO vs TEMPERATURE VS = ±1.5V
FIGURE 35. IBIAS+ vs TEMPERATURE VS = ±2.5V FIGURE 36. IBIAS- vs TEMPERATURE VS = ±2.5V
Typical Performance Curves (Continued)
8.5
9.5
10.5
11.5
12.5
13.5
14.5
15.5
16.5
17.5
-40-200 20406080
TEMPERATURE (°C)
CURRENT(mA)
n = 100
MEDIAN
MIN
MAX
ISL55190 3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
-40-200 20406080
TEMPERATURE (°C)
CURRENT(µA)
n = 100
MIN
MAX
MEDIAN
-1100
-900
-700
-500
-300
-100
100
300
500
-40-200 20406080
TEMPERATURE (°C)
VOS (µV)
n = 100
MEDIAN
MIN
MAX
-1200
-900
-600
-300
0
300
600
-40-200 20406080
TEMPERATURE (°C)
n = 100
MEDIAN
MIN
MAX
VOS (µV)
-32
-31
-30
-29
-28
-27
-26
-25
-24
-23
-22
-40-200 20406080
TEMPERATURE (°C)
IBIAS + (µA)
n = 100
MIN
MAX
MEDIAN
-31
-30
-29
-28
-27
-26
-25
-24
-23
-22
-40-200 20406080
TEMPERATURE (°C)
IBIAS - (µA)
MAX
MEDIAN
MIN
n = 100
ISL55190, ISL55290
11 FN6262.1
March 30, 2007
FIGURE 37. IBIAS+ vs TEMPERATURE VS = ±1.5V FIGURE 38. IBIAS- vs TEMPERATURE VS = ±1.5V
FIGURE 39. IOS vs TEMPERATURE VS = ±2.5V FIGURE 40. IOS vs TEMPERATURE VS = ±1.5V
FIGURE 41. CMRR vs TEMPERATURE. V+ = ±2.5V, ±1.5V FIGURE 42. PSRR vs TEMPERATURE ±1.5V to ±2.5V,
VS = ±2.5V
Typical Performance Curves (Continued)
-31
-30
-29
-28
-27
-26
-25
-24
-23
-22
-21
-40-200 20406080
TEMPERATURE (°C)
IBIAS + (µA)
n = 100
MEDIAN
MIN
MAX
-30
-29
-28
-27
-26
-25
-24
-23
-22
-21
-40 -20 0 20 40 60 80
TEMPERATURE (°C)
IBIAS - (µA)
n = 100
MEDIAN
MIN
MAX
-1.6
-1.4
-1.2
-1.0
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
-40-200 20406080
TEMPERATURE (°C)
IOS (µA)
MEDIAN
MIN
MAX
n = 100
-1.5
-1.3
-1.1
-0.9
-0.7
-0.5
-0.3
-0.1
0.1
0.3
0.5
-40-200 20406080
TEMPERATURE (°C)
IOS (nA)
MEDIAN
MIN
MAX
n = 100
91
92
93
94
95
96
97
98
-40-200 20406080
TEMPERATURE (°C)
CMRR (dB)
n = 100
V+ = 5V
V+ = 3V
80
90
100
110
120
130
-40-200 20406080
TEMPERATURE (°C)
PSRR (dB)
n = 100
MEDIAN
MIN
MAX
ISL55190, ISL55290
12 FN6262.1
March 30, 2007
FIGURE 43. VOUT HIGH vs TEMPERATURE VS = ±2.5V,
RL=1k FIGURE 44. VOUT LOW vs TEMPERA TU RE VS= ±2.5V, RL = 1k
FIGURE 45. VOUT HIGH vs TEMPERA TURE VS= ±1.5V,
RL=1k FIGURE 46. VOUT LOW vs TEMPERA TUR E VS= ±1.5V, RL = 1k
Typical Performance Curves (Continued)
4.968
4.970
4.972
4.974
4.976
4.978
4.980
4.982
4.984
4.986
-40 -20 0 20 40 60 80
TEMPERATURE (°C)
n = 100
MEDIAN
MIN
MAX
VOUT (mV)
20
30
40
50
60
70
80
90
100
110
-40-200 20406080
TEMPERATURE (°C)
VOUT (mV)
n = 100
MEDIAN
MIN
MAX
2.972
2.974
2.976
2.978
2.980
2.982
2.984
2.986
-40-200 20406080
TEMPERATURE (°C)
VOUT (V)
n = 100
MEDIAN
MIN
MAX
20
25
30
35
40
45
50
55
60
-40 -20 0 20 40 60 80
TEMPERATURE (°C)
VOUT (mV)
n = 100
MEDIAN
MIN
MAX
ISL55190, ISL55290
13 FN6262.1
March 30, 2007
Pin Descriptions
ISL55190
(8 Ld SOIC) ISL55190
(8 Ld DFN) ISL55290
(10 Ld MSOP) PIN NAME FUNCTION EQUIVALENT CIRCUIT
5 6 NC Not connected
232 (A)
8 (B) IN- Inverting input
Circuit 1
343 (A)
7 (B) IN+ Non-inverting input (See circuit 1)
4 5 4 V- Negative supply
671 (A)
9 (B) OUT Output
Circuit 2
7 8 10 V+ Positive supply
5 (A)
6 (B) EN Enable pin with internal pull-
down referenced to the -V
pin; Logic “1” selects the
disabled state; Logic “0”
selects the enabled state.
Circuit 3a
8 1 EN Enable pin with internal pull-
down referenced to the -V
pin; Logic “0” (-V) selects
the disabled state; Logic “1”
(+V) selects the enabled
state.
Circuit 3b
1 2 FEEDBACK Feedback pin to reduce IN-
capacitance
Circuit 4
IN+IN-
V+
V-
V+
V-
OUT
EN
V+
V-
EN
V+
V-
FEEDBACK
V+
V-
OUT
ISL55190, ISL55290
14 FN6262.1
March 30, 2007
Applications Information
Product Descr iption
The ISL55190 and ISL55290 are single and dual high
speed, voltage feedback amplifiers designed for fast pulse
applications, as well as communication and imaging systems
that require very low voltage and current noise. Both devices
are stable at a minimum gain of 5 and feature low distortion
while drawing moderately low supply current. The ISL55190
and ISL55290 use a classical voltage-feedback topology,
which allows them to be used in a variety of high speed
applications where current-feedback amplifiers are not
appropriate due to restrictions placed upon the feedback
element used with the amplifier.
Enable/Power-Down
Both devices can be operated from a single supply with a
voltage range of +3V to +5V, or from split ±1.5V to ±2.5V.
The logic level input to the ENABLE pins are TTL compatible
and are referenced to the -V terminal in both single and split
supply applications. The following discussion assumes
single supply operation.
The ISL55190 uses a logic “0” (<0.8V) to disable the
amplifier and the ISL55290 uses a logic “1” (>2V) to disable
its amplifiers. In this condition, the output(s) will be in a high
impedance state and the amplifier(s) current will be reduced
to 21µA. The ISL55190 has an internal pull-up on the EN pin
and is enabled by either floating or tying the EN pin to a
voltage >2V. The ISL55290 has internal pull-downs on the
EN pins and are enabled by either floating or tying the EN
pins to a voltage <0.8V. The enable pins should be tied
directly to their respective supply pins when not being used
(EN tied to -V for the ISL55290 and EN tied to +V for the
ISL55190).
Current Limiting
The ISL55190 and ISL55290 have no internal current-
limiting circuitry. If the output is shorted, it is possible to
exceed the Absolute Maximum Rating for output current or
power dissipation, potentially resulting in the destruction of
the device.
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related using
Equation 1:
where:
•P
DMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
•PD
MAX for each amplifier can be calculated using
Equation 2:
where:
•T
MAX = Maximum ambient temperature
θJA = Thermal resistance of the package
•PD
MAX = Maximum power dissipation of 1 amplifier
•V
S = Supply voltage
•I
MAX = Maximum supply current of 1 amplifier
•V
OUTMAX = Maximum output voltage swing of the
application
•R
L = Load resistance
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Low
impedance ground plane construction is essential. Surface
mount components are recommended, but if leaded
components are used, lead lengths should be as short as
possible. The power supply pins must be well bypassed to
reduce the risk of oscillation. The combination of a 4.7µF
tantalum capacitor in parallel with a 0.01µF capacitor has
been shown to work well when placed at each supply pin.
For good AC performance, parasitic capacitance should be
kept to a minimum, especially at the inverting input. When
ground plane construction is used, it should be removed
from the area near the inverting input to minimize any stray
capacitance at that node. Carbon or Metal-Film resistors are
acceptable with the Metal-Film resistors giving slightly less
peaking and bandwidth because of additio nal series
inductance. Use of sockets (particularly for the SOIC
package) should be avoided if possible. Sockets add
parasitic inductance and capacitance which, will result in
additional peaking and overshoot.
For inverting gains, this parasitic capacitance has little ef fect
because the inverting input is a virtual ground, but for non-
inverting gains, this capacitance (in conjunction with the
feedback and gain resistors) creates a pole in the feedback
path of the amplifier. This pole, if low enough in frequency,
has the same destabilizing effect as a zero in the forward
open-loop response. The use of large-value feedback and
gain resistors exacerbates the problem by further lowering
the pole frequency (increasing t he possibility of oscillation).
TJMAX TMAX θJAxPDMAXTOTAL
()+= (EQ. 1)
PDMAX 2*VSISMAX VS
( - VOUTMAX)VOUTMAX
RL
----------------------------
×+×=
(EQ. 2)
ISL55190, ISL55290
15 FN6262.1
March 30, 2007
The ISL55190 single has a dedicated feedback pin which is
internally connected to the amplifier output and located next
to the inverting input pin. This additional output connection
enables the PC board trace capacitance at the inverting pin
to be minimized.
Current Sense Application Circuit
The schematic in Figure 47 provides an example of utilizing
the ISL55190 high speed performance with the ground
sensing input capability to implement a single-supply , G =1 0
differential low side current sense amplifier. This circuit can
be used to sense currents of either polarity. Th e reference
voltage applied to VREF (+2.5V) defines the amplifier outp ut
0A current sense reference voltage at one half the supply
voltage level (VS = +5VDC), and RSENSE sets the current
sense gain and full scale values. In this example the current
gain is 10A/V over a maximum current range of slightly less
than ±25A with RSENSE = 0.01Ω. The amplifier VIO error
(-1.1mV max) and input bias offset current (IIO) error (1.3µA)
together contribute less than 15mV (150mA) at the output for
better than 0.3% full scale accuracy.
The amplifier’s high slew rate and fast pulse response make
this circuit suitable for low-side current sensing in PWM and
motor control applications. The excellent input overload
recovery response enables the circuit to maintain
performance in the presence of parasitic inductance that can
cause fast rise and falling edge spikes that can momentarily
overload the input stage of the amplifier.
RSENSE
0.01Ω
RF
10kΩ
IN-
IN+
ISL55190
RL
RT
OUT
V-
V+
FEEDBACK
+5VDC
PARASITIC
L TO R VOUT
CURRENT
INPUT
CURRENT
INPUT
RG+
100Ω
RG-
100
RREF
10kΩ
FIGURE 47. GROUND SIDE CURRENT SENSE AMPLIFIER
VREF
+2.5V
ISL55190, ISL55290
16 FN6262.1
March 30, 2007
ISL55190, ISL55290
Small Outline Package Family (SO)
GAUGE
PLANE
A2
A1 L
L1
DETAIL X 4° ±4°
SEATING
PLANE
eH
b
C
0.010 BMCA
0.004 C
0.010 BMCA
B
D
(N/2)
1
E1
E
NN (N/2)+1
A
PIN #1
I.D. MARK
h X 45°
A
SEE DETAIL “X”
c
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
SYMBOL
INCHES
TOLERANCE NOTESSO-8 SO-14
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -
A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -
A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -
b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -
c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -
D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3
E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -
E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3
e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -
L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -
L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -
h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -
N 8 14 16 16 20 24 28 Reference -
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
17 FN6262.1
March 30, 2007
ISL55190, ISL55290
Package Outline Drawing
L8.3x3D
8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE (DFN)
Rev 0, 9/06
C
BOTTOM VIEW
TOP VIEW
SIDE VIEW
DETAIL “X”
TYPICAL RECOMMENDED LAND PATTERN
3.00
PIN 1 INDEX AREA
(1.75)
(1.45)
(8X 0.25) (8X 0.60)
(6X 0.50 BSC)
SEE DETAIL X''
0.20 REF
0~0.05
5
PIN 1 INDEX AREA
8X 0.25
6X 0.50 BSC
1.75 1.50
REF
3.00
0.85
(2.20)
8X 0.40
2.20
4X
A
B
0.10 C A B
0.10 C
SEATING PLANE
0.08 C
c
1.45
NOTES:
1. Controlling dimensions are in mm.
Dimensions in ( ) for reference only.
2. Unless otherwise specified, tolerance : Decimal ±0.05
Angular ±2°
3. Dimensioning and t olerancing conform to JEDEC STD MO220-D.
4. The configu ration of t he pin #1 iden tifier is optional, but must b e located
within the zone indicated. The pin #1 identifier may be either a mold or
mark feature.
5. Tiebar shown (if present) is a non-functional feature.
0.075 C
M
18
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent right s of Int ersi l or it s sub sidi aries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6262.1
March 30, 2007
ISL55190, ISL55290
Mini SO Package Family (MSOP)
1(N/2)
(N/2)+1
N
PLANE
SEATING
N LEADS
0.10 C
PIN #1
I.D.
E1E
b
DETAIL X
3° ±3°
GAUGE
PLANE
SEE DETAIL "X"
c
A
0.25
A2
A1 L
0.25 C A B
D
A
M
B
e
C
0.08 C A B
M
H
L1
MDP0043
MINI SO PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCE NOTESMSOP8 MSOP10
A1.101.10 Max. -
A1 0.10 0.10 ±0.05 -
A2 0.86 0.86 ±0.09 -
b 0.33 0.23 +0.07/-0.08 -
c0.180.18 ±0.05 -
D 3.00 3.00 ±0.10 1, 3
E4.904.90 ±0.15 -
E1 3.00 3.00 ±0.10 2, 3
e0.650.50 Basic -
L0.550.55 ±0.15 -
L1 0.95 0.95 Basic -
N 8 10 Reference -
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.