Si550
Rev. 0.5 7
3. Ordering Information
The Si550 was designed to support a variety of options including frequency, temperature stability, tuning slope,
output format, and VDD. Specific device configurations are programmed into the Si550 at time of shipment.
Configurations are specified using the Part Number Configuration chart shown below. Silicon Labs provides a web
browser-based part number configuration utility to simplify this process. Refer to
www.silabs.com/VCXOPartNumber to access this tool and for further ordering instructions. The Si550 VCXO
series is supplied in an industry-standard, RoHS compliant, lead-free, 6-pad, 5 x 7 mm package. Tape and reel
packaging is an ordering option.
Figure 1. Part Number Convention
Example Part Number: 550AF622M080BGR is a 5 x 7 mm VCXO in a 6 pad package. The nominal frequency is 622.080 MHz, with a 3.3 V supply,
LVPECL output, and Output Enable active high polarity. Temperature stability is specified as ±50 ppm and the tuning slope is 135 ppm/V. The part
is specified for a –40 to +85 C° ambient temperature range operation and is shipped in tape and reel format.
R = Tape & Reel
Blank = Trays
Operating Temp Range (°C)
G –40 to +85 °C
Device Revision Letter
2nd Option Code
Temperature Tuning Slope Minimum APR
Stability Kv (±ppm)
Code ± ppm (max) ppm/V (typ) @ 3.3 V @ 2.5 V @ 1.8 V
A 100 180 100 75 25
B 100 90 30 Note 6 Note 6
C 50 180 150 125 75
D50 90 803025
E 20 45 25 Note 6 Note 6
F 50 135 100 75 50
Notes:
1. For best jitter and phase noise performance, always choose the smallest Kv that
meets the application’s minimum APR requirements. Unlike SAW-based solutions
which require higher higher Kv values to account for their higher temperature
dependence, the Si55x series provides lower Kv options to minimize noise coupling
and jitter in real-world PLL designs. See AN255 and AN266 for more information.
2. APR is the ability of a VCXO to track a signal over the product lifetime. A VCXO with
an APR of ±25 ppm is able to lock to a clock with a ±25 ppm stability, over 15 years.
3. Nominal Pull range (±) = 0.5 x VDD x tuning slope.
4. Nominal Absolute Pull Range (±APR) = Pull range – stability – lifetime aging
= 0.5 x VDD x tuning slope – stability – 10 ppm
5. Minimum APR values noted above include worst case values for all parameters.
6. Combination not available.
550 VCXO
Product Family
Frequency (e.g. 622M080 is 622.080 MHz)
Available frequency range is 10 to 945 MHz, 970 to 1134, and 1213 to
1417 MHz. The position of “M” shifts to denote higher or lower
frequencies. If the frequency of interest requires greater than 6 digit
resolution, a six digit code will be assigned for the specific frequency.
550 X X XXXMXXX B G R
1st Option Code
VDD Output Format Output Enable Polarity
A 3.3 LVPECL High
B 3.3 LVDS High
C 3.3 CMOS High
D3.3CML High
E 2.5 LVPECL High
F 2.5 LVDS High
G 2.5 CMOS High
H2.5CML High
J 1.8 CMOS High
K1.8CML High
M 3.3 LVPECL Low
N 3.3 LVDS Low
P 3.3 CMOS Low
Q 3.3 CML Low
R 2.5 LVPECL Low
S 2.5 LVDS Low
T 2.5 CMOS Low
U 2.5 CML Low
V 1.8 CMOS Low
W 1.8 CML Low
Note:
CMOS available to 160 MHz.