AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 1 of 14 AP393
www.diodes.com © Diodes Incorporated
Features
Wide supply
- Voltage range: 2.0V to 36V
- Single or dual supplies: ±1.0V to ±18V
Very low supply current drain (0.4 mA) – independent
of supply voltage
Low input biasing current: 25 nA
Low input offset current: ±5 nA
Maximum offset voltage: ±3 mV
Input common-mode voltage range includes ground
Differential input voltage range equal to the power
supply voltage
Low output saturation voltage: 250 mV at 4 mA
Output voltage compatible with TTL, DTL, ECL, MOS
and CMOS logic systems
Packages: 8-pin SOP-8L and DFN (Under
Development) Green packages
Advantages
High precision comparators
Reduced VOS drift over temperature
Eliminates need for dual supplies
Allows sensing near ground
Compatible with all forms of logic
Power drain suitable for battery operation
Pin Assignment
General Description
The AP393 consists of two independent precision voltage
comparators with an offset voltage specification as low as 2.0
mV max for two comparators which were designed specifically to
operate from a single power supply over a wide range of
voltages. Operation from split power supplies is also possible
and the low power supply current drain is independent of the
magnitude of the power supply voltage. These comparators also
have a unique characteristic in that the input common-mode
voltage range includes ground, even though operated from a
single power supply voltage.
Application areas include limit comparators, simple analog to
digital converters; pulse, squarewave and time delay generators;
wide range VCO; MOS clock timers; multivibrators and high
voltage digital logic gates. The AP393 is designed to directly
interface with TTL and CMOS. When operated from both plus
and minus power supplies, the AP393 will directly interface with
MOS logic where their low power drain is a distinct advantage
over standard comparators.
SOP-8L/DFN-8L
1
2
3
45
6
7
8
(Top View)
INVERTING INPUT 1
GND
AP393
NON-INVERTING INPUT 1
OUTPUT 2
OUTPUT 1 V+
INVERTING INPUT 2
NON-INVERTING INPUT 2
Pin Descriptions
Pin Name Pin
No. Description
OUTPUT 1 1 Channel 1 Output
INVERTING
INPUT 1 2 Channel 1 Negative Input
NON-INVERTING
INPUT 1 3 Channel 1 Positive Input
GND 4 Ground
Pin Name Pin
No. Description
NON-INVERTING
INPUT 2 5 Channel 2 Positive Input
INVERTING
INPUT 2 6 Channel 2 Negative Input
OUTPUT 2 7 Channel 2 Output
V+ 8 Vcc
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 2 of 14 AP393
www.diodes.com © Diodes Incorporated
A P 3 9 3 X X X
Package Packing
Blank : Tube or bulk
-7/-13 : Taping
SM : SOP-8L
FE : DFN
Lead-Free
Blank : Lead-Free
G : Green
Ordering Information (Note 1)
7” Tape and Reel 13” Tape and Reel
Device Package
Code Packaging Quantity Part Number
Suffix Quantity Part Number
Suffix
AP393SM SM SOP-8L
3000/Tape & Reel -7 10,000/Tape &
Reel -13
AP393FE FE DFN
3000/Tape & Reel -7 10,000/Tape &
Reel -13
Block Diagram
INVERTING INPUT 1
GND
NON-INVERTING INPUT 1
OUTPUT 2
OUTPUT 1
INVERTING INPUT 2
NON-INVERTING INPUT 2
1
2
3
45
6
7
8
AB
+-+-
V+
V
+
100µA3.5µA100µA3.5µA
+INPUT
-INPUT
OUTPUT
Q1
Q2 Q3
Q4
Q5
Q6
Q7Q8
Note 1: For Packaging Details, go to our website at http://www.diodes.com/datasheets/ap02007.pdf.
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 3 of 14 AP393
www.diodes.com © Diodes Incorporated
Absolute Maximum Ratings (Note 11)
Symbol Parameter Rating Unit
VCC Supply Voltage 36 V
VIN Differential Input Voltage (Note 9) 36 V
VIN Input Voltage -0.3 to +36 V
ICC Input Current (VIN-0.3V) (Note 4) 50 mA
SOP-8L (SM) 600
PD Power Dissipation (Note 2) DFN (FE) 250 mW
Output Short-Circuit to Ground (Note 3) Continuous
TOP Operating Temperature Range 0 to +70 oC
TST Storage Temperature Range -65 to +150 oC
TLead Lead Temperature Range (Soldering, 10 sec) +260 oC
DFN Soldering (10 sec) +260
Vapor Phase (60 sec) +215
Soldering Information SOP-8L Infrared (15 sec) +220
oC
ESD rating (1.5k in with 100pF) 1300 V
Electrical Characteristics (VCC=5V, TA=25oC, unless otherwise stated)
Symbol Parameter Conditions Min. Typ. Max. Unit
VOFFSET Input Offset Voltage (Note 10) - 7.0 12.0 mV
IBIAS Input Bias Current IIN(+) or IIN(-) with Output In Linear
Range, VCM=0V (Note 6) - 25 250 nA
IOFFSET Input Offset Current IIN(+) - IIN(-) VCM=0V - 5.0 50 nA
Input Common Mode Voltage Range V+ =30V (Note 7) 0 - V+ -1.5 V
V+ =5V - 0.4 1
ICC Supply Current RL= V+ =36V - 1 2.5
mA
Voltage Gain RL > 15k, V+ =15V
VO=1V to 11V 50 200 - V/mV
Large Signal Response Time VIN=TTL Logic Swing,
VREF=1.4V, VRL=5V, RL=5.1k - 300 - ns
Response Time VRL=5V, RL=5.1k (Note 8) - 1.3 - µs
IO(Sink) Output Sink Current VIN(-)=1V, VIN(+)=0, VO <1.5V 6.0 16 - mA
VSAT Saturation Voltage VIN(-)=1V, VIN(+)=0, ISINK < 4mA - 250 400 mV
IO(Leak) Output Leakage Current VIN(-)=0, VIN(+)=1V, VO=5V - 0.1 - nA
Electrical Characteristics (VCC=5V) (Note 5)
Symbol Parameter Conditions Min. Typ. Max. Unit
VOFFSET Input Offset Voltage (Note 10) - - 12 mV
IOFFSET Input Offset Current IIN(+) -IIN(-), VCM=0V - - 150 nA
IBIAS Input Bias Current IIN(+) or IIN(-) with Output In Linear
Range, VCM=0V (Note 6) - - 400 nA
Input Common Mode Voltage Range V+ =30V (Note 7) 0 - V+ -2.0 V
VSAT Saturation Voltage VIN(-)=1V, VIN(+)=0, ISINK < 4mA - - 700 mV
IO(Leak) Output Leakage Current VIN(-)=0, VIN(+)=1V, VO=30V - - 1.0 µA
Differential Input Voltage Keep All VIN’s > 0V (or V-, if Used),
(Note 9) - - 36 V
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 4 of 14 AP393
www.diodes.com © Diodes Incorporated
Note 2: For operating at high temperatures, the AP393 must be derated based on a 125°C maximum junction temperature and a
thermal resistance of 170°C/W which applies for the device soldered in a printed circuit board, operating in a still air ambient.
The AP393 must be derated based on a 150°C maximum junction temperature. The low bias dissipation and the “ON-OFF”
characteristic of the outputs keeps the chip dissipation very small (PD <100 mW), provided the output transistors are allowed
to saturate.
Note 3: Short circuits from the output to V+ can cause excessive heating and eventual destruction. When considering short circuits to
ground, the maximum output current is approximately 20 mA independent of the magnitude of V+.
Note 4: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base
junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this
diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output
voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input
is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which is negative,
again returns to a value greater than -0.3V.
Note 5: The AP393 temperature specifications are limited to 0°C < TA < +70°C.
Note 6: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent
of the state of the output so no loading change exists on the reference or input lines.
Note 7: The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The
upper end of the common-mode voltage range is V+-1.5V at 25°C, but either or both inputs can go to 36V without damage,
independent of the magnitude of V+.
Note 8: The response time specified is for a 100 mV input step with 5 mV overdrive. For larger overdrive signals 300 ns can be
obtained, see typical performance characteristics section.
Note 9: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than
-0.3V (or 0.3V below the magnitude of the negative power supply, if used).
Note 10: At output switch point, VO ~ 1.4V, RS=0 with V+ from 5V to 30V; and over the full input common-mode range (0V to V+-1.5V),
at 25°C.
Note 11: Refer to RETS193AX for AP393 military specifications.
Typical Circuit (VCC
=5.0VDC)
VO
3.0K
V+
+VIN
+VREF
Basic Comparator
+
-
DP393
Driving CMOS
+
-
+5.0VDC
100K
DP393
1/4 MM54CXX
Driving TTL
+
-
AP393
1/4 DM54XX
+5VDC
10K
+
-
VO
100K
100K
100K
100K
75 pF
4.3K
V+
V+
V+
Squarewave Oscillator
1:100kHz
1/2 AP393
0
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 5 of 14 AP393
www.diodes.com © Diodes Incorporated
Typical Circuit (Continued) (VCC
=5.0VDC)
Pulse Generator
+
-
VO
100K
1M
1M
1M
80 pF
15K
V+
+15VDC
1M
R2
R1
1N914
D1
1N914
D2
60µs
6µs-V+
0
tOt1t2
*For large ratios of R1/R2, D1 can
be omitted
1/2 AP393
*
Crystal Controlled Oscillator
+
-
VO
200K
0.1uF
2.0K
V+
V+
100K
200K
0
CRYSTAL
f=100KHz
1/2 AP393
+
-
+
-
+
-
+VC
FREQUENCY
CONTROL
VOLTAGE
INPUT
0.1µF
10
20K
20K
50K
V+/2
OUTPUT2
OUTPUT1
500pF
V+
0.01µF
3.0K
5.1K
100K
3.0K
V+
Two-Decade High Frequency VCO
V+/2
1/2 AP393
1/2 AP393
1/2 AP393
100K
VO
3.0K
V+
+VIN
+VREF
Basic Comparator
+
-
V*=+30VDC
+250mVDC < VC < +50VDC
700Hz < fO < 100KHz
1/2 AP393
Non-Inverting Comparator with
Hysteresis
VO
3K
V+
+VIN
+VREF
+
-
10M
10K
1/2 AP393
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 6 of 14 AP393
www.diodes.com © Diodes Incorporated
Typical Circuit (Continued) (VCC
=5.0VDC)
Inverting Comparator with
Hysteresis
+
-3K
+VIN
V+1M
1M
1M
VO
V+
1/2 AP393
VO
6.2K
V+
Output Strobing
+
-
STROBE
INPUT
*
* OR LOGIC GATE WITHOUT PULL-UP
RESISTOR
1/2 AP393
AND Gate
f
3K
V+
A
+
-
1K
B
C
1K
100K
100K
100K
39K
+0.375V
0
"0" "1"
1/2 AP393
V+
Or Gate
3K
V+
A
+
-
1K
B
C
1K
100K
100K
100K
200K
+0.075V
V+
0
"0" "1"
f
1/2 AP393
Large Fan-in AND Gate
R4
3K
V+
A+
-
D1
B
C
100K
10K
V+
0
"0" "1"
D
D2
D3
D4
ALL DIODES 1N914
100K
VOUT
1/2 AP393
Limit Comparator
+
-
+
-
2RS
2RS
RS
10K
V+ (12VDC)
LAMP
12 ESB
+VIN
+VREF LOW
+VREF HI
2N2222
1/2 AP393
1/2 AP393
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 7 of 14 AP393
www.diodes.com © Diodes Incorporated
Typical Circuit (Continued) (VCC
=5.0VDC)
5.1K
Comparing Input Voltages of
Opposite Polarity
+
-
2N2222
100K
100K
+VIN1
-VIN2 1/2 AP393
ORing the Outputs
+
-
+
-
3.0K
VO
V+
1/2 AP393
1/2 AP393
Zero Crossing Detector
(Single Power Supply)
5.1K
V+
+
-
VO
100K 100K
5.1K5.1K
1N914
VIN
10K
20M
1/2 AP393
One-Shot Multivibrator
10K
V+
+
-
VO
1N914
1M 1N914
100pF
0.001µF
1M
1M
+
0t0
PW
t0t1
0
V+
1ms
1/2 AP393
Bi-Stable Mult ivibrator
15K
V+
+
-
VO
100K
S
100K
100K
51K
R
V+
0
V+
0
+15V
0
S
R
1/2 AP393
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 8 of 14 AP393
www.diodes.com © Diodes Incorporated
Typical Circuit (Continued) (VCC
=5.0VDC)
One-Shot Multivibrator with Input Lock Out
V+
+
-
VO
100pF
100K
1M
t0t1
0
V+
+
-
100K 1M
+VIN
240K
62K
10M
15K
560K10M
40µs
1µs
0
+4V 1/2 AP393
1/2 AP393
Time Delay Generator
3.0K
V+
VO3
10M
0
+
-
3.0K
VO2
+
-
3.0K
VO1
+
-
+
-
t0t1t2t3t4
V1
V2
V3
V+
t
VC1
V1
V2
V3
51K
51K
51K
10K
10K
10K
200K15K10K
VC1
C1
0.001µF
10M
10M
V+
V+
V+
t0t4+VIN
10K
INPUT GATING SIGNAL
0
V+
t0t1
0
V+
t0t2
0
V+
t0t3
1/2 AP393
1/2 AP393
1/2 AP393
1/2 AP393
0
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 9 of 14 AP393
www.diodes.com © Diodes Incorporated
S plit-Supply Applications (V+=+15VDC and V- =-15 VDC)
+
-
+
-
+
-
2.4K
2.4K
φ
A
φ
B
2K8.2K
3.9K2K
V+
10K
51K
51K
5.1K
50pF
V-
6.8K
MOS Clock Driver
1/2 AP393
1/2 AP393
1/2 AP393
1/2 AP393
Zero Cross i ng De tec tor
+
-
VIN
+
V-
5.1K
V+
VO1/2 AP393
+
-
VIN
+
V
5.1K
V+
VO
-5 VDC
Comparator With a
Negative Reference
1/2 AP393
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 10 of 14 AP393
www.diodes.com © Diodes Incorporated
Typical Characteristics
Supply Current Input Current
Output Saturation Voltag e
Response Time for Various Input
Overdrives—Negative Transition Response Time for Various Input
Overdrives—Positiv e Transition
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 11 of 14 AP393
www.diodes.com © Diodes Incorporated
Application Information
The AP393 are high gain, wide bandwidth devices which, like
most comparators, can easily oscillate if the output lead is
inadvertently allowed to capacitively couple to the inputs via
stray capacitance. This shows up only during the output voltage
transition intervals as the comparator change states. Power
supply bypassing is not required to solve this problem. Standard
PC board layout is helpful as it reduces stray input-output
coupling. Reducing the input resistors to < 10k reduces the
feedback signal levels and finally, adding even a small amount
(1.0 to 10 mV) of positive feedback (hysteresis) causes such a
rapid transition that oscillations due to stray feedback are not
possible. Simply socketing the IC and attaching resistors to the
pins will cause input-output oscillations during the small
transition intervals unless hysteresis is used. If the input signal is
a pulse waveform, with relatively fast rise and fall times,
hysteresis is not required. All input pins of any unused
comparators should be tied to the negative supply.
The bias network of the AP393 establishes a drain current which
is independent of the magnitude of the power supply voltage
over the range of from 2.0 VDC to 30 VDC. It is usually
unnecessary to use a bypass capacitor across the power supply
line.
The differential input voltage may be larger than V+ without
damaging the device (Note 8). Protection should be provided to
prevent the input voltages from going negative more than -0.3
VDC (at 25°C). An input clamp diode can be used as shown in the
applications section.
The output of the AP393 is the uncommitted collector of a
grounded-emitter NPN output transistor. Many collectors can be
tied together to provide an output OR’ing function. An output
pull-up resistor can be connected to any available power supply
voltage within the permitted supply voltage range and there is no
restriction on this voltage due to the magnitude of the voltage
which is applied to the V+ terminal of the AP393 package. The
output can also be used as a simple SPST switch to ground
(when a pull-up resistor is not used). The amount of current
which the output device can sink is limited by the drive available
(which is independent of V+) and the β of this device. When the
maximum current limit is reached (approximately 16mA), the
output transistor will come out of saturation and the output
voltage will rise very rapidly. The output saturation voltage is
limited by the approximately 60 r
SAT of the output transistor.
The low offset voltage of the output transistor (1.0 mV) allows
the output to clamp essentially to ground level for small load
currents.
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 12 of 14 AP393
www.diodes.com © Diodes Incorporated
Marking Information
(1) SOP-8L
AP393
(Top view)
Y WW
Part Number
Logo
WW: Nth week
Y: Year
XBlank : Lead Free
G : Green
(2) DFN
Blank : Lead Free
Green : Underlined First code
D6
Mar king Code : D6
(Top v iew )
Marking Code Table
Device Package Marking Code Date Code
AP393SM SOP-8L AP393 YWW
AP393FE DFN D6 -
Date Code Key
Year 2006 2007 2008 2009 2010
Code T U V W X
Month Jan Feb March Apr May Jun Jul Aug Sep Oct Nov Dec
Code 1 2 3 4 5 6 7 8 9 O N D
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 13 of 14 AP393
www.diodes.com © Diodes Incorporated
Package Information (All Dimensions in mm)
(1) DFN2116-8
1.55/1.675
Typ 1.60
0.30/0.50
Typ 0.40 0.545/0.605
Typ 0.575
2.05/2.175
Typ 2.10
0.275/0.375
Typ 0.325
0.20/0.30
Typ 0.25
Typ 0.50
1.60/1.80 Typ 1.70
0/0.05
Typ 0.02
Typ 0.13
(2) SOP-8L
3.85/3.95
Typ 3.90
3.80/3.90
Typ 3.85
45°
0.60/0.70
Typ 0.65
0.15/0.25
Typ 0.20
0.60/0.80
Typ 0.70
1.27
4.85/4.95
Typ 4.90
1.40/1.50
Typ 1.45
0.30/0.50
Typ 0.40
5.90/6.10
Typ 6.00
5
4
1
8
0.08/0.25
Typ 0.15
R 0.1
(All side)
9°
4° 3°
±
0.35
RECOMMENDED LAND PATTERN
8X 2.2
.20
6X 1.27
8X .02
AP393
LOW POWER LOW OFFSET VOLTAGE DUAL
COMPARATORS
DS30737 Rev. 2 - 2 14 of 14 AP393
www.diodes.com © Diodes Incorporated