DGN−8 D−8
NC − No internal connection
1
2
3
4
8
7
6
5
NC
IN−
IN+
VCC−
NC
VCC+
OUT
NC
THS3001
D OR DGN PACKAGE
(TOP VIEW)
f − Frequency − Hz
OUTPUT AMPLITUDE
vs FREQUENCY
5
3
1
−1 1M 100M
6
4
2
0
10M 1G100k
7
8
Output Amplitude − dB
G = 2
RL = 150 Ω
VI = 200 mV RMS
HARMONIC DISTORTION
vs FREQUENCY
−70
−80
−90
−100
−75
−85
−95
Harmonic Distortion − dBc
Gain = 2
VCC = ±15 V
VO = 2 VPP
RL = 150 Ω
RF = 750 Ω
100k 1M 10M
f − Frequency − Hz
VCC = ±15 V
RF = 680 Ω
VCC = ±5 V
RF = 750 Ω
3rd Harmonic
2nd Harmonic
THS3001
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................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
420-MHz HIGH-SPEED CURRENT-FEEDBACK AMPLIFIER
Check for Samples: THS3001
1FEATURES APPLICATIONS
• Communication
2• High Speed: • Imaging
– 420-MHz Bandwidth (G = 1, -3 dB) • High-Quality Video
– 6500-V/μs Slew Rate
– 40-ns Settling Time (0.1%)
• High Output Drive: IO= 100 mA
• Excellent Video Performance
– 115-MHz Bandwidth (0.1 dB, G = 2)
– 0.01% Differential Gain
– 0.02° Differential Phase
• Low 3-mV (max) Input Offset Voltage
• Very Low Distortion:
– THD = –96 dBc at f = 1 MHz RELATED DEVICES
– THD = –80 dBc at f = 10 MHz THS4011 /2 290-MHz VFB High-Speed Amplifier
• Wide Range of Power Supplies: THS6012 500-mA CFB HIgh-Speed Amplifier
– VCC = ±4.5 V to ±16 V THS6022 250-mA CFB High-Speed Amplifier
• Evaluation Module Available
DESCRIPTION
The THS3001 is a high-speed current-feedback operational amplifier, ideal for communication, imaging, and
high-quality video applications. This device offers a very fast 6500-V/μs slew rate, a 420-MHz bandwidth, and
40-ns settling time for large-signal applications requiring excellent transient response. In addition, the THS3001
operates with a very low distortion of –96 dBc, making it well suited for applications such as wireless
communication basestations or ultrafast ADC or DAC buffers.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1998–2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS(1)
PACKAGED DEVICE TRANSPORT MEDIA, EVALUATION
TASOIC MSOP MSOP QUANTITY MODULE
(D) (DGN) SYMBOL
THS3001CD THS3001CDGN Rails, 75 THS3001EVM
ADP
THS3001CDR THS3001CDGNR Tape and Reel, 2500 --
0°C to 70°C THS3001HVCDGN Rails, 75 --
BNK
THS3001HVCDGNR Tape and Reel, 2500 --
THS3001ID THS3001IDGN Rails, 75 --
ADQ
THS3001IDR THS3001IDGNR Tape and Reel, 2500 --
-40°C to 85°C THS3001HVIDGN Rails, 75 --
BNJ
THS3001HVIDGNR Tape and Reel, 2500 --
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted) THS3001 THS3001HV UNITS
VSS Supply voltage, VCC+ to VCC- 33 37 V
VIInput voltage ±VCC ±VCC V
IOOutput current 175 175 mA
VID Differential input voltage ±6 ±6 V
Continuous total power dissipation See Dissipation Rating Table
TJMaximum junction temperature (2) 150 150 °C
TJMaximum junction temperature, continuous operation, long term reliability(3) 125 125 °C
THS3001C, 0 to 70 0 to 70 °C
THS3001HVC
TAOperating free-air temperature THS3001I, –40 to 85 –40 to 85 °C
THS3001HVI
Tstg Storage temperature –65 to 125 –65 to 125 °C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) The absolute maximum temperature under any condition is limited by the constraints of the silicon process.
(3) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
DISSIPATION RATING TABLE POWER RATING (2)
θJC θJA (1)
PACKAGE (°C/W) (°C/W) TA≤25°C TA= 85°C
D (8) 38.3 97.5 1.02 W 410 mW
DGN (8) 4.7 58.4 1.71 W 685 mW
(1) This data was taken using the JEDEC standard High-K test PCB.
(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase.
Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long
term reliability.
2Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
THS3001
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................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT
Split supply ±4.5 ±16
THS3001C,
THS3001I
Single supply 9 32 V
VSS Supply voltage, VCC+ and VCC- Split supply ±4.5 ±18.5
THS3001HVC,
THS3001HVI
Single supply 9 37
THS3001C, THS3001HVC 0 70
TAOperating free-air temperature °C
THS3001I, THS3001HVI -40 85
ELECTRICAL CHARACTERISTICS
At TA= 25°C, RL= 150 Ω, RF= 1 kΩ(unless otherwise noted)
PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT
THS3001C ±4.5 ±16.5
THS3001I
Split supply THS3001HVx ±4.5 ±18.5
VCC Power supply operating range V
THS3001C 9 33
THS3001I
Single supply THS3001HVx 9 37
TA= 25°C 5.5 7.5
VCC = ±5 V TA= full range 8.5
TA= 25°C 6.6 9
ICC Quiescent current VCC = ±15 V mA
TA= full range 10
TA= 25°C 6.9 9.5
VCC = ±18.5 V,
THS3001HV TA= full range 10.5
RL= 150 Ω±2.9 ±3.2
VCC = ±5 V RL= 1 kΩ±3 ±3.3
VOOutput voltage swing V
RL= 150 Ω±12.1 ±12.8
VCC = ±15 V RL= 1 kΩ±12.8 ±13.1
VCC = ±5 V, RL= 20 Ω100
IOOutput current(2) mA
VCC = ±15 V, RL= 75 Ω85 120
TA= 25°C 1 3
VIO Input offset voltage VCC = ±5 V or ±15 V mV
TA= full range 4
Input offset voltage drift VCC = ±5 V or ±15 V 5 μV/°C
TA= 25°C 2 10
Positive (IN+) TA= full range 15
IIB Input bias current VCC = ±5 V or ±15 V μA
TA= 25°C 1 10
Negative (IN-) TA= full range 15
VCC = ±5 V ±3 ±3.2
VICR Common-mode input voltage range V
VCC = ±15 V ±12.9 ±13.2
VCC = ±5 V, VO= ±2.5 V, RL= 1 kΩ1.3
Open loop transresistance MΩ
VCC = ±15 V, VO= ±7.5 V, RL= 1 kΩ2.4
VCC = ±5 V, VCM = ±2.5 V 62 70
CMRR Common-mode rejection ratio dB
VCC = ±15 V, VCM = ±10 V 65 73
TA= 25°C 65 76
VCC = ±5 V dB
TA= full range 63
PSRR Power supply rejection ratio TA= 25°C 69 76
VCC = ±15 V dB
TA= full range 67
(1) Full range = 0°C to 70°C for the THS3001C and -40°C to 85°C for the THS3001I.
(2) Observe power dissipation ratings to keep the junction temperature below absolute maximum when the output is heavily loaded or
shorted. See Absolute Maximum Ratings table.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): THS3001
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
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ELECTRICAL CHARACTERISTICS (continued)
At TA= 25°C, RL= 150 Ω, RF= 1 kΩ(unless otherwise noted)
PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT
Positive (IN+) 1.5 MΩ
RIInput resistance Negative (IN-) 15 Ω
CIDifferential input capacitance 7.5 pF
ROOutput resistance Open loop at 5 MHz 10 Ω
VnInput voltage noise VCC = ±5 V or ±15 V, f = 10 kHz, G = 2 1.6 nV/√Hz
Positive (IN+) 13
InInput current noise VCC = ±5 V or ±15 V, f = 10 kHz, G = 2 pA/√Hz
Negative (IN-) 16
OPERATING CHARACTERISTICS
TA= 25°C, RL= 150 Ω, RF= 1 kΩ(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
G = –5 1700
VCC = ±5 V,
VO(PP) = 4 V G = 5 1300
SR Slew rate(1) V/μs
G = –5 6500
VCC = ±15 V,
VO(PP) = 20 V G = 5 6300
VCC = ±15 V,
Settling time to 0.1% Gain = –1, 40
0 V to 10 V Step
tsns
VCC = ±5 V,
Settling time to 0.1% Gain = –1, 25
0 V to 2 V Step,
VCC = ±15 V, VO(PP) = 2 V,
THD Total harmonic distortion –80 dBc
fc= 10 MHz, G = 2
VCC = ±5 V 0.015%
G = 2, 40 IRE modulation,
Differential gain error ±100 IRE Ramp, NTSC and PAL VCC = ±15 V 0.01%
VCC = ±5 V 0.01°
G = 2, 40 IRE modulation,
Differential phase error ±100 IRE Ramp, NTSC and PAL VCC = ±15 V 0.02°
VCC = ±5 V 330 MHz
G = 1, RF= 1 kΩVCC= ±15 V 420 MHz
Small signal bandwidth (-3 dB) G = 2, RF= 750 Ω, VCC = ±5 V 300
BW G = 2, RF= 680 Ω, VCC = ±15 V 385 MHz
G = 5, RF= 560 Ω, VCC = ±15 V 350
G = 2, RF= 750 Ω, VCC = ±5 V 85
Bandwidth for 0.1 dB flatness MHz
G = 2, RF= 680 Ω, VCC = ±15 V 115
G = –5 65
VCC = ±5 V, VO(PP) = 4 V,
RL= 500 ΩG = 5 62
Full power bandwidth(2) MHz
G = –5 32
VCC = ±15 V, VO(PP) = 20 V,
RL= 500 ΩG = 5 31
(1) Slew rate is measured from an output level range of 25% to 75%.
(2) Full power bandwidth is defined as the frequency at which the output has 3% THD.
4Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
VIVO
+
−
RGRF
RL
50 ΩVCC−
VCC+
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
PARAMETER MEASUREMENT INFORMATION
Figure 1. Test Circuit, Gain = 1 + (RF/RG)
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
|VO| Output voltage swing vs Free-air temperature 2
ICC Current supply vs Free-air temperature 3
IIB Input bias current vs Free-air temperature 4
VIO Input offset voltage vs Free-air temperature 5
vs Common-mode input voltage 6
CMRR Common-mode rejection ratio vs Common-mode input voltage 7
vs Frequency 8
Transresistance vs Free-air temperature 9
Closed-loop output impedance vs Frequency 10
VnVoltage noise vs Frequency 11
InCurrent noise vs Frequency 11
vs Frequency 12
PSRR Power supply rejection ratio vs Free-air temperature 13
vs Supply voltage 14
Slew rate
SR vs Output step peak-to-peak 15, 16
Normalized slew rate vs Gain 17
vs Peak-to-peak output voltage swing 18, 19
Harmonic distortion vs Frequency 20, 21
Differential gain vs Loading 22, 23
Differential phase vs Loading 24, 25
Output amplitude vs Frequency 26-30
Normalized output response vs Frequency 31-34
Small and large signal frequency response 35, 36
Small signal pulse response 37, 38
Large signal pulse response 39 - 46
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): THS3001
TA − Free-Air Temperature − °C
12
2−20 20
14
4
0 40 100−40 60 80
O − Output Voltage Swing − VV
12.5
13
13.5
3.5
3
2.5
VCC = ±5 V
RL = 150 Ω
VCC = ±5 V
No Load
VCC = ±15 V
RL = 150 Ω
VCC = ±15 V
No Load
TA − Free-Air Temperature − °C
9
7
5
3−20 20
8
6
4
0 40 100−40 60 80
VCC = ±5 V
VCC = ±15 V
VCC = ±10 V
ICC − Supply Current − mA
TA − Free-Air Temperature − °C
0
−0.4
−0.8
−1.2 −20 20
−0.2
−0.6
−1
0 40 100−40 60 80
VCC = ±5 V
VCC = ±15 V
Gain = 1
RF = 1 kΩ
VIO − Input Offset Voltage − mV
−40 −20 0 20 80 100
TA − Free-Air Temperature − °C
6040
IIB − Input Bias Current −
−1
−2
−3
−0.5
−1.5
−2.5
Aµ
VCC = ±5 V
VCC = ±15 V
VCC = ±5 V
VCC = ±15 V
IIB−
IIB−
IIB+
IIB+
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE SWING CURRENT SUPPLY
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 2. Figure 3.
INPUT BIAS CURRENT INPUT OFFSET VOLTAGE
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 4. Figure 5.
6Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
|VIC| − Common-Mode Input Voltage − V
60
50
40
30 2 64 8 14
80
010 12
70
TA = −40°C
CMRR − Common-Mode Rejection Ratio − dB
TA = 85°CTA = 25°C
VCC = ±15 V
f − Frequency − Hz
1k 10k 10M 100M1M100k
60
40
20
0
50
30
10
80
70 VCC = ±5 V
VCC = ±15 V
CMRR − Common-Mode Rejection Ratio − dB
1 kΩ
1 kΩ
VI+
−VO
1 kΩ
1 kΩ
TA − Free-Air Temperature − °C
2.2
1.8
1.4
1−20 20
2.4
2
1.6
1.2
0 40 100
VO = VCC/2
RL = 1 kΩ
2.8
−40 60 80
2.6
Transresistance − MΩ
VCC = ±5 V
VCC = ±15 V
VCC = ±10 V
THS3001
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................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
TYPICAL CHARACTERISTICS (continued)
COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIO
vs vs
COMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE
Figure 6. Figure 7.
COMMON-MODE REJECTION RATIO TRANSRESISTANCE
vs vs
FREQUENCY FREE-AIR TEMPERATURE
Figure 8. Figure 9.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): THS3001
f − Frequency − Hz
100
10
1100 10k1k 100k10
1000 VCC = ±15 V and ±5 V
TA = 25°C
In−
nV/ Hz− Voltage Noise −VnIn− Current Noise − pA/ Hz
and
In+
Vn
TA − Free-Air Temperature − °C
80
70 −20 20
85
75
0 40 100−40 60 80
90
PSRR − Power Supply Rejection Ratio − dB
VCC = +5 V
VCC = +15 V
VCC = −5 V
VCC = −15 V
f − Frequency − Hz
PSRR − Power Supply Rejection Ratio − dB
1k 10k 10M 100M1M100k
60
40
20
0
50
30
10
80
90
70
VCC = ±5 V
VCC = ±15 V
G = 1
RF = 1 kΩ
VCC = ±5 V
VCC = ±15 V
−PSRR
+PSRR
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
CLOSED-LOOP OUTPUT IMPEDANCE VOLTAGE NOISE AND CURRENT NOISE
vs vs
FREQUENCY FREQUENCY
Figure 10. Figure 11.
POWER SUPPLY REJECTION RATIO POWER SUPPLY REJECTION RATIO
vs vs
FREQUENCY FREE-AIR TEMPERATURE
Figure 12. Figure 13.
8Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
VO(PP) − Output Step − V
10000
100 5 15
1000
10 200
VCC = ±15 V
G = +5
RL = 150 Ω
tr/tf = 300 ps
RF = 1 kΩ
SR − Slew Rate − V/µs
+SR
−SR
|VCC| − Supply Voltage − V
4000
3000
2000
1000 7 119 13
6000
515
5000
G = +5
RL = 150 Ω
tr/tf = 300 ps
RF = 1 kΩ
SR − Slew Rate − V/µs
−SR
+SR
7000
G − Gain − V/V
1.3
1.1
0.9
0.7 2 4
1.2
1
0.8
3 5 101 6 7
−Gain
+Gain
8 9
1.5
1.4
VCC = ±5 V
VO(PP) = 4 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 300 ps
SR − Normalized Slew Rate − V/µs
VO(PP) − Output Step − V
2000
100 1 3
1000
2 40 5
VCC = ±5 V
G = +5
RL = 150 Ω
tr/tf = 300 ps
RF= 1 kΩ
−SR
+SR
SR − Slew Rate − V/µs
THS3001
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................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
TYPICAL CHARACTERISTICS (continued)
SLEW RATE SLEW RATE
vs vs
SUPPLY VOLTAGE OUTPUT STEP
Figure 14. Figure 15.
SLEW RATE NORMALIZED SLEW RATE
vs vs
OUTPUT STEP GAIN
Figure 16. Figure 17.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 9
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VO(PP) − Peak-to-Peak Output Voltage Swing − V
0 2 4 6 12 14108 16
−55
−65
−75
−85
−60
−70
−80
−50
18
2nd Harmonic
3rd Harmonic
Harmonic Distortion − dBc
20
8 MHz
Gain = 2
VCC = ±15 V
RL = 150 Ω
RF = 750 Ω
VO(PP) − Peak-to-Peak Output Voltage Swing − V
0 2 4 6 12 14108 16
−65
−75
−85
−95
−70
−80
−90
−50
18
2nd Harmonic
3rd Harmonic
Harmonic Distortion − dBc
20
4 MHz
Gain = 2
VCC = ±15 V
RL = 150 Ω
RF = 750 Ω
−55
−60
−70
−80
−90
−100
−75
−85
−95
2nd Harmonic
3rd Harmonic
Harmonic Distortion − dBc
Gain = 2
VCC = ±15 V
VO = 2 VPP
RL = 150 Ω
RF = 750 Ω
100k 1M 10M
f − Frequency − Hz
−70
−80
−90
−100
−75
−85
−95
2nd Harmonic
3rd Harmonic
Harmonic Distortion − dBc
Gain = 2
VCC = ±5 V
VO = 2 VPP
RL = 150 Ω
RF = 750 Ω
100k 1M 10M
f − Frequency − Hz
−60
−65
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
HARMONIC DISTORTION HARMONIC DISTORTION
vs vs
PEAK-TO-PEAK OUTPUT VOLTAGE SWING PEAK-TO-PEAK OUTPUT VOLTAGE SWING
Figure 18. Figure 19.
HARMONIC DISTORTION HARMONIC DISTORTION
vs vs
FREQUENCY FREQUENCY
Figure 20. Figure 21.
10 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
1 2 3 4 7 8
Number of 150 Ω Loads
65
VCC = ±15 V
0.04
0.02
0
0.03
0.01
VCC = ±5 V
Differential Gain − %
Gain = 2
RF = 750 Ω
40 IRE NTSC Modulation
Worst Case: ±100 IRE Ramp
1 2 3 4 7 8
Number of 150 Ω Loads
65
VCC = ±15 V
0.04
0.02
0
0.03
0.01
VCC = ±5 V
Differential Gain − %
Gain = 2
RF = 750 Ω
40 IRE PAL Modulation
Worst Case: ±100 IRE Ramp
1 2 3 4 7 8
Number of 150 Ω Loads
65
VCC = ±15 V
0.3
0.1
0
0.15
0.05
VCC = ±5 V
Differential Phase − Degrees
Gain = 2
RF = 750 Ω
40 IRE NTSC Modulation
Worst Case: ±100 IRE Ramp
0.2
0.25
1 2 3 4 7 8
Number of 150 Ω Loads
65
VCC = ±15 V
0.35
0.1
0
0.15
0.05
VCC = ±5 V
Differential Phase − Degrees
Gain = 2
RF = 750 Ω
40 IRE PAL Modulation
Worst Case: ±100 IRE Ramp
0.2
0.25
0.3
THS3001
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................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
TYPICAL CHARACTERISTICS (continued)
DIFFERENTIAL GAIN DIFFERENTIAL GAIN
vs vs
LOADING LOADING
Figure 22. Figure 23.
DIFFERENTIAL PHASE DIFFERENTIAL PHASE
vs vs
LOADING LOADING
Figure 24. Figure 25.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): THS3001
f − Frequency − Hz
0
−2
−4
−6 1M 100M
1
−1
−3
−5
10M 1G100k
2
3
RF = 750 Ω
Output Amplitude − dB
RF = 1.5 kΩ
Gain = 1
VCC = ±15 V
RL = 150 Ω
VI = 200 mV RMS
RF = 1 kΩ
f − Frequency − Hz
0
−2
−4
−6 1M 100M
1
−1
−3
−5
10M 1G100k
2
3
RF = 750 Ω
Output Amplitude − dB
RF = 1.5 kΩ
Gain = 1
VCC = ±5 V
RL = 150 Ω
VI = 200 mV RMS
RF = 1 kΩ
f − Frequency − Hz
5
3
1
−1 1M 100M
6
4
2
0
10M 1G100k
7
8RF = 560 Ω
Output Amplitude − dB
RF = 1 kΩ
Gain = 2
VCC = ±15 V
RL = 150 Ω
VI = 200 mV RMS
RF = 680 Ω
9
f − Frequency − Hz
5
3
1
−1 1M 100M
6
4
2
0
10M 1G100k
7
8RF = 560 Ω
Output Amplitude − dB
RF = 1 kΩ
Gain = 2
VCC = ±5 V
RL = 150 Ω
VI = 200 mV RMS
RF = 750 Ω
9
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
OUTPUT AMPLITUDE OUTPUT AMPLITUDE
vs vs
FREQUENCY FREQUENCY
Figure 26. Figure 27.
OUTPUT AMPLITUDE OUTPUT AMPLITUDE
vs vs
FREQUENCY FREQUENCY
Figure 28. Figure 29.
12 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
f − Frequency − Hz
50
30
10
−10 1M 100M
60
40
20
0
10M 1G100k
70
G = +1000
RF = 10 kΩ
RL = 150 Ω
VO = 200 mV RMS
VCC = ±5 V
VCC = ±15 V
Output Amplitude − dB
f − Frequency − Hz
0
−2
−4
−6 1M 100M
1
−1
−3
−5
10M 1G100k
2
3
RF = 560 Ω
Normalized Output Response − dB
RF = 680 Ω
RF = 1 kΩ
Gain = −1
VCC = ±15 V
RL = 150 Ω
VI = 200 mV RMS
f − Frequency − Hz
0
−2
−4
−6 1M 100M
1
−1
−3
−5
10M 1G100k
2
3
RF = 560 Ω
Normalized Output Response − dB
RF = 750 Ω
RF = 1 kΩ
Gain = −1
VCC = ±5 V
RL = 150 Ω
VI = 200 mV RMS
f − Frequency − Hz
3
−3
−9
−15 1M 100M
0
−6
−12
10M 1G100k
Gain = +5
VCC = ±15 V
RL = 150 Ω
VO = 200 mV RMS
RF = 390 Ω
Normalized Output Response − dB
RF = 560 Ω
RF = 1 kΩ
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
TYPICAL CHARACTERISTICS (continued)
OUTPUT AMPLITUDE NORMALIZED OUTPUT RESPONSE
vs vs
FREQUENCY FREQUENCY
Figure 30. Figure 31.
NORMALIZED OUTPUT RESPONSE NORMALIZED OUTPUT RESPONSE
vs vs
FREQUENCY FREQUENCY
Figure 32. Figure 33.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): THS3001
f − Frequency − Hz
−2
−6
−10
−14 1M 100M
0
−4
−8
−12
10M 1G100k
2
4
Gain = +5
VCC = ±5 V
RL = 150 Ω
VO = 200 mV RMS
RF = 390 Ω
Normalized Output Response − dB
RF = 620 Ω
RF = 1 kΩ
f − Frequency − Hz
−12
−18
−24
−30 1M 100M
−9
−15
−21
−27
10M 1G100k
−6
−3
Gain = 1
VCC = ±15 V
RF = 1 kΩ
RL = 150 Ω
VI = 500 mV
VI = 250 mV
VI = 125 mV
VI = 62.5 mV
Output Level − dBV
t − Time − ns
Gain = 1
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 300 ps
−200
0
100
−100
100
−100
0 302010 40 50 7060 80 90 100
300
−200
−300
− Output Voltage − V
VOVI− Input Voltage − mV
200
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
NORMALIZED OUTPUT RESPONSE
vs SMALL AND LARGE SIGNAL
FREQUENCY FREQUENCY RESPONSE
Figure 34. Figure 35.
SMALL AND LARGE SIGNAL
FREQUENCY RESPONSE SMALL SIGNAL PULSE RESPONSE
Figure 36. Figure 37.
14 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
t − Time − ns
Gain = +1
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 2.5 ns
−3
0
1
−1
1
−1
0 302010 40 50 7060 80 90 100
3
−2
−3
− Output Voltage − V
VOVI− Input Voltage − V
2
t − Time − ns
Gain = 5
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 300 ps
−60
0
100
−100
20
−20
0 302010 40 50 7060 80 90 100
60
−200
−300
− Output Voltage − mV
VOVI− Input Voltage − mV
200
t − Time − ns
Gain = 1
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 2.5 ns
−3
0
1
−1
1
−1
0 302010 40 50 7060 80 90 100
3
−2
−3
− Output Voltage − V
VOVI− Input Voltage − V
2
t − Time − ns
Gain = +5
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
−3
0
5
−5
1
−1
0 302010 40 50 7060 80 90 100
3
−10
−15
− Output Voltage − V
VOVI− Input Voltage − V
10
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
TYPICAL CHARACTERISTICS (continued)
SMALL SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE
Figure 38. Figure 39.
LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE
Figure 40. Figure 41.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): THS3001
t − Time − ns
Gain = −1
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 2.5 ns
2
0
1
−1
1
−1
0 302010 40 50 7060 80 90 100
3
−2
−3
− Output Voltage − V
VOVI− Input Voltage − V
t − Time − ns
Gain = 5
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
−600
0
1
−1
200
−200
0 302010 40 50 7060 80 90 100
600
−2
−3
− Output Voltage − V
VOVI− Input Voltage − mV
2
t − Time − ns
Gain = −1
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
2
0
1
−1
1
−1
0 302010 40 50 7060 80 90 100
3
−2
−3
− Output Voltage − V
VOVI− Input Voltage − V
t − Time − ns
Gain = −5
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
−600
0
1
−1
200
−200
0 302010 40 50 7060 80 90 100
600
−2
−3
− Output Voltage − V
VOVI− Input Voltage − mV
2
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE
Figure 42. Figure 43.
LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE
Figure 44. Figure 45.
16 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
t − Time − ns
Gain = −5
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
−2
0
5
−5
1
−1
0 302010 40 50 7060 80 90 100
3
−10
−15
− Output Voltage − V
VOVI− Input Voltage − V
10
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
TYPICAL CHARACTERISTICS (continued)
LARGE SIGNAL PULSE RESPONSE
Figure 46.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): THS3001
IN+ IN−
VCC+
VCC−
OUT
3 2 6
7
4
IIB
IIB
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
APPLICATION INFORMATION
THEORY OF OPERATION
The THS3001 is a high-speed, operational amplifier configured in a current-feedback architecture. The device is
built using a 30-V, dielectrically isolated, complementary bipolar process with NPN and PNP transistors
possessing fTs of several GHz. This configuration implements an exceptionally high-performance amplifier that
has a wide bandwidth, high slew rate, fast settling time, and low distortion. A simplified schematic is shown in
Figure 47.
Figure 47. Simplified Schematic
18 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
RECOMMENDED FEEDBACK AND GAIN RESISTOR VALUES
The THS3001 is fabricated using Texas Instruments 30-V complementary bipolar process, HVBiCOM. This
process provides the excellent isolation and extremely high slew rates that result in superior distortion
characteristics.
As with all current-feedback amplifiers, the bandwidth of the THS3001 is an inversely proportional function of the
value of the feedback resistor (see Figures 26 to 34). The recommended resistors for the optimum frequency
response are shown in Table 1. These should be used as a starting point and once optimum values are found,
1% tolerance resistors should be used to maintain frequency response characteristics. For most applications, a
feedback resistor value of 1 kΩis recommended - a good compromise between bandwidth and phase margin
that yields a stable amplifier.
Consistent with current-feedback amplifiers, increasing the gain is best accomplished by changing the gain
resistor, not the feedback resistor. This is because the bandwidth of the amplifier is dominated by the feedback
resistor value and internal dominant-pole capacitor. The ability to control the amplifier gain independent of the
bandwidth constitutes a major advantage of current-feedback amplifiers over conventional voltage-feedback
amplifiers. Therefore, once a frequency response is found suitable to a particular application, adjust the value of
the gain resistor to increase or decrease the overall amplifier gain.
Finally, it is important to realize the effects of the feedback resistance on distortion. Increasing the resistance
decreases the loop gain and increases the distortion. It is also important to know that decreasing load impedance
increases total harmonic distortion (THD). Typically, the third-order harmonic distortion increases more than the
second-order harmonic distortion.
Table 1. Recommended Resistor Values for Optimum
Frequency Response
GAIN RFfor VCC = ±15 V RFfor VCC = ±5 V
1 1 kΩ1 kΩ
2, -1 680 Ω750 Ω
2 620 Ω620 Ω
5 560 Ω620 Ω
OFFSET VOLTAGE
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage:
Figure 48. Output Offset Voltage Model
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): THS3001
_
+
RF
RS
RG
eRg
eRf
eRs en
IN+
Noiseless
IN−
eni eno
eni +ǒenǓ2)ǒIN ) RSǓ2)ǒIN– ǒRFøRGǓǓ2)4 kTRs)4 kTǒRFøRGǓ
Ǹ
Where: k = Boltzmann’s constant = 1.380658 × 10−23
T = Temperature in degrees Kelvin (273 +°C)
RF || RG = Parallel resistance of RF and RG
eno +eni AV+eniǒ1)RF
RGǓ(Noninverting Case)
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
NOISE CALCULATIONS
Noise can cause errors on small signals. This is especially true for amplifying small signals coming over a
transmission line or an antenna. The noise model for current-feedback amplifiers (CFB) is the same as for
voltage feedback amplifiers (VFB). The only difference between the two is that CFB amplifiers generally specify
different current-noise parameters for each input, while VFB amplifiers usually only specify one noise-current
parameter. The noise model is shown in Figure 49. This model includes all of the noise sources as follows:
• en= Amplifier internal voltage noise (nV/√Hz)
• IN+ = Nonverting current noise (pA/√Hz)
• IN- = Inverting current noise (pA/√Hz)
• eRx = Thermal voltage noise associated with each resistor (eRx = 4 kTRx)
Figure 49. Noise Model
The total equivalent input noise density (eni) is calculated by using the following equation:
To get the equivalent output noise of the amplifier, just multiply the equivalent input noise density (eni) by the
overall amplifier gain (AV).
As the previous equations show, to keep noise at a minimum, small value resistors should be used. As the
closed-loop gain is increased (by reducing RG), the input noise is reduced considerably because of the parallel
resistance term. This leads to the general conclusion that the most dominant noise sources are the source
resistor (RS) and the internal amplifier noise voltage (en). Because noise is summed in a root-mean-squares
method, noise sources smaller than 25% of the largest noise source can be effectively ignored. This can greatly
simplify the formula and make noise calculations much easier.
20 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
t − Time − ns
SR = 1500 V/µs
Gain = 5
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 10 ns
10
0
5
−5
2
0
0 604020 80 100 140120 160 180 200
4
−10
−15
− Output Voltage − V
VOVI− Input Voltage − V
t − Time − ns
SR = 2400 V/µs
Gain = 5
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 5 ns
−2
0
5
−5
2
0
0 604020 80 100 140120 160 180 200
4
−10
−15
− Output Voltage − V
VOVI− Input Voltage − V
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
SLEW RATE
The slew rate performance of a current-feedback amplifier, like the THS3001, is affected by many different
factors. Some of these factors are external to the device, such as amplifier configuration and PCB parasitics, and
others are internal to the device, such as available currents and node capacitance. Understanding some of these
factors should help the PCB designer arrive at a more optimum circuit with fewer problems.
Whether the THS3001 is used in an inverting amplifier configuration or a noninverting configuration can impact
the output slew rate. As can be seen from the specification tables as well as some of the figures in this data
sheet, slew-rate performance in the inverting configuration is faster than in the noninverting configuration. This is
because in the inverting configuration the input terminals of the amplifier are at a virtual ground and do not
significantly change voltage as the input changes. Consequently, the time to charge any capacitance on these
input nodes is less than for the noninverting configuration, where the input nodes actually do change in voltage
an amount equal to the size of the input step. In addition, any PCB parasitic capacitance on the input nodes
degrades the slew rate further simply because there is more capacitance to charge. Also, if the supply voltage
(VCC) to the amplifier is reduced, slew rate decreases because there is less current available within the amplifier
to charge the capacitance on the input nodes as well as other internal nodes.
Internally, the THS3001 has other factors that impact the slew rate. The amplifier's behavior during the slew-rate
transition varies slightly depending upon the rise time of the input. This is because of the way the input stage
handles faster and faster input edges. Slew rates (as measured at the amplifier output) of less than about
1500 V/μs are processed by the input stage in a linear fashion. Consequently, the output waveform smoothly
transitions between initial and final voltage levels. This is shown in Figure 50. For slew rates greater than 1500
V/μs, additional slew-enhancing transistors present in the input stage begin to turn on to support these faster
signals. The result is an amplifier with extremely fast slew-rate capabilities. Figure 50 and Figure 51 show
waveforms for these faster slew rates. The additional aberrations present in the output waveform with these
faster-slewing input signals are due to the brief saturation of the internal current mirrors. This phenomenon,
which typically lasts less than 20 ns, is considered normal operation and is not detrimental to the device in any
way. If for any reason this type of response is not desired, then increasing the feedback resistor or slowing down
the input-signal slew rate reduces the effect.
SLEW RATE SLEW RATE
Figure 50. Figure 51.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): THS3001
+
_
THS3001
CLOAD
1 kΩ
Input
Output
1 kΩ
20 Ω
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
DRIVING A CAPACITIVE LOAD
Driving capacitive loads with high-performance amplifiers is not a problem as long as certain precautions are
taken. The first is to realize that the THS3001 has been internally compensated to maximize its bandwidth and
slew-rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the
output will decrease the device's phase margin leading to high-frequency ringing or oscillations. Therefore, for
capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output of
the amplifier, as shown in Figure 52. A minimum value of 20Ωshould work well for most applications. For
example, in 75-Ωtransmission systems, setting the series resistor value to 75 Ωboth isolates any capacitance
loading and provides the proper line impedance matching at the source end.
Figure 52. Driving a Capacitive Load
22 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
PCB DESIGN CONSIDERATIONS
Proper PCB design techniques in two areas are important to ensure proper operation of the THS3001. These
areas are high-speed layout techniques and thermal-management techniques. Because the THS3001 is a
high-speed part, the following guidelines are recommended.
• Ground plane - It is essential that a ground plane be used on the board to provide all components with a low
inductive ground connection, but should be removed from below the output and negative input pins as noted
below.
• The DGN package option includes a thermal pad for increased thermal performance. When using this
package, it is recommended to distribute the negative supply as a power plane, and tie the thermal pad to this
supply with multiple vias for proper power dissipation. It is not recommended to tie the thermal pad to ground
when using split supply (±V) as this will cause worse distortion performance than shown in this data sheet.
• Input stray capacitance - To minimize potential problems with amplifier oscillation, the capacitance at the
inverting input of the amplifiers must be kept to a minimum. To do this, PCB trace runs to the inverting input
must be as short as possible, the ground plane must be removed under any etch runs connected to the
inverting input, and external components should be placed as close as possible to the inverting input. This is
especially true in the noninverting configuration. An example of this can be seen in Figure 53, which shows
what happens when a 1-pF capacitor is added to the inverting input terminal. The bandwidth increases at the
expense of peaking. This is because some of the error current is flowing through the stray capacitor instead
of the inverting node of the amplifier. Although, while the device is in the inverting mode, stray capacitance at
the inverting input has a minimal effect. This is because the inverting node is at a virtual ground and the
voltage does not fluctuate nearly as much as in the noninverting configuration. This can be seen in Figure 54,
where a 10-pF capacitor adds only 0.35 dB of peaking. In general, as the gain of the system increases, the
output peaking due to this capacitor decreases. While this can initially look like a faster and better system,
overshoot and ringing are more likely to occur under fast transient conditions. So proper analysis of adding a
capacitor to the inverting input node should be performed for stable operation.
OUTPUT AMPLITUDE OUTPUT AMPLITUDE
vs vs
FREQUENCY FREQUENCY
Figure 53. Figure 54.
• Proper power-supply decoupling - Use a minimum 6.8-μF tantalum capacitor in parallel with a 0.1-μF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-μF ceramic capacitor should always be used on the supply terminal of
every amplifier. In addition, the 0.1-μF capacitor should be placed as close as possible to the supply terminal.
As this distance increases, the inductance in the connecting etch makes the capacitor less effective. The
designer should strive for distances of less than 0.1 inch between the device power terminal and the ceramic
capacitors.
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): THS3001
PD+ǒTMAX–TA
qJA Ǔ
Where: PD= Maximum power dissipation of THS3001 (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA= Free-ambient air temperature (°C)
θJA = Thermal coefficient from die junction to ambient air (°C/W)
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
THERMAL INFORMATION
The THS3001 incorporates output-current-limiting protection. Should the output become shorted to ground, the
output current is automatically limited to the value given in the data sheet. While this protects the output against
excessive current, the device internal power dissipation increases due to the high current and large voltage drop
across the output transistors. Continuous output shorts are not recommended and could damage the device.
Additionally, connection of the amplifier output to one of the supply rails (±VCC) is not recommended. Failure of
the device is possible under this condition and should be avoided. But, the THS3001 does not incorporate
thermal-shutdown protection. Because of this, special attention must be paid to the device's power dissipation or
failure may result.
The thermal coefficient θJA is approximately 169°C/W for the SOIC 8-pin D package. For a given θJA, the
maximum power dissipation, shown in Figure 55, is calculated by the following formula:
Figure 55. Maximum Power Dissipation vs Free-Air Temperature
24 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
VIVO
C1
+
−
RGRF
R1
f*3 dB +1
2pR1C1
VO
VI+ǒ1)RF
RGǓǒ1
1)sR1C1Ǔ
VI
C2
R2R1
C1
RF
RG
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
(
=1
Q
2 − )
RGRF
_
+f*3 dB +1
2pRC
+
−
C1
RF
RG
VO
VI
THS3001
VO
VI+ǒRF
RGǓȧ
ȡ
Ȣ
S)1
RFC1
Sȧ
ȣ
Ȥ
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
GENERAL CONFIGURATIONS
A common error for the first-time CFB user is the creation of a unity gain buffer amplifier by shorting the output
directly to the inverting input. A CFB amplifier in this configuration will oscillate and is not recommended. The
THS3001, like all CFB amplifiers, must have a feedback resistor for stable operation. Additionally, placing
capacitors directly from the output to the inverting input is not recommended. This is because, at high
frequencies, a capacitor has a low impedance. This results in an unstable amplifier and should not be considered
when using a current-feedback amplifier. Because of this, integrators and simple low-pass filters, which are
easily implemented on a VFB amplifier, have to be designed slightly differently. If filtering is required, simply
place an RC-filter at the noninverting terminal of the operational-amplifier (see Figure 56).
Figure 56. Single-Pole Low-Pass Filter
If a multiple-pole filter is required, the use of a Sallen-Key filter can work well with CFB amplifiers. This is
because the filtering elements are not in the negative feedback loop and stability is not compromised. Because of
their high slew rates and high bandwidths, CFB amplifiers can create accurate signals and help minimize
distortion. An example is shown in Figure 57.
Figure 57. 2-Pole Low-Pass Sallen-Key Filter
There are two simple ways to create an integrator with a CFB amplifier. The first, shown in Figure 58, adds a
resistor in series with the capacitor. This is acceptable because at high frequencies, the resistor is dominant and
the feedback impedance never drops below the resistor value. The second, shown in Figure 59, uses positive
feedback to create the integration. Caution is advised because oscillations can occur due to the positive
feedback.
Figure 58. Inverting CFB Integrator
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): THS3001
+
−
RF
VO
RG
R2R1
C1
RA
VI
THS3001
For Stable Operation:
R2
R1 || RA≥RF
RG
sR1C1
()
RF
RG
1 +
VO ≅ VI
+
−
750 Ω750 Ω
75 Ω75 Ω
75 Ω
75 Ω
75 Ω
N Lines
VO1
VON
THS3001
75-Ω Transmission Line
VI
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
Figure 59. Noninverting CFB Integrator
The THS3001 may also be employed as a good video distribution amplifier. One characteristic of distribution
amplifiers is the fact that the differential phase (DP) and the differential gain (DG) are compromised as the
number of lines increases and the closed-loop gain increases (see Figures 22 to 25 for more information). Be
sure to use termination resistors throughout the distribution system to minimize reflections and capacitive
loading.
Figure 60. Video Distribution Amplifier Application
26 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
_
+
THS3001
VCC−
VCC+
C3
6.8 µF
C4
0.1 µF
C1
6.8 µF
C2
0.1 µF
R1
1 kΩ
R5
1 kΩ
R3
49.9 Ω
R2
49.9 Ω
R4
49.9 Ω
IN−
IN+
OUT
+
+
THS3001
www.ti.com
................................................................................................................................................. SLOS217H –JULY 1998–REVISED SEPTEMBER 2009
EVALUATION BOARD
An evaluation board is available for the THS3001 (THS3001EVM). The board has been configured for low
parasitic capacitance in order to realize the full performance of the amplifier. A schematic of the evaluation board
is shown in Figure 61. The circuitry has been designed so that the amplifier may be used in either an inverting or
noninverting configuration. For more detailed information, refer to the THS3001 EVM User's Guide (literature
number SLOU021). The evaluation board can be ordered online through the TI web site, or through your local TI
sales office or distributor.
Figure 61. THS3001 Evaluation Board Schematic
Copyright © 1998–2009, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Link(s): THS3001
THS3001
SLOS217H –JULY 1998–REVISED SEPTEMBER 2009.................................................................................................................................................
www.ti.com
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (March, 2008) to Revision H ................................................................................................. Page
• Updated document format to current standards ................................................................................................................... 1
• Deleted references to HV version in SOIC package; this version is not available ............................................................... 2
• Updated information about THS3001EVM availability ........................................................................................................ 27
28 Submit Documentation Feedback Copyright © 1998–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3001
PACKAGE OPTION ADDENDUM
www.ti.com 20-Aug-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
THS3001CD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDGN ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDGNG4 ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDGNR ACTIVE MSOP-
PowerPAD DGN 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDGNRG4 ACTIVE MSOP-
PowerPAD DGN 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVCDGN ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVCDGNG4 ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVIDGN ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVIDGNG4 ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001ID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDGN ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDGNG4 ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDGNR ACTIVE MSOP-
PowerPAD DGN 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 20-Aug-2011
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
THS3001IDGNRG4 ACTIVE MSOP-
PowerPAD DGN 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
THS3001CDGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
THS3001CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
THS3001IDGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
THS3001IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
THS3001CDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
THS3001CDR SOIC D 8 2500 367.0 367.0 35.0
THS3001IDGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
THS3001IDR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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