© Semiconductor Components Industries, LLC, 2008
June, 2008 − Rev. 13
1Publication Order Number:
MC33272A/D
MC33272A, MC33274A,
NCV33272A, NCV33274A
Single Supply,
High Slew Rate,
Low Input Offset Voltage
Operational Amplifiers
The MC33272/74 series of monolithic operational amplifiers are
quality fabricated with innovative Bipolar design concepts. This dual
and quad operational amplifier series incorporates Bipolar inputs
along with a patented Zip−R−Trim element for input offset voltage
reduction. The MC33272/74 series of operational amplifiers exhibits
low input offset voltage and high gain bandwidth product.
Dual−doublet frequency compensation is used to increase the slew rate
while maintaining low input noise characteristics. Its all NPN output
stage exhibits no deadband crossover distortion, large output voltage
swing, and an excellent phase and gain margin. It also provides a low
open loop high frequency output impedance with symmetrical source
and sink AC frequency performance.
Features
•Input Offset Voltage Trimmed to 100 mV (Typ)
•Low Input Bias Current: 300 nA
•Low Input Offset Current: 3.0 nA
•High Input Resistance: 16 MW
•Low Noise: 18 nV/ Hz
√
@ 1.0 kHz
•High Gain Bandwidth Product: 24 MHz @ 100 kHz
•High Slew Rate: 10 V/ms
•Power Bandwidth: 160 kHz
•Excellent Frequency Stability
•Unity Gain Stable: w/Capacitance Loads to 500 pF
•Large Output Voltage Swing: +14.1 V/ −14.6 V
•Low Total Harmonic Distortion: 0.003%
•Power Supply Drain Current: 2.15 mA per Amplifier
•Single or Split Supply Operation: +3.0 V to +36 V or
±1.5 V to ±18 V
•ESD Diodes Provide Added Protection to the Inputs
•NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
•Pb−Free Packages are Available
PDIP−8
P SUFFIX
CASE 626
SOIC−8
D SUFFIX
CASE 751
MARKING
DIAGRAMS
DUAL
QUAD
PDIP−14
P SUFFIX
CASE 646
14
SOIC−14
D SUFFIX
CASE 751A
1
1
8
MC33272AP
AWL
YYWWG
33272
ALYWx
G
1
14
MC33274AP
AWLYYWWG
1
8
1
8
1
14
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
1
8
MC33274ADG
AWLYWW
1
14
NCV33274ADG
AWLYWW
1
14
x = A for MC33272AD/DR2
= N for NCV33272ADR2
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G= Pb−Free Package
NCV3
3274
ALYWG
G
1
14
1
14 TSSOP−14
DTB SUFFIX
CASE 948G
(Note: Microdot may be in either location)
MC33
274A
ALYWG
G
1
14
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
2
PIN CONNECTIONS
CASE 626/751
DUAL
CASE 646/751A/948G
QUAD
(Top View)
VEE
Inputs 1
Inputs 2
Output 2
Output 1 VCC
-
-
+
+
1
2
3
4
8
7
6
5
Inputs 1
Output 1
VCC
Inputs 2
Output 2
Output 4
Inputs 4
VEE
Inputs 3
Output 3
(Top View)
4
23
1
1
2
3
4
5
6
78
9
10
11
12
13
14
+
+
-
-
+
-
+
-
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage VCC to VEE +36 V
Input Differential Voltage Range VIDR Note 1 V
Input Voltage Range VIR Note 1 V
Output Short Circuit Duration (Note 2) tSC Indefinite sec
Maximum Junction Temperature TJ+150 °C
Storage Temperature Tstg −60 to +150 °C
ESD Protection at Any Pin
− Human Body Model
− Machine Model
Vesd 2000
200
V
Maximum Power Dissipation PDNote 2 mW
Operating Temperature Range MC33272A, MC33274A
NCV33272A, NCV33274A
TA−40 to +85
−40 to +125
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Either or both input voltages should not exceed VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see Figure 2).
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
3
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.)
Characteristics Figure Symbol Min Typ Max Unit
Input Offset Voltage (RS = 10 W, VCM = 0 V, VO = 0 V)
(VCC = +15 V, VEE = −15 V)
TA = +25°C
TA = −40° to +85°C
TA = −40° to +125°C (NCV33272A)
TA = −40° to +125°C (NCV33274A)
(VCC = 5.0 V, VEE = 0)
TA = +25°C
3 |VIO|
−
−
−
−
−
0.1
−
−
−
−
1.0
1.8
2.5
3.5
2.0
mV
Average Temperature Coefficient of Input Offset Voltage
RS = 10 W, VCM = 0 V, VO = 0 V, TA = −40° to +125°C
3DVIO/DT
−2.0 −
mV/°C
Input Bias Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = Tlow to Thigh
4, 5 IIB
−
−
300
−
650
800
nA
Input Offset Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = Tlow to Thigh
|IIO|
−
−
3.0
−
65
80
nA
Common Mode Input Voltage Range (DVIO = 5.0 mV, VO = 0 V)
TA = +25°C
6 VICR
VEE to (VCC −1.8)
V
Large Signal Voltage Gain (VO = 0 V to 10 V, RL = 2.0 kW)
TA = +25°C
TA = Tlow to Thigh
7 AVOL
90
86
100
−
−
−
dB
Output Voltage Swing (VID = ±1.0 V)
(VCC = +15 V, VEE = −15 V)
RL = 2.0 kW
RL = 2.0 kW
RL = 10 kW
RL = 10 kW
(VCC = 5.0 V, VEE = 0 V)
RL = 2.0 kW
RL = 2.0 kW
8, 9, 12
10, 11
VO+
VO−
VO+
VO−
VOL
VOH
13.4
−
13.4
−
−
3.7
13.9
−13.9
14
−14.7
−
−
−
−13.5
−
−14.1
0.2
5.0
V
Common Mode Rejection (Vin = +13.2 V to −15 V) 13 CMR 80 100 −dB
Power Supply Rejection
VCC/VEE = +15 V/ −15 V, +5.0 V/ −15 V, +15 V/ −5.0 V
14, 15 PSR
80 105 −
dB
Output Short Circuit Current (VID = 1.0 V, Output to Ground)
Source
Sink
16 ISC +25
−25
+37
−37
−
−
mA
Power Supply Current Per Amplifier (VO = 0 V)
(VCC = +15 V, VEE = −15 V)
TA = +25°C
TA = Tlow to Thigh
(VCC = 5.0 V, VEE = 0 V)
TA = +25°C
17 ICC
−
−
−
2.15
−
−
2.75
3.0
2.75
mA
3. MC33272A, MC33274A Tlow = −40°CT
high = +85°C
NCV33272A, NCV33274A Tlow = −40°CT
high = +125°C
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
4
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.)
Characteristics Figure Symbol Min Typ Max Unit
Slew Rate
(Vin = −10 V to +10 V, RL = 2.0 kW, CL = 100 pF, AV = +1.0 V)
18, 33 SR
8.0 10 −
V/ms
Gain Bandwidth Product (f = 100 kHz) 19 GBW 17 24 −MHz
AC Voltage Gain (RL = 2.0 kW, VO = 0 V, f = 20 kHz) 20, 21, 22 AVO −65 −dB
Unity Gain Bandwidth (Open Loop) BW −5.5 −MHz
Gain Margin (RL = 2.0 kW, CL = 0 pF) 23, 24, 26 Am−12 −dB
Phase Margin (RL = 2.0 kW, CL = 0 pF) 23, 25, 26 fm−55 −Deg
Channel Separation (f = 20 Hz to 20 kHz) 27 CS − −120 −dB
Power Bandwidth (VO = 20 Vpp, RL = 2.0 kW, THD ≤ 1.0%) BWP−160 −kHz
Total Harmonic Distortion
(RL = 2.0 kW, f = 20 Hz to 20 kHz, VO = 3.0 Vrms, AV = +1.0)
28 THD
−0.003 −
%
Open Loop Output Impedance (VO = 0 V, f = 6.0 MHz) 29 |ZO|−35 −W
Differential Input Resistance (VCM = 0 V) Rin −16 −MW
Differential Input Capacitance (VCM = 0 V) Cin −3.0 −pF
Equivalent Input Noise Voltage (RS = 100 W, f = 1.0 kHz) 30 en−18 −nV/ Hz√
Equivalent Input Noise Current (f = 1.0 kHz) 31 in−0.5 −pA/ Hz√
Vin
-
Sections
BCD
VEE
+Vin
VO
VCC
+
+
Figure 1. Equivalent Circuit Schematic
(Each Amplifier)
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
5
2
Figure 2. Maximum Power Dissipation
versus Temperature
Figure 3. Input Offset Voltage versus
Temperature for Typical Units
Figure 4. Input Bias Current versus
Common Mode Voltage
Figure 5. Input Bias Current
versus Temperature
Figure 6. Input Common Mode Voltage
Range versus Temperature
Figure 7. Open Loop Voltage Gain
versus Temperature
P(MAX), MAXIMUM POWER DISSIPATION (mW)
D
TA, AMBIENT TEMPERATURE (°C)
0 20 40 60 80 100 120 140 160 180-60 -40 -20
MC33272P & MC33274P
MC33274D
MC33272D
V, INPUT OFFSET VOLTAGE (mV)
IO
TA, AMBIENT TEMPERATURE (°C)
-55 -25 0 25 50 75 100 125
VCC = +15 V
VEE = -15 V
VCM = 0 V
1. VIO > 0 @ 25°C
2. VIO = 0 @ 25°C
3. VIO < 0 @ 25°C
1
3
2
13
I , INPUT BIAS CURRENT (nA)
IB
VCM, COMMON MODE VOLTAGE (V)
-16 -12 -8.0 -4.0 0 4.0 8.0 12 16
VCC = +15 V
VEE = -15 V
TA = 25°C
TA, AMBIENT TEMPERATURE (°C)
-55 -25 0 25 50 75 100 125
VCC = +15 V
VEE = -15 V
VCM = 0 V
TA, AMBIENT TEMPERATURE (°C)
V, INPUT COMMON MODE VOLTAGE RANGE (V)
ICR
-55 -25 0 25 50 75 100 125
VEE
VCC
VCC = +5.0 V to +18 V
VEE = -5.0 V to -18 V
DVIO = 5.0 mV
VO = 0 V
TA, AMBIENT TEMPERATURE (°C)
A, OPEN LOOP VOLTAGE GAIN (X 1.0 kV/V)
VOL
-55 -25 0 25 50 75 100 125
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
f = 10 Hz
DVO = -10 V to +10 V
I , INPUT BIAS CURRENT (nA)
IB
2400
2000
1600
1200
800
400
0
5.0
3.0
1.0
-1.0
-3.0
-5.0
400
350
300
250
200
150
100
50
0
600
500
400
300
200
100
0
VCC
VCC -0.5
VCC -1.0
VCC -1.5
VCC -2.0
VEE +1.0
VEE +0.5
VEE
180
160
140
120
100
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
6
VO, OUTPUT VOLTAGE (V )
pp VO, OUTPUT VOLTAGE (V )
pp
TA = 55°C
TA = 125°C
TA = 25°C
TA = 25°C
TA = -55°C
TA = 125°CVCC = +15 V
RL to VCC
VEE = Gnd
RFdbk = 100 kW
Figure 8. Split Supply Output Voltage Swing
versus Supply Voltage
Figure 9. Split Supply Output Saturation
Voltage versus Load Current
Figure 10. Single Supply Output Saturation
Voltage versus Load Resistance to Ground
Figure 11. Single Supply Output Saturation
Voltage versus Load Resistance to VCC
Figure 12. Output Voltage versus Frequency Figure 13. Common Mode Rejection
versus Frequency
0 5.0 10 15 20
VCC, VEE SUPPLY VOLTAGE (V)
TA = 25°C
RL = 10 kW
RL = 2.0 kW
5.0 10 15 200
IL, LOAD CURRENT (±mA)
, OUTPUT SATURATION VOLTAGE (V)
sat
Source
TA = 125°C
TA = 25°C
TA = -55°C
100 1.0 k 10 k 100 k 1.0 M
RL , LOAD RESISTANCE TO GROUND (kW)
VCC
VCC = +5.0 V to +18 V
RL to Gnd
VEE = Gnd
TA = 55°C
TA = 125°C
TA = +25°C
TA = -55°C
Gnd
TA = 125°C
10 100 1.0 k 100 k
RL, LOAD RESISTANCE TO VCC (W)
1.0 k 10 k 1.0 M 1 0M100 k
f, FREQUENCY (Hz)
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
AV = +1.0
THD = ≤1.0%
TA = 25°C
f, FREQUENCY (Hz)
10 100 1.0 k 10 k 100 k 1.0 M
CMR, COMMON MODE REJECTION (dB)
TA = -55°C
TA = 125°C
VCC = +15 V
VEE = -15 V
VCM = 0 V
DVCM = ±1.5 V
VCC = +5.0 V to +18 V
VEE = -5.0 V to -18 V
10 k
Sink
TA = 125°C
TA = 25°C
TA = -55°C
V
, OUTPUT SATURATION VOLTAGE (V)
sat
V
, OUTPUT SATURATION VOLTAGE (V)
sat
V
CMR = 20Log
ADM
-
+
DVCM DVO
X ADM
DVCM
DVO
40
30
20
10
0
VCC
VCC -1.0
VCC -2.0
VEE +2.0
VEE +1.0
VEE
VCC
VCC -4.0
VCC -8.0
VCC -12
+0.2
+0.1
0
15
14.6
14.2
8.0
4.0
0
28
24
20
16
12
8
4
0
120
100
80
60
40
20
0
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
7
TA = 125°CVCC = +15 V
VEE = -15 V
DVCC = ±1.5 V
TA = -55°C
VCC
VEE
ADM
-
+
+PSR = 20Log
DVO
DVO/ADM
DVCC
Figure 14. Positive Power Supply Rejection
versus Frequency
Figure 15. Negative Power Supply Rejection
versus Frequency
Figure 16. Output Short Circuit Current
versus Temperature
Figure 17. Supply Current versus
Supply Voltage
Figure 18. Normalized Slew Rate
versus Temperature
Figure 19. Gain Bandwidth Product
versus Temperature
f, FREQUENCY (Hz)
+PSR, POWER SUPPLY REJECTION (dB)
120
100
80
60
40
20
010 100 1.0 k 10 k 100 k 1 .0 M
f, FREQUENCY (Hz)
-PSR, POWER SUPPLY REJECTION (dB)
120
100
80
60
40
20
010 100 1.0 k 10 k 100 k 1.0 M
TA = 125°C
DVCC = ±1.5 V
VCC = +15 V
VEE = -15 V
TA = -55°C
TA, AMBIENT TEMPERATURE (°C)
|I|, OUTPUT SHORT CIRCUIT CURRENT (mA)
SC
60
50
40
30
20
10
0-55 -25 0 25 50 75 100 125
Source
Sink
Sink
Source
VCC = +15 V
VEE = -15 V
VID = ±1.0 V
RL < 100 W
VCC, |VEE| , SUPPLY VOLTAGE (V)
I, SUPPLY CURRENT (mA)
CC
11
10
9.0
8.0
7.0
6.0
5.0
4.0
3.0 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
TA = +125°C
TA = +25°C
TA = -55°C
TA, AMBIENT TEMPERATURE (°C)
SR, SLEW RATE (NORMALIZED)
1.15
1.1
1.05
1.0
0.95
0.9
0.85
-55 -25 0 25 50 75 100 125
VCC = +15 V
VEE = -15 V
DVin = 20 V
TA, AMBIENT TEMPERATURE (°C)
GBW, GAIN BANDWIDTH PRODUCT (MHz)
50
40
30
20
10
0
-55 -25 0 25 50 75 100 125
VCC = +15 V
VEE = -15 V
f = 100 kHz
RL = 2.0 kW
CL = 0 pF
VCC
VEE
ADM
-
+
-PSR = 20Log
DVO
DVO/ADM
DVEE
VO
100 pF
2.0kW
DVin
-
+
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
8
CL = 10 pF
CL = 100 pF
CL = 300 pF
CL = 500 pF
VCC = +15 V
VEE = -15 V
1A
2A
2B
1B
Figure 20. Voltage Gain and Phase
versus Frequency
Figure 21. Gain and Phase
versus Frequency
Figure 22. Open Loop Voltage Gain and
Phase versus Frequency
Figure 23. Open Loop Gain Margin and Phase
Margin versus Output Load Capacitance
Figure 24. Open Loop Gain Margin
versus Temperature
Figure 25. Phase Margin versus Temperature
f, FREQUENCY (Hz)
EXCESS PHASE (DEGREES)φ,
A , VOLTAGE GAIN (dB)
V
25
20
15
10
5.0
0
-10
-15
-20
-25
-5.0
100 k 1.0 M 10 M 100 M
Gain
Phase
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
TA = 25°C
f, FREQUENCY (Hz)
PHASE (DEGREES)
φ
,
A , VOLTAGE GAIN (dB)
V
25
20
15
10
5.0
0
-10
-15
-20
-25
-5.0
100 k 1.0 M 10 M 100 M
TA = 25°C
CL = 0 pF
1A - Phase VCC = 18 V, VEE = -18 V
2A - Phase VCC = 1.5 V, VEE = -1.5 V
1B - Gain VCC = 18 V, VEE = -18 V
2B - Gain VCC = 1.5 V, VEE = -1.5 V
1A
2A
1B
2B
f, FREQUENCY (MHz)
VOL
EXCESS PHASE (DEGREES)
φ
20
10
0
-10
A, OPEN LOOP VOLTAGE GAIN (dB)
-20
-303.0 4.0 6.0 8.0 10 20 30
VCC = +15 V
VEE = -15 V
Vout = 0 V
TA = 25°C
1A - Phase (RL = 2.0 kW)
2A - Phase (RL = 2.0 kW, CL = 300 pF)
1B - Gain (RL = 2.0 kW)
2B - Gain (RL = 2.0 kW, CL = 300 pF)
m
CL, OUTPUT LOAD CAPACITANCE (pF)
A, OPEN LOOP GAIN MARGIN (dB)
12
10
8.0
6.0
4.0
2.0
01.0 10 100 1000
, PHASE MARGIN (DEGREES)φm
Vin
-
+VO
CL
2.0 kW
Gain Margin
Phase Margin
VCC = +15 V
VEE = -15 V
VO = 0 V
TA, AMBIENT TEMPERATURE (°C)
A, OPEN LOOP GAIN MARGIN (dB)
m
12
10
8.0
6.0
4.0
2.0
0-55 -25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C)
m
φ
60
50
40
30
20
10
0-55 -25 0 25 50 75 100 125
, PHASE MARGIN (DEGREES)
CL = 10 pF
CL = 100 pF
CL = 300 pF
CL = 500 pF
VCC = +15 V
VEE = -15 V
80
100
120
140
160
180
200
220
240
260
280
80
100
120
140
160
180
200
220
240
100
120
140
160
180
200
220
240
280
260
0
10
20
30
40
50
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
9
Figure 26. Phase Margin and Gain Margin
versus Differential Source Resistance
Figure 27. Channel Separation
versus Frequency
Figure 28. Total Harmonic Distortion
versus Frequency
Figure 29. Output Impedance versus Frequency
Figure 30. Input Referred Noise Voltage
versus Frequency
Figure 31. Input Referred Noise Current
versus Frequency
A, GAIN MARGIN (dB)
m
φ
RT, DIFFERENTIAL SOURCE RESISTANCE (W)
15
12
9.0
6.0
3.0
0
1.0 10 100 1.0 k 10 k
m, PHASE MARGIN (DEGREES)
Gain Margin
Phase Margin
f, FREQUENCY (Hz)
CS, CHANNEL SEPERATION (dB)
160
150
140
130
120
110
100100 1.0 k 10 k 100 k 1.0 M
Driver Channel
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
DVOD = 20 Vpp
TA = 25°C
f, FREQUENCY (Hz)
THD, TOTAL HARMONIC DISTORTION (%)
1.0
0.1
0.01
0.00110 100 1.0 k 10 k 100 k
AV = +1000
AV = +100
AV = +10
AV = +1.0
VO = 2.0 Vpp
TA = 25°C
VCC = +15 V
VEE = -15 V
f, FREQUENCY (Hz)
|Z|, OUTPUT IMPEDANCE ()
OΩ
50
40
30
10
0
20
10 k 100 k 1.0 M 10 M
VCC = +15 V
VEE = -15 V
VO = 0 V
TA = 25°C
AV = 1000
AV = 100
AV = 10 AV = 1.0
f, FREQUENCY (Hz)
e, INPUT REFERRED NOISE VOLTAGE ( )
n
50
40
30
20
10
010 100 1.0 k 10 k 100 k
nV/ Hz√
VCC = +15 V
VEE = -15 V
TA = 25°C
pA/ Hz√
i, INPUT REFERRED NOISE CURRENT ( )
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
f, FREQUENCY (Hz)
10 100 1.0 k 10 k 100 k
VCC = +15 V
VEE = -15 V
TA = 25°C
n
60
50
40
30
20
10
0
Vin R2
R1VO
-
+
Input Noise Voltage
Test Circuit
VO
-
+
Input Noise Current Circuit
RS
(RS = 10 kW)
VO
-
+
VCC = +15 V
VEE = -15 V
RT = R1+R2
VO = 0 V
TA = 25°C
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
10
Figure 32. Percent Overshoot versus
Load Capacitance
Figure 33. Non−inverting Amplifier Slew Rate
for the MC33274
Figure 34. Non−inverting Amplifier Overshoot
for the MC33274
Figure 35. Small Signal Transient Response
for MC33274
Figure 36. Large Signal Transient Response
for MC33274
CL, LOAD CAPACITANCE (pF)
PERCENT OVERSHOOT (%)
60
50
40
30
20
10
0
10 100 1000
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
TA = 25°C
t, TIME (2.0 ms/DIV) t, TIME (1.0 ms/DIV)
t, TIME (2.0 ms/DIV)
V, OUTPUT VOLTAGE (5.0 V/DIV)
O
t, TIME (2.0 ns/DIV)
VCC = +15 V
VEE = -15 V
AV = +1.0
RL = 2.0 kW
TA = 25°C
CL = 100 pF
CL = f
VCC = +15 V
VEE = -15 V
AV = +1.0
RL = 2.0 kW
CL = 100 pF
TA = 25°C
VCC = +15 V
VEE = -15 V
AV = +1.0
RL = 2.0 kW
CL = 300 pF
TA = 25°C
VCC = +15 V
VEE = -15 V
AV = +1.0
RL = 2.0 kW
CL = 300 pF
TA = 25°C
V, OUTPUT VOLTAGE (5.0 V/DIV)
O
V, OUTPUT VOLTAGE (50 mV/DIV)
O
V, OUTPUT VOLTAGE (5.0 V/DIV)
O
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
11
ORDERING INFORMATION
Device Package Shipping†
MC33272AD SOIC−8
98 Units / Rail
MC33272ADG SOIC−8
(Pb−Free)
MC33272ADR2 SOIC−8
2500 / Tape & Reel
MC33272ADR2G SOIC−8
(Pb−Free)
MC33272AP PDIP−8
50 Units / Rail
MC33272APG PDIP−8
(Pb−Free)
NCV33272ADR2* SOIC−8
2500 / Tape & Reel
NCV33272ADR2G* SOIC−8
(Pb−Free)
MC33274AD SOIC−14
55 Units / Rail
MC33274ADG SOIC−14
(Pb−Free)
MC33274ADR2 SOIC−14
2500 / Tape & Reel
MC33274ADR2G SOIC−14
(Pb−Free)
MC33274ADTBR2G TSSOP−14
(Pb−Free)
MC33274AP PDIP−14
25 Units / Rail
MC33274APG PDIP−14
(Pb−Free)
NCV33274AD* SOIC−14
55 Units / Rail
NCV33274ADG* SOIC−14
(Pb−Free)
NCV33274ADR2* SOIC−14
2500 / Tape & Reel
NCV33274ADR2G* SOIC−14
(Pb−Free)
NCV33274ADTBR2G* TSSOP−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV prefix for automotive and other applications requiring site and control changes.
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
12
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AJ
SEATING
PLANE
1
4
58
N
J
X 45 _
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
BS
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
−X−
−Y−
G
M
Y
M
0.25 (0.010)
−Z−
Y
M
0.25 (0.010) ZSXS
M
____
1.52
0.060
7.0
0.275
0.6
0.024
1.270
0.050
4.0
0.155
ǒmm
inchesǓ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
13
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
17
14 8
B
ADIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.715 0.770 18.16 19.56
B0.240 0.260 6.10 6.60
C0.145 0.185 3.69 4.69
D0.015 0.021 0.38 0.53
F0.040 0.070 1.02 1.78
G0.100 BSC 2.54 BSC
H0.052 0.095 1.32 2.41
J0.008 0.015 0.20 0.38
K0.115 0.135 2.92 3.43
L
M−−− 10 −−− 10
N0.015 0.039 0.38 1.01
__
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
F
HG D
K
C
SEATING
PLANE
N
−T−
14 PL
M
0.13 (0.005)
L
M
J0.290 0.310 7.37 7.87
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
14
TSSOP−14
CASE 948G−01
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
____
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
L−U−
SEATING
PLANE
0.10 (0.004)
−T−
ÇÇÇ
ÇÇÇ
SECTION N−N
DETAIL E
JJ1
K
K1
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
−W−
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
−V−
14X REFK
N
N
7.06
14X
0.36 14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
15
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
−B−
G
P7 PL
14 8
7
1
M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
−T−
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
_DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
__ __
7.04
14X
0.58
14X
1.52
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
7X
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MC33272A, MC33274A, NCV33272A, NCV33274A
http://onsemi.com
16
PACKAGE DIMENSIONS
PDIP−8
P SUFFIX
CASE 626−05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
58
F
NOTE 2 −A−
−B−
−T−
SEATING
PLANE
H
J
G
DK
N
C
L
M
M
A
M
0.13 (0.005) B M
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.40 10.16 0.370 0.400
B6.10 6.60 0.240 0.260
C3.94 4.45 0.155 0.175
D0.38 0.51 0.015 0.020
F1.02 1.78 0.040 0.070
G2.54 BSC 0.100 BSC
H0.76 1.27 0.030 0.050
J0.20 0.30 0.008 0.012
K2.92 3.43 0.115 0.135
L7.62 BSC 0.300 BSC
M--- 10 --- 10
N0.76 1.01 0.030 0.040
__
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
MC33272A/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative