● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
TN2540
Features
Low threshold (2.0V max.)
High input impedance
Low input capacitance (125pF max.)
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
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General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
N-Channel Enhancement-Mode
Vertical DMOS FET
Absolute Maximum Ratings
Parameter Value
Drain-to-source voltage BVDSS
Drain-to-gate voltage BVDGS
Gate-to-source voltage ±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature* 300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
Ordering Information
Device Package Options BVDSS/BVDGS
(V)
RDS(ON)
(max)
(Ω)
ID(ON)
(min)
(A)
VGS(th)
(max)
(V)
TO-92 TO-243AA (SOT-89) Die*
TN2540 TN2540N3-G TN2540N8-G TN2540ND 400 12 1.0 2.0
-G indicates package is RoHS compliant (‘Green’)
* MIL visual screening available
Pin Configurations
TO-92 (N3) TO-243AA (SOT-89) (N8)
GATE
SOURCE
DRAIN
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
T N
2540
YYWW
TO-92 (N3)
Product Marking
TO-243AA (SOT-89) (N8)
TN5DW W = Code for week sealed
= “Green” Packaging
GATE
SOURCE
DRAIN
DRAIN
2
TN2540
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage 400 - - V VGS = 0V, ID = 100µA
VGS(th) Gate threshold voltage 0.6 - 2.0 V VGS = VDS, ID= 1.0mA
ΔVGS(th) Change in VGS(th) with temperature - -2.5 -4.0 mV/OC VGS = VDS, ID= 1.0mA
IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current
- - 10 µA VGS = 0V, VDS = Max Rating
- - 1.0 mA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current 0.3 0.5 - AVGS = 4.5V, VDS = 25V
0.75 1.0 - VGS = 10V, VDS = 25V
RDS(ON) Static drain-to-source on-state resistance - 8.0 12 ΩVGS = 4.5V, ID = 150mA
- 8.0 12 VGS = 10V, ID = 500mA
ΔRDS(ON) Change in RDS(ON) with temperature - - 0.75 %/OC VGS = 10V, ID = 500mA
GFS Forward transductance 125 200 - mmho VDS = 25V, ID = 100mA
CISS Input capacitance - 95 125
pF
VGS = 0V,
VDS = 25V,
f = 1.0MHz
COSS Common source output capacitance - 20 70
CRSS Reverse transfer capacitance - 10 25
td(ON) Turn-on delay time - - 20
ns
VDD = 25V,
ID = 1.0A,
RGEN = 25Ω
trRise time - - 15
td(OFF) Turn-off delay time - - 25
tfFall time - - 20
VSD Diode forward voltage drop - - 1.8 V VGS = 0V, ISD = 200mA
trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 1.0A
Notes:
All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
All A.C. parameters sample tested.
1.
2.
Notes:
† ID (continuous) is limited by max rated Tj .
‡ Mounted on FR5 Board, 25mm x 25mm x 1.57mm.
Thermal Characteristics
Package
ID
(continuous)†
(mA)
ID
(pulsed)
(A)
Power Dissipation
@TA = 25OC
(W)
θjc
(OC/W)
θja
(OC/W)
IDR
†
(mA)
IDRM
(A)
TO-92 175 2.0 0.74 125 170 175 2.0
TO-243AA (SOT-89) 260 1.8 1.6‡15 78‡260 1.8
Switching Waveforms and Test Circuit
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t(ON)
td(ON)
t(OFF)
td(OFF) tF
tr
INPUT
INPUT
OUTPUT
10V
V
DD
R
GEN
0V
0V
3
TN2540
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Typical Performance Curves
°
°
°
°
°
4
TN2540
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Typical Performance Curves (cont.)
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
VSG )
st
lo
v
(
Tj
)h
t
(SG
V )
dez
i
lam
r
on(
)NO(SD
R )
d
ezilamr
o
n(
VDS(th) and R Variation with Temperature
C)°(
On-Resistance vs. Drain Current
(amperes)
D
)smho(
)
N
O(S
D
R
Variation with Temperature
DSS
SSD )dezi
l
amron
(
VB
C)°(T j
Transfer Characteristics
VGS (volts)
I)serepma
(
D
Capacitance vs. Drain-to-Source Voltage
200
)sdarafocip(
C
VDS (volts)
I
BV
0 10 2 0 30 40
100
0 2 4 6 8 10
1.5
1.2
0.9
0.6
0.3
-50 0 50 100 150
1.1
1.0
0.9
50
40
30
20
10
0
1.4
1.2
1.0
0.8
0.6
2.5
2.0
1.5
1.0
0.5
0
10
8
6
4
2
0 0.4 0.8 1.2 1.6 2.0
-50 0 50 100 150
V
DS
= 40V
V
95pF
DS
= 10V
V
GS
= 4.5V
V
GS
= 10V
T= -55
AC
°
V
DS
= 25V
25°C
125 °C
0 0.4 0.8 1.2 2.01.6
f = 1MHz
C
ISS
C
OSS
C
RSS
260 pF
(th)
V @ 1mA
R @ 10V, 0.5A
DS(ON)
0
150
50
0
5
TN2540
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
3-Lead TO-92 Package Outline (N3)
Symbol A b c D E E1 e e1 L
Dimensions
(inches)
MIN .170 .014†.014†.175 .125 .080 .095 .045 .500
NOM - - - - - - - - -
MAX .210 .022†.022†.205 .165 .105 .105 .055 .610*
JEDEC Registration TO-92.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
† This dimension is a non-JEDEC dimension.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version D080408.
Seating Plane
1
2
3
Front View Side View
Bottom View
E1 E
D
e1
L
e
c
1 2 3
b
A
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2008 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
6
TN2540
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-TN2540
A091408
3-Lead TO-243AA (SOT-89) Package Outline (N8)
Symbol A b b1 C D D1 E E1 e e1 H L
Dimensions
(mm)
MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.13
1.50
BSC
3.00
BSC
3.94 0.89
NOM - - - - - - - - - -
MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
Drawings not to scale.
Supertex Doc. #: DSPD-3TO243AAN8, Version D070908.
bb1