June 2013
©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3 www.fairchildsemi.com
1
FDMB3900AN Dual N-Channel PowerTrench® MOSFET
FDMB3900AN
Dual N-Channel PowerTrench® MOSFET
25 V, 7.0 A, 23 mΩ
Features
Max rDS(on) = 23 mΩ at VGS = 10 V, ID = 7.0 A
Max rDS(on) = 33 mΩ at VGS = 4.5 V, ID = 5.5 A
Fast switching speed
Low gate charge
High performance trench technology for extremely low rDS(on)
High power and current handling capability
RoHS Compliant
General Description
These N-Channel Logic Level MOSFETs are produced using
Fairchild Semiconductor’s advanced PowerTrench® process
that has been especially tailored to minimize the on-state
resistance and yet maintain superior switching performance.
These devices are well suited for low voltage and battery
powered applications where the low in-line power loss and fast
switching are required.
MicroFET 3X1.9
Pin 1
G2
G1
S1
S2
81
72
3
4
6
5Q2
Q1
D2
D2
D1
D1
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage 25 V
VGS Gate to Source Voltage ±20 V
IDDrain Current -Continuous TA = 25 °C (Note 1a) 7.0 A
-Pulsed 28
PDPower Dissipation TA = 25 °C (Note 1a) 1.6 W
Power Dissipation TA = 25 °C (Note 1b) 0.8
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 80 °C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1b) 165
Device Marking Device Package Reel Size Tape Width Quantity
3900 FDMB3900AN MicroFET 3X1.9 7 ’’ 8 mm 3000 units
FDMB3900AN Dual N-Channel PowerTrench® MOSFET
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©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Electrical Characteristics TJ = 25 °C unless otherwise noted
Off Characteristics
On Characteristic s
Dynamic Characterist ic s
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 25 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, referenced to 25 °C 17 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V 1 μA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.0 2.0 3.0 V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = 250 μA, referenced to 25 °C -6 mV/°C
rDS(on) Static Drain to Source On Resistance
VGS = 10 V, ID = 7.0 A 19 23
mΩ
VGS = 4.5 V, ID = 5.5 A 26 33
VGS = 10 V, ID = 7.0 A
TJ = 125 °C 26 32
gFS Forward Transconductance VDS = 5 V, ID = 7.0 A 27 S
Ciss Input Capacitance VDS = 13 V, VGS = 0 V
f = 1MHz
650 890 pF
Coss Output Capacitance 151 200 pF
Crss Reverse Transfer Capacitance 141 215 pF
RgGate Resistance 0.8 Ω
td(on) Turn-On Delay Time VDD = 13 V, ID = 7.0 A
VGS = 10 V, RGEN = 6 Ω
612ns
trRise Time 310ns
td(off) Turn-Off Delay Time 15 26 ns
tfFall Time 310ns
Qg(TOT) Total Gate Charge VGS = 0 V to 10 V VDD = 13 V
ID = 7.0 A
11 17 nC
Total Gate Charge VGS = 0 V to 5 V 7 10 nC
Qgs Gate to Source Charge 2.0 nC
Qgd Gate to Drain “Miller” Charge 3.0 nC
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 1.25 A (Note 2) 0.8 1.2 V
VGS = 0 V, IS = 7.0 A (Note 2) 0.9 1.2
trr Reverse Recovery Time IF = 7.0 A, di/dt = 100 A/μs 14 24 ns
Qrr Reverse Recovery Charge 3 10 nC
NOTES:
1. RθJA is determined with the de vice mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guarante ed b y d esign w hil e RθCA is determined by
the user's board de sign.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
a. 80 °C/W when mounted on
a 1 in2 pad of 2 oz copper
b.165 °C/W when mounted on
a minimum pad of 2 oz copper
FDMB3900AN Dual N-Channel PowerTrench® MOSFET
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3
©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Typical Characteristics TJ = 25°C unless otherwise noted
Figure 1.
01234
0
7
14
21
28
VGS = 6 V
VGS = 3.5 V
VGS = 10 V
VGS = 4 V
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
VGS = 4.5 V
ID, DRAIN CURREN T (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On-Region Characteristics Figure 2.
0 7 14 21 28
0
1
2
3
4
VGS = 6 V VGS = 10 V
PULSE DU R ATION = 80μs
DUTY CYCLE = 0.5%MAX
NORMALIZED
DRAIN TO SOURCE ON-RE SISTANCE
ID, DRAIN CURRENT(A)
VGS = 4 V
VGS = 4.5 V
VGS = 3.5 V
Normali zed On-Resis tance
vs Drain Current and Gate Voltage
Figure 3. Normalized On- Resistance
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
ID = 7 A
VGS = 10 V
NORMALIZED
DRAIN TO SOU RC E ON -RESISTA NC E
TJ, JUNCTION TEMPERATURE (oC)
vs Junction Te mperature Figure 4.
246810
0
20
40
60
80
ID = 7 A
TJ = 25 oC
TJ = 125 oC
VGS, GA TE TO SO U R C E VO L TAGE (V)
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%MAX
On-Resistance vs Gate to
Source Voltage
Figure 5. Transfer Characteristics
12345
0
7
14
21
28
TJ = 25 oC
TJ = -55 oC
VDS = 5 V
PULSE DURATION = 80μs
DUTY CYCLE = 0.5%M A X
TJ = 150 oC
ID, DRAIN CURRENT (A)
VGS, GATE TO S OUR C E V OLTAGE (V)
Figure 6.
0.2 0.4 0.6 0.8 1.0 1.2 1.4
0.1
1
10
30
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Source to Drain Diode
Forward Voltage vs Source Current
FDMB3900AN Dual N-Channel PowerTrench® MOSFET
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©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Figure 7.
036912
0
2
4
6
8
10 ID = 7 A
VDS = 10 V VDS = 13 V
VGS, GATE TO SOURCE VOLTAGE(V)
Qg, GATE CHARGE(nC)
VDS = 15 V
Gate Charge Characteristics Figure 8.
0.1 1 10
100
200
300
400
500
600
700
800
900
25
f = 1 MHz
VGS = 0 V
CAPACITANCE (pF)
VDS, DRA IN TO SOUR C E VO LTA G E (V)
Crss
Coss
Ciss
Capacitance vs Drain
to Source Voltage
Figure 9.
25 50 75 100 125 150
0
2
4
6
8
VGS = 10 V
RθJA = 80 oC/W
VGS = 4.5 V
ID, DRAIN CURRENT (A)
TA, AMBIENT TEMPERATURE (oC)
Maximum Continuous Drain
Current vs Ambient Temperature Figure 10.
0.01 0.1 1 10 100
0.01
0.1
1
10
40
100 μs
10 ms
10 s
100 ms
DC
1 s
1 ms
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
TH IS AR EA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 165 oC/W
TA = 25 oC
Forward Bias Safe
Operating Area
Figure 11. Single Pulse Maximum Power Dissipation
10-4 10-3 10-2 10-1 110
100 1000
0.5
1
10
100
300
P(PK), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 165 oC/W
TA = 25 oC
t, PULSE WIDTH (sec)
Typical Characteristics TJ = 25°C unless otherwise noted
FDMB3900AN Dual N-Channel PowerTrench® MOSFET
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©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
10-4 10-3 10-2 10-1 110
100 1000
0.001
0.01
0.1
1
SINGLE PULSE
RθJA = 165 oC/W
DUTY CYC L E-DESC ENDING OR D ER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.0 5
0.0 2
0.0 1
2
PDM
t1t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
Typical Characteristics TJ = 25°C unless otherwise noted
FDMB3900AN Dual N-Channel PowerTrench® MOSFET
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6
©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3
Dimensional Outline and Pad Layout
www.fairchildsemi.com
FDMB3900AN Dual N-Channel PowerTrench® MOSFET
©2011 Fairchild Semiconductor Corporation
FDMB3900AN Rev.C3 7
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Definition of Terms
2Cool™
AccuPower™
AX-CAP®*
BitSiC™
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT™
CTL™
Current Transfer Logic™
DEUXPEED®
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ESBC™
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Marking Small Speaker s Sound L ouder
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MicroFET™
MicroPak™
MicroPak2™
MillerDrive™
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mWSaver™
OptoHiT™
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PowerTrench®
PowerXS™
Programmable Active Droop™
QFET®
QS™
Quiet Series™
RapidConfigure™
Saving our world, 1mW/W/kW at a time™
SignalWise™
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Solutions for Your Success™
SPM®
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SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
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Sync-Lock™
®*
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TinyPWM™
TinyWire™
TranSiC®
TriFault Detect™
TRUECURRENT®*
μSerDes™
UHC®
Ultra FRFET™
UniFET™
VCX™
VisualMax™
VoltagePlus™
XS™
®
™
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