Semiconductor Components Industries, LLC, 2003
July, 2003 - Rev. 4 1Publication Order Number:
MC74VHC00/D
MC74VHC00
Quad 2−Input NAND Gate
The MC74VHC00 is an advanced high speed CMOS 2-input
NAND gate fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V
systems to 3 V systems.
High Speed: tPD = 3.7 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 2 A (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 32 FETs or 8 Equivalent Gates
Figure 1. Pinout: 14-Lead Packages
(Top View)
1314 12 11 10 9 8
21 34567
VCC B4 A4 Y4 B3 A3 Y3
A1 B1 Y1 A2 B2 Y2 GND
L
L
H
H
L
H
L
H
FUNCTION TABLE
Inputs Output
AB
H
H
H
L
Y
A = Assembly Location
L, WL = Wafer Lot
Y = Year
W, WW = Work Week
MARKING DIAGRAMS
Device Package Shipping
ORDERING INFORMATION
MC74VHC00DR2 SO-14 2500 Tape & Reel
MC74VHC00DT TS SOP-14 96 Units/Rail
MC 74VHC00DT R2 TSSOP-14 2500 Tape & Reel
MC74VHC00MEL EIAJ
SO-14 2000 Tape & Reel
SO-14
D SUFFIX
CASE 751A-03
TSSOP-14
DT SUFFIX
CASE 948G-01
EIAJ SO-14
M SUFFIX
CASE 965-01
14
1
14
1
1
14
VHC00
AWLYWW
VHC00
AWLYWW
VHC00
ALYW
http://onsemi.com
MC74VHC00
http://onsemi.com
2
3Y1
1
A1
Figure 2. Logic Diagram
2
B1
6Y2
4
A2
5
B2
8Y3
9
A3
10
B3
11 Y4
12
A4
13
B4
Y = AB
MAXIMUM RATINGS (Note 1)
Symbol Parameter Value Unit
VCC Positive DC Supply Voltage -0.5 to +7.0 V
VIN Digital Input Voltage -0.5 to +7.0 V
VOUT DC Output Voltage -0.5 to VCC +0.5 V
IIK Input Diode Current -20 mA
IOK Output Diode Current 20 mA
IOUT DC Output Current, per Pin 25 mA
ICC DC Supply Current, VCC and GND Pins 75 mA
PDPower Dissipation in Still Air SOIC Package
TSSOP 200
180 mW
TSTG Storage Temperature Range -65 to +150 °C
VESD ESD Withstand Voltage Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
>2000
>200
N/A
V
ILATCH-UP Latch-Up Performance Above VCC and Below GND at 125°C (Note 5) 300 mA
JA Thermal Resistance, Junction to Ambient SOIC Package
TSSOP 143
164 °C/W
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the
Recommended Operating Conditions.
2. Tested to EIA/JESD22-A114-A
3. Tested to EIA/JESD22-A115-A
4. Tested to JESD22-C101-A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol Characteristics Min Max Unit
VCC DC Supply Voltage 2.0 5.5 V
VIN DC Input Voltage 0 5.5 V
VOUT DC Output Voltage 0 VCC V
TAOperating Temperature Range, All Package Types -55 125 °C
tr, tfInput Rise or Fall Time VCC = 3.3 V + 0.3 V
VCC = 5.0 V + 0.5 V 0
0100
20 ns/V
MC74VHC00
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3
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC ELECTRICAL CHARACTERISTICS
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
VCC
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
TA = 25°C
ÎÎÎÎÎ
Î
ÎÎÎ
Î
ÎÎÎÎÎ
TA = -40 to
85°C
ÎÎÎÎÎ
Î
ÎÎÎ
Î
ÎÎÎÎÎ
TA = -55 to
+125°C
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
Test Conditions
ÎÎÎÎ
ÎÎÎÎ
V
CC
V
ÎÎÎ
ÎÎÎ
Min
Typ
Max
Min
Max
Min
Max
Unit
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
VIH
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
High-Level Input
Voltage
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
2.0
3.0 to
5.5
ÎÎÎ
ÎÎ
Î
ÎÎÎ
1.50
VCC x
0.7
Î
Î
Î
1.50
VCC x
0.7
Î
Î
1.50
VCC x
0.7
Î
V
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
VIL
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
Low-Level Input
Voltage
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
2.0
3.0 to
5.5
ÎÎÎ
ÎÎ
Î
ÎÎÎ
Î
Î
0.50
VCC x
0.3
Î
Î
0.50
VCC x
0.3
Î
Î
0.50
VCC x
0.3
V
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
VOH
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
High-Level
Output Voltage
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
Vin = VIH or VIL
IOH = - 50 A
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
2.0
3.0
4.5
ÎÎÎ
ÎÎ
Î
ÎÎ
Î
ÎÎÎ
1.9
2.9
4.4
Î
Î
2.0
3.0
4.5
Î
Î
Î
Î
1.9
2.9
4.4
Î
Î
Î
Î
1.9
2.9
4.4
Î
Î
V
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
Vin = VIH or VIL
IOH = - 4 mA
IOH = - 8 mA
ÎÎÎÎ
Î
ÎÎ
Î
Î
ÎÎ
Î
ÎÎÎÎ
3.0
4.5
ÎÎÎ
ÎÎ
Î
ÎÎ
Î
ÎÎÎ
2.58
3.94
Î
Î
Î
Î
Î
Î
2.48
3.80
Î
Î
Î
Î
2.40
3.70
Î
Î
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
VOL
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
Low-Level
Output Voltage
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
Vin = VIH or VIL
IOL = 50 A
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
2.0
3.0
4.5
ÎÎÎ
ÎÎ
Î
ÎÎÎ
Î
0.0
0.0
0.0
Î
0.1
0.1
0.1
Î
Î
0.1
0.1
0.1
Î
Î
0.1
0.1
0.1
V
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
Vin = VIH or VIL
IOL = 4 mA
IOL = 8 mA
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
3.0
4.5
ÎÎÎ
ÎÎ
Î
ÎÎÎ
Î
Î
0.36
0.36
Î
Î
0.44
0.44
Î
Î
0.55
0.55
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
Iin
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
Input Leakage
Current
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
Vin = 5.5 V or GND
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
0 to 5.5
ÎÎÎ
ÎÎ
Î
ÎÎÎ
Î
Î
0.1
Î
Î
1.0
Î
Î
2.0
A
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ICC
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
Quiescent Supply
Current
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
Vin = VCC or GND
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
5.5
ÎÎÎ
ÎÎ
Î
ÎÎÎ
Î
Î
2.0
Î
Î
20
Î
Î
40
A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎ
TA = 25°C
ÎÎÎÎÎ
Î
ÎÎÎ
Î
ÎÎÎÎÎ
TA = -40 to
85°C
ÎÎÎÎÎ
Î
ÎÎÎ
Î
ÎÎÎÎÎ
TA = -55 to
+125°C
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Test Conditions
Min
Typ
Max
Min
Max
Min
Max
Unit
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
tPLH,
tPHL
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
Propagation
Delay, A or B to Y
ÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3 V CL = 15 pF
CL = 50 pF
Î
Î
5.5
8.0
Î
7.9
11.4
Î
1.0
1.0
Î
9.5
13.0
Î
1.0
1.0
Î
10
14.5
ns
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
VCC = 5.0 ± 0.5 V CL = 15 pF
CL = 50 pF
3.7
5.2
5.5
7.5
1.0
1.0
6.5
8.5
1.0
1.0
7.0
9.5
ÎÎÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
Cin
ÎÎÎÎÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎÎÎ
Input
Capacitance
ÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎ
Î
Î
4.0
Î
10
Î
Î
10
Î
Î
10
pF
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Note 6) 19 pF
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC/4 (per gate). CPD is used to determine the
no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 5.0 V, Measured in SOIC Package)
TA = 25°C
Symbol Characteristic Typ Max Unit
VOLP Quiet Output Maximum Dynamic VOL 0.3 0.8 V
VOLV Quiet Output Minimum Dynamic VOL - 0.3 - 0.8 V
VIHD Minimum High Level Dynamic Input Voltage 3.5 V
VILD Maximum Low Level Dynamic Input Voltage 1.5 V
MC74VHC00
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4
Figure 3. Switching Waveforms
VCC
GND
50%
50% VCC
A or B
Y
tPHL
tPLH
*Includes all probe and jig capacitance
Figure 4. Test Circuit
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 5. Input Equivalent Circuit
INPUT
MC74VHC00
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5
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
-A-
-B-
G
P7 PL
14 8
71 M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
-T-
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
 
SOIC-14
D SUFFIX
CASE 751A-03
ISSUE F
MC74VHC00
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6
PACKAGE DIMENSIONS
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.

S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
L-U-
SEATING
PLANE
0.10 (0.004)
-T-
ÇÇÇ
ÇÇÇ
ÇÇÇ
SECTION N-N
DETAIL E
JJ1
K
K1
ÉÉ
ÉÉ
DETAIL E
F
M
-W-
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
-V-
14X REFK
N
N
TSSOP-14
DT SUFFIX
CASE 948G-01
ISSUE O
MC74VHC00
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7
PACKAGE DIMENSIONS
HE
A1
DIM MIN MAX MIN MAX
INCHES
−−− 2.05 −−− 0.081
MILLIMETERS
0.05 0.20 0.002 0.008
0.35 0.50 0.014 0.020
0.18 0.27 0.007 0.011
9.90 10.50 0.390 0.413
5.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC
7.40 8.20 0.291 0.323
0.50 0.85 0.020 0.033
1.10 1.50 0.043 0.059
0
0.70 0.90 0.028 0.035
−−− 1.42 −−− 0.056
A1
HE
Q1
LE
10 0
10
LEQ1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
0.13 (0.005) M0.10 (0.004)
D
Z
E
1
14 8
7
eA
b
VIEW P
c
L
DETAIL P
M
A
b
c
D
E
e
0.50
M
Z
SO-14
M SUFFIX
CASE 965-01
ISSUE O
MC74VHC00
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8
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